Stanislav Shwartsman
562c8c91d1
fixed FMA4 instructions sources
2012-03-06 15:18:35 +00:00
Stanislav Shwartsman
bde2f4d829
correctly handle #UD because of XOP.VVV
2012-03-05 19:48:55 +00:00
Stanislav Shwartsman
95e4191cd1
any vex instruction must use VEX.VVV or #UD
2012-03-04 17:56:22 +00:00
Stanislav Shwartsman
c52d97cb7f
fixed comments in paging.cc
2012-02-28 22:39:33 +00:00
Stanislav Shwartsman
1f14c171ed
rename some SSE handlers
2012-02-28 18:53:58 +00:00
Stanislav Shwartsman
d4541f1a88
removed dedicated handler for MOVNTI - can be replaced with existing handlers
2012-02-27 15:50:43 +00:00
Stanislav Shwartsman
959ab435cf
fixed compilation err with SVM
2012-02-24 21:31:31 +00:00
Stanislav Shwartsman
86c7033a63
name cpu log functions in lower case
2012-02-23 19:31:02 +00:00
Stanislav Shwartsman
1599031869
changed BX_INFO back to BX_DEBUG
2012-02-19 20:16:10 +00:00
Stanislav Shwartsman
f48317affc
SVM: Added EXITINFO2 write on VMEXIT (missed in prev commit)
...
Added phenom_8650_toliman <AMD Phenom X3 8650 (Toliman)> comment into .bochsrc example with all other supported CPU configs.
Added missed SVM definitions into Toliman CPUDB module
2012-02-19 20:15:23 +00:00
Stanislav Shwartsman
92376fb693
svm updates
2012-02-19 12:16:58 +00:00
Stanislav Shwartsman
c70a42c5d7
merged patch ftom SF bug 3459998 Bochs cannot be compiled outside the source tree
2012-02-19 12:16:14 +00:00
Stanislav Shwartsman
c2670b40d5
small cleanup in paging code
2012-02-15 19:49:35 +00:00
Stanislav Shwartsman
2f7e5ab3a3
fixed bugs in toliman configuration
2012-02-14 22:01:50 +00:00
Stanislav Shwartsman
5c02e7cebd
do not need to load PAE PDPTRs if going to nested paging mode
2012-02-14 12:36:39 +00:00
Stanislav Shwartsman
bb7a648d91
Major commit !
...
------------
Implemented SVN nested paging support - the Virtual Box boots perfectly with Nested Paging guest !
A lot of code duplication was added for now - major cleanup will follow later.
! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB - this configuration has Nested Paging enabled.
Some CPUID modules rework done to enable Toliman configuration.
Ckean up 'executable' attribute from all CPU source files.
2012-02-13 23:29:01 +00:00
Stanislav Shwartsman
deaf58b130
read from CPUDB svm extensions
2012-02-13 21:55:27 +00:00
Stanislav Shwartsman
813fe4e6b9
reduce code duplication - continue preparing for nested paging implementation
2012-02-13 20:06:04 +00:00
Stanislav Shwartsman
4d0a5c1b07
- VMX: EPT misconfiguration should always take priority above EPT permissions violation (translate_guest_physical corner case bug)
...
- VMX: EPT reserved bits set should cause EPT misconfiguration and not EPT violation
- VMX: EPT walk for guest CR3 address should be considered as 'page walk'
2012-02-12 21:30:22 +00:00
Stanislav Shwartsman
0b5f798af1
re-commit changes from SVN rev11026 which were accidentially undo'ed by last Volker's commit
2012-02-12 19:13:57 +00:00
Volker Ruppert
de94b08a1a
- class bx_list_c now contains a chained list of parameters. Removed the now
...
obsolete maxsize parameter from all lists.
2012-02-12 18:43:20 +00:00
Stanislav Shwartsman
855d2adece
cleanups in paging code
2012-02-12 16:09:35 +00:00
Stanislav Shwartsman
fa182e96b5
for future nested paging: under NP PDPTR CACHE will contain NP PDPTR entries
2012-02-10 20:39:46 +00:00
Stanislav Shwartsman
b497077b70
intel disclosed more cpuid bits
2012-02-08 19:54:22 +00:00
Stanislav Shwartsman
9bebe91826
eliminate duplicated cpu methods by adding extra param to opcodes with no modrm
2012-02-03 10:24:59 +00:00
Stanislav Shwartsman
14ec87768e
expand FCMOV function to 8 different functions - each one is much simpler to implement and understand
2012-02-01 12:07:53 +00:00
Stanislav Shwartsman
2e44613032
dos2unix for avx_pfp.cc
2012-01-30 15:29:22 +00:00
Stanislav Shwartsman
457c56c822
fixup for EPT paging
2012-01-22 18:39:15 +00:00
Stanislav Shwartsman
fc6712e3a3
undo part of prev paging commit
2012-01-19 20:01:32 +00:00
Stanislav Shwartsman
12afed23a1
small fix and cleanups in paging code
2012-01-19 06:38:22 +00:00
Stanislav Shwartsman
9461797886
added extra param to debugger phy access callback + cleanup in vmexit functions
2012-01-17 21:50:15 +00:00
Stanislav Shwartsman
f4b49633d4
paging code rework (cont)
2012-01-17 18:20:55 +00:00
Stanislav Shwartsman
0d64a6cb92
fixed paging bug in previous commit
2012-01-16 15:26:25 +00:00
Stanislav Shwartsman
7d641450ec
remove param from check_entry_PAE function - it is always the same for all calls
2012-01-15 20:25:39 +00:00
Stanislav Shwartsman
c7cb99787e
rework in paging code before nested paging implementation for SVM - step 2
...
optimize TLB flush code
2012-01-15 19:38:00 +00:00
Stanislav Shwartsman
4db23355cd
rework in paging code before nested paging implementation for SVM - step 1
2012-01-15 17:54:13 +00:00
Stanislav Shwartsman
f5d55f5eb6
- Implemented Task Switch intercept in SVM, cleanup in task switch handling code
...
- Changed (c) year in several cpu files
- Cleanup and indent fixes in VMX code
2012-01-11 20:21:29 +00:00
Stanislav Shwartsman
cb366e00c5
fixed code duplication in exceptions
2012-01-11 06:27:35 +00:00
Stanislav Shwartsman
ba7887f31c
fixed code duplication with v86 interrupt redirection
2012-01-10 08:13:34 +00:00
Stanislav Shwartsman
8d698c7087
fixed compilation err ith cpu-level=5 and cleanups
2012-01-09 20:52:15 +00:00
Stanislav Shwartsman
87b1c31495
fixed SVM VmEXIT on #PF error code
2012-01-09 20:24:23 +00:00
Stanislav Shwartsman
f64c38dfaf
fix in SVM event injection
2012-01-09 20:15:15 +00:00
Stanislav Shwartsman
2900956327
Split back some frequently used arithmetic and logic opcodes (which were done as Load+Op before).
2012-01-09 13:09:59 +00:00
Stanislav Shwartsman
35bfe11c3d
SVM: forgot to save RFLAGS in guest state
2012-01-08 19:46:38 +00:00
Stanislav Shwartsman
a531f8081c
fixed compilation with cpu-level=5
2012-01-08 16:58:14 +00:00
Stanislav Shwartsman
76ee7b499b
svm updates
2012-01-08 14:09:51 +00:00
Stanislav Shwartsman
9261b2fa14
removed param_names.h include where not needed anymore
2012-01-07 17:54:19 +00:00
Stanislav Shwartsman
7defa74261
cleaned up code duplication in CPUDB classes
2012-01-07 17:06:03 +00:00
Stanislav Shwartsman
a804adac46
fixed compilation err with SMP enabled
2012-01-07 16:45:25 +00:00
Stanislav Shwartsman
edfff5bf44
fixed VMX+EPT VirtualBox failures
2012-01-06 10:30:07 +00:00
Stanislav Shwartsman
e2ff4bc6d4
clear exitinfo1/2 fields in SVM on VMENTER
2012-01-05 22:23:05 +00:00
Stanislav Shwartsman
665d4568ee
convert most popular svn/vmx msgs to bx_debug - can be used together with enabling log options per device from .bochsrc
2012-01-05 19:42:58 +00:00
Stanislav Shwartsman
fddccfb498
code cleanup + copy/paste removal
2012-01-04 21:36:39 +00:00
Stanislav Shwartsman
0e17f8f195
implemented AMD APIC extensions for SVM support
2012-01-04 16:06:37 +00:00
Stanislav Shwartsman
8c8fa8ec25
vmx cleanups
2012-01-03 20:27:40 +00:00
Stanislav Shwartsman
c857488ed9
Added Corei5 750 (Lynnfield) configuration to the CPUDB
2012-01-02 20:59:02 +00:00
Stanislav Shwartsman
3b98634045
show EFER in debug print outside long mode too
2012-01-02 20:06:03 +00:00
Stanislav Shwartsman
5847e772a6
set async_event when injecting virq to SVM guest
2012-01-01 21:22:56 +00:00
Stanislav Shwartsman
269d5e3443
more SVM fixes
2012-01-01 20:26:23 +00:00
Stanislav Shwartsman
810aa1b67c
fixes for SVN. also turion64_tyler supports RDTSCP - include it in CPUID
2012-01-01 17:54:41 +00:00
Stanislav Shwartsman
30d90c1dc1
more SVM fixes
2011-12-31 20:10:11 +00:00
Stanislav Shwartsman
b97a108d93
SVM: allow entering vm8086 and also paged real mode
2011-12-31 16:33:36 +00:00
Stanislav Shwartsman
a0b5ff48ec
more SVM fixes
2011-12-31 14:22:51 +00:00
Stanislav Shwartsman
3c0d712146
SVM fixes
2011-12-31 13:58:55 +00:00
Stanislav Shwartsman
fe6741d84d
fixed SVM bug
2011-12-31 13:26:55 +00:00
Stanislav Shwartsman
fe6328d18c
correctly enable SVM support in internal CPU features list
2011-12-31 12:58:20 +00:00
Stanislav Shwartsman
46d8a5894e
removed bad RDMSR/WRMSR check which disabled access to AMD extended MSRs
2011-12-31 12:37:35 +00:00
Stanislav Shwartsman
560e3ca254
compilation fix for smp=0
2011-12-30 18:55:19 +00:00
Stanislav Shwartsman
cee8a3b9ef
AMD's core has special 0x80000008.ecx value
2011-12-30 18:53:41 +00:00
Stanislav Shwartsman
088ab4832f
turion64 tyler supports cmpxchg16b
2011-12-30 18:46:46 +00:00
Stanislav Shwartsman
2a0d989755
fixed compilation err with SVm w/o VMX
2011-12-30 12:24:22 +00:00
Stanislav Shwartsman
93523a657d
remove patch that always kept IF set after HLT - not needed anymore
2011-12-30 08:50:01 +00:00
Stanislav Shwartsman
abda3a967c
added two AMD CPUs to CPUDB
2011-12-29 14:23:22 +00:00
Stanislav Shwartsman
5da69a6fb4
fixed typo - invalid CPUID leaf should go to max std leaf
2011-12-28 21:59:39 +00:00
Stanislav Shwartsman
2b854cb101
added basic (very basic) SVM CPUID into generic_cpuid module
2011-12-28 21:54:51 +00:00
Stanislav Shwartsman
0a14f08f16
completing SVM coding, missed - CPUID, extended APIC
2011-12-28 16:12:28 +00:00
Stanislav Shwartsman
864ea23b5b
take events handling logic from cpu.cc to new file event.cc
2011-12-28 12:26:45 +00:00
Stanislav Shwartsman
2b8371f2b6
implemented SVM_GIF handling
2011-12-27 20:46:15 +00:00
Stanislav Shwartsman
7f5f917a34
more SVM implementation
2011-12-27 19:42:11 +00:00
Stanislav Shwartsman
c32eaa5d05
added more svm intercepts
2011-12-26 20:51:57 +00:00
Stanislav Shwartsman
6ae86a059b
firt cleanup in SVM code. added intercept check for MSR and IO
2011-12-26 19:57:39 +00:00
Stanislav Shwartsman
8b4a2c2034
implemented some more intercepts.
...
fixed compilation without SVM
2011-12-26 16:33:13 +00:00
Stanislav Shwartsman
bfcbb81602
SVM:
...
- IO intercept is not implemented yet
- MSR intercept is not implemented yet
VMX:
Fixed Bochs PANIC crash when doing I/O access crossing VMX I/O permission bitmaps.
This can happen because access_physical_read and access_physical_write cannot access memory cross 4K boundary.
2011-12-25 22:09:31 +00:00
Stanislav Shwartsman
ea6dfe3dc0
added svm files
2011-12-25 20:01:48 +00:00
Stanislav Shwartsman
01080243d4
complation fix
2011-12-25 19:58:21 +00:00
Stanislav Shwartsman
a44c1b8e1e
SVM and VMX share tsc offset code
2011-12-25 19:53:23 +00:00
Stanislav Shwartsman
75bda1d5cd
implemented SVM emulation support for Bochs (incomplete yet)
...
I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation.
Of course SVM emulation is incomplete, completely untested and not expected to work.
But someone could already take a look one the code and give some suggestions.
Also looking for anybody with existing SVM kernels - as simple as possible - for testing.
Status:
- exceptions intercept is not implemented yet
- IO intercept is not implemented yet
- MSR intercept is not implemented yet
- virtual interrupts are not implemented yet
- CPUID is not implemented yet
No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 19:35:29 +00:00
Stanislav Shwartsman
2dee4b12be
added VMX .bochsrc option to ctoggle VMX ON/OFF on runtime
2011-12-21 09:11:51 +00:00
Stanislav Shwartsman
e7ed8aca5c
move inhibit interrrupts functionality to icount interface
2011-12-21 06:17:45 +00:00
Stanislav Shwartsman
7cdeecf198
VMX: fixed VirtualBox VMX guest Guru Meditation - FS.BASE get corrupted after saving/restoring unusable selector
2011-12-19 16:06:53 +00:00
Stanislav Shwartsman
6cc03432d9
improve VMX debug print
2011-12-18 21:04:30 +00:00
Stanislav Shwartsman
f6203dae7d
instrumentation: added special indication for indirect call/jump
2011-12-18 18:11:56 +00:00
Stanislav Shwartsman
9763643106
VMX: Fixed VMFUNC instruction behavior to align with Intel SDM revision 041
2011-12-17 14:06:23 +00:00
Stanislav Shwartsman
cbbd8bfd46
fixed some warnings after compilation with msvcpp 2010
2011-12-10 18:58:25 +00:00
Stanislav Shwartsman
ac0ebc9728
added debug prints about vmcs initialization
2011-12-09 19:57:40 +00:00
Stanislav Shwartsman
f496e78326
fixed compilation warning
2011-12-02 19:40:31 +00:00
Stanislav Shwartsman
1e3e6ff2af
BMI: fixed EFLAGS after BMI instructions (set EFLAGS while preserving PF was not implemented properly in 2.5 release)
2011-11-29 19:50:26 +00:00
Stanislav Shwartsman
b8f2d91b9a
fixed compilation err
2011-11-28 21:16:40 +00:00
Stanislav Shwartsman
99bec5155e
fixed compilation err in instrumentation module
2011-11-28 10:08:03 +00:00
Stanislav Shwartsman
8cb359fab5
fixed flags handling for BMI instructions
2011-11-27 13:23:26 +00:00
Stanislav Shwartsman
100622e958
fix ULL suffix for 64bit int, use BX_CONST64 instead
2011-11-26 19:01:53 +00:00
Stanislav Shwartsman
f09bdf353a
RDMSR can also read TSC so make it end-of-trace as well (same as RDTSC)
2011-11-24 16:03:51 +00:00
Stanislav Shwartsman
f660d3dc68
implemented missed XOP instructions FRCZPS/PD/SS/SD + update CHANGES with fixed bugs
2011-11-24 11:34:26 +00:00
Stanislav Shwartsman
c74f590077
implemented TSC-Deadline APIC timer mode
2011-11-21 12:51:50 +00:00
Stanislav Shwartsman
e4bd200119
do not report TSC Deadline for Sandy Bridge CPUID - not implemented yet
2011-11-20 18:25:39 +00:00
Stanislav Shwartsman
9be8552b80
- Implemented VM Functions support and EPTP-Switching VM Functions
...
- Added VMEXIT conditions for INVPCID instruction
Now Bochs is fully aligned with latest pulished Intel's SDM rev040.
2011-11-05 07:31:51 +00:00
Stanislav Shwartsman
42a0a178eb
disasm for XOP instructions
2011-10-30 08:58:49 +00:00
Stanislav Shwartsman
ad9bdbe550
fixed compilation failure
2011-10-21 08:06:55 +00:00
Stanislav Shwartsman
b1a6b34616
implemented PERMIL2PS/PERMIL2PD XOP instructions
2011-10-20 17:37:57 +00:00
Stanislav Shwartsman
ddecc0234a
fixed (c) info
2011-10-20 14:06:12 +00:00
Stanislav Shwartsman
3035fcd0af
implemented XOP FMADCSWD/FMADCSSWD instructions
2011-10-20 13:55:26 +00:00
Stanislav Shwartsman
5d9bbae71c
bugfix: cant use ib2 it is overlap with disp32
2011-10-19 21:28:36 +00:00
Stanislav Shwartsman
5cc04b9955
Implemented AMDs Buldozer XOP and TBM extensions.
...
XOP: few instructions are still missing, coming soon
BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
2011-10-19 20:54:04 +00:00
Stanislav Shwartsman
314171bb56
fixed compilation w/o AVX
2011-10-09 13:56:39 +00:00
Stanislav Shwartsman
71cbff104b
fixing xsave/xrstor flows with AVX
2011-10-09 09:19:49 +00:00
Stanislav Shwartsman
8ada4ce5e4
added to cpudb: Intel(R) Core(TM) i5 M 520 (Arrandale) - based on Westmere arch
2011-10-07 19:32:44 +00:00
Stanislav Shwartsman
2580d8c46d
added FMA4 AMD instructions support, fixed mem access length for Intel scalar FMA instructions
2011-10-07 14:09:35 +00:00
Stanislav Shwartsman
aad57310c2
disasm for FMA4, better dbg print SSE rounding control with MXCSR
2011-10-06 20:33:10 +00:00
Stanislav Shwartsman
8a9b8f4622
MXCSR.FUZ is ignoired for F16 instructions
2011-10-03 15:08:22 +00:00
Stanislav Shwartsman
e282b5e88d
Move DAZ handling into softfloat library (for float16, float32 and float64 only) and cleanup SSE and AVX code
...
Fix decoding of opcodes with VEX.W=1 in 32-bit mode (AVX2, FMA)
2011-10-01 15:40:36 +00:00
Stanislav Shwartsman
f425400af5
fixed warnings from compilation with mingw-gcc 4.6.1
2011-09-30 20:38:18 +00:00
Stanislav Shwartsman
e5d0540365
commit new added files
2011-09-29 22:38:38 +00:00
Stanislav Shwartsman
6751af5d8e
added AVX FMA extensions support. The implementation is based on QEMU patch by Peter Maydell (fixed)
2011-09-29 22:20:56 +00:00
Stanislav Shwartsman
275194fb32
#GP on reading VMX_EPT_VPID_CAP MSR when EPT and VPID disabled
2011-09-26 20:36:26 +00:00
Stanislav Shwartsman
f0d9f8fab7
added some comments
2011-09-26 20:10:15 +00:00
Stanislav Shwartsman
0547c8823e
compilation w/o x86-64
2011-09-26 19:48:58 +00:00
Stanislav Shwartsman
12ad45395b
enable Penryn VMX capabilities with VMX=1, VMX=2 is required for EPT and heavier stuff
2011-09-26 19:36:20 +00:00
Stanislav Shwartsman
54d1d8aa55
added new assertion to generic cpuid
2011-09-26 18:47:47 +00:00
Stanislav Shwartsman
aa96ecd98a
compilation fix
2011-09-26 18:18:10 +00:00
Stanislav Shwartsman
0aadf88c07
more polishing for vmx configurability
2011-09-26 18:08:31 +00:00
Stanislav Shwartsman
c28c7f6a06
Supply real VMX capabilities together with the CPU MODEL .bochsrc option.
...
So now the same single option will choose not only the CPUID flags but also VMX capabilities matching real HW machine.
Removed cpuid of core2_extreme_x9770 from the cpudb. I don't remember its VMX capabilities anyway.
There is another Penryn model in the cpudb - core2_penryn_t9600.
2011-09-26 12:31:40 +00:00
Stanislav Shwartsman
8d95830562
first step to configuration of VMX through cpuid_t class
2011-09-25 19:04:55 +00:00
Stanislav Shwartsman
b66feecc86
move common instrumentation constants (valid for all stubs) to cpu.h
2011-09-25 17:38:54 +00:00
Stanislav Shwartsman
62d0c8abf7
- Now you could disable x86-64 from .bochsrc so now it is possible to emulate
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32-bit CPU using Bochs binary compiled with x86-64 support.
The commit also fixes some init.cc issues with initialization of SYSCALL/SYSRET MSR in AMD hosts and also includes code reorg.
2011-09-25 17:36:20 +00:00
Stanislav Shwartsman
2b7894de7b
fixed dbg print mentioned in SF bug 3029271
2011-09-22 22:08:18 +00:00
Stanislav Shwartsman
1b9f286945
- New way of CPUs scheduling in SMP mode brings up to 50% speedup to the
...
SMP emulation. New implementation uses dynamic CPU quantum value and takes
full advantage of the trace cache. Each emulated processor will execute
the whole trace before switching to the next processor.
* It is also safe to use large (up to 16 instructions) quantum values for
the SMP emulation now and improve performance even further.
The same merge also completely fixes SF bug :
[3312237] stepN command might be not working properly
Handlers chaining speedups are also supported with SMP emulation now.
2011-09-22 19:38:52 +00:00
Stanislav Shwartsman
f81589c5d6
Don't allow traces longer than cpu_loop can execute
2011-09-21 20:28:29 +00:00
Stanislav Shwartsman
c6d07ae1b5
store modrm() for x87 in Ib() byte because x87 have no Ib()
2011-09-20 06:02:27 +00:00
Stanislav Shwartsman
2583f8549a
small code duplication fix
2011-09-19 20:47:59 +00:00
Stanislav Shwartsman
d489ba3d37
generic cpuid: automatically enable lzcnt of bmi is enabled; sse4a support in cpuid
2011-09-18 18:17:34 +00:00
Stanislav Shwartsman
6fb673b9fa
change BX_PANIC to BX_ERROR
2011-09-18 17:36:54 +00:00
Stanislav Shwartsman
50207eeb90
- Added support for AMD SSE4A emulation, the instructions can be enabled
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using .bochsrc CPUID option.
2011-09-18 16:18:22 +00:00
Stanislav Shwartsman
efc588cf1e
rename avx2_gather.cc -> gather.cc
2011-09-16 20:59:57 +00:00
Stanislav Shwartsman
ea54f40361
keep global pages when needed in INVPCID/INVVPID
2011-09-16 20:52:38 +00:00
Stanislav Shwartsman
3632340dac
improve bochs exit dump in long64 mode
2011-09-16 20:25:05 +00:00
Stanislav Shwartsman
88a58b3781
fixed compilation with x86-64=0
2011-09-16 20:12:36 +00:00
Stanislav Shwartsman
330bf62f61
added INVPCID instruction support
2011-09-16 20:06:23 +00:00
Stanislav Shwartsman
e2f0880f1c
support more than 32-bit cpu features vector
2011-09-14 20:22:24 +00:00
Stanislav Shwartsman
d5fcfabb38
bugfix + update changes
2011-09-13 19:38:09 +00:00
Stanislav Shwartsman
f4dbaf1cd8
re-shuffle macros, no impact in general
2011-09-13 17:55:36 +00:00
Stanislav Shwartsman
02e1a0f23c
Merge lazy flags optimization by Darek Mihocka.
...
I measure slight but consistent speedup of ~1-3% for all guests.
Tested: Windows XP/7 boot 32/64 bit, various Linux live CD
2011-09-12 19:36:53 +00:00
Stanislav Shwartsman
9f1f4781b3
fixed Sandy Bridge name in err message - it is Core i7 and not Core2
2011-09-06 19:49:22 +00:00
Stanislav Shwartsman
939aee87c9
handle special case - BSF/BSR vs TZCNT/LZCNT
2011-09-06 19:18:21 +00:00
Stanislav Shwartsman
184837e0ed
fixed compilation err with no handlers chaining enabled
2011-09-06 15:41:52 +00:00
Stanislav Shwartsman
96cedbc756
continue handlers-chaining optimization: update time once per trace and not for every instruction
2011-09-06 15:35:39 +00:00
Stanislav Shwartsman
e000b61cfd
make RDTSC 'end of trace' instruction - guarantee that any pair ot RDTSC/RDTSCP on same CPU do not belong to same trace (and therefore will always update time and etc) - required for Win7 Thin
2011-09-06 14:13:39 +00:00
Stanislav Shwartsman
5a350143a5
bug fixes
2011-09-06 13:09:45 +00:00
Stanislav Shwartsman
c67338203c
small fixups, code cleanup and reorganization
2011-09-05 17:14:49 +00:00
Stanislav Shwartsman
41f9b25777
fixed avx2 gather instructions
2011-09-04 19:50:18 +00:00
Stanislav Shwartsman
c0f5919787
small optimization
2011-09-03 15:36:40 +00:00
Stanislav Shwartsman
8099fd9efd
implemented alternative access to CR8: AMD feature. Lock CR0 -> CR8
2011-09-03 15:22:56 +00:00
Stanislav Shwartsman
cf56ffb6e0
BSF/BSR should stay, only F3 prefix change opcode
2011-08-31 21:13:50 +00:00
Stanislav Shwartsman
9d18af1207
fixed compilation for AVX OFF
2011-08-31 20:52:53 +00:00
Stanislav Shwartsman
1f5e036695
lzcnt/tzcnt bmi instructions implemented
2011-08-31 20:43:47 +00:00
Stanislav Shwartsman
d2f7351be2
cpu.h cleanup + update msdev workspaces cpudb projects
2011-08-30 22:22:07 +00:00
Stanislav Shwartsman
dfd769a102
- Fixed compilation issue with cpu-level=5
...
- SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors
- CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported
- Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
2011-08-30 22:00:27 +00:00
Stanislav Shwartsman
fb9da23f9b
syscall/sysret are not supported outside long64 mode in Intel CPUs
2011-08-30 21:32:40 +00:00
Stanislav Shwartsman
9693bacacb
syscall/sysret in legacy mode is supported in k6-2. preparing code to it ...
2011-08-30 20:41:00 +00:00
Stanislav Shwartsman
0f73ff39df
bug fix
2011-08-30 19:16:08 +00:00
Stanislav Shwartsman
c30275016e
avx2 added broadcast from register
2011-08-29 21:00:25 +00:00
Stanislav Shwartsman
6bdfbeeffa
fixed for gather VSIB calculation
2011-08-28 20:14:53 +00:00
Stanislav Shwartsman
239c5a449d
added 'locked' information to bxInstruction_c for instrumentation and other future use
2011-08-27 20:09:18 +00:00
Stanislav Shwartsman
44241a1e56
- Added support for AVX and AVX2 instructions emulation, to enable configure
...
with --enable-avx option. When compiled in, AVX still has to be enabled
using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.
- Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
instructions support can be enabled using .bochsrc CPUID option.
2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
d841e82d87
MOVBE instruction exists only in memory form
2011-08-25 21:20:50 +00:00
Stanislav Shwartsman
b3898f4bec
small optimization for PALIGNR instruction
2011-08-25 19:29:33 +00:00
Stanislav Shwartsman
5dde2dc744
fixed typo
2011-08-23 21:56:35 +00:00
Stanislav Shwartsman
fa930961c2
small optimization
2011-08-23 21:25:34 +00:00
Stanislav Shwartsman
4fae848888
just rename variable
2011-08-23 20:27:52 +00:00
Stanislav Shwartsman
002e7a3818
MSR_TSC_AUX is not available without RDTSCP
2011-08-21 19:09:35 +00:00
Stanislav Shwartsman
371dc200fc
Remove the 'trace' debug feature fro the main stream (which now runs with handlers chaining) and this way reduce each handler size.
...
Another 3% speedup on WinXP boot on top of handlers chaining + reduction of Bochs binary size by 45K.
2011-08-21 17:04:21 +00:00
Stanislav Shwartsman
a5e187189a
set max trace length back to 32
2011-08-21 16:44:02 +00:00
Stanislav Shwartsman
1e2e3c8b0e
forgot to merge file
2011-08-21 14:38:33 +00:00
Stanislav Shwartsman
13feb0772a
- 10% emulation speedup with handlers chaining optimization implemented. The
...
feature is enabled by default when configure with --enable-all-optimizations
option, to disable handlers chaining speedups configure with
--disable-handlers-chaining
2011-08-21 14:31:08 +00:00
Stanislav Shwartsman
dd79431702
rename AVX handlers - match their real operands
2011-08-20 15:10:18 +00:00
Volker Ruppert
bfdbf589a0
- removed duplicate 'clean' for cpu/cpudb
...
- added missing 'dist-clean' for cpu/cpudb
2011-08-19 06:31:51 +00:00
Stanislav Shwartsman
542af0dcc1
forgot to add a file
2011-08-18 19:02:16 +00:00
Stanislav Shwartsman
b8b63ac6ea
compile CPUDB to separate library
...
reduce compile-time dependencies
2011-08-18 18:55:22 +00:00
Stanislav Shwartsman
30b94b112b
regen Makefile.in dep
2011-08-18 05:44:54 +00:00
Stanislav Shwartsman
367e8999d6
fixed leaf 0x7 report in cpuid
2011-08-17 21:33:55 +00:00
Stanislav Shwartsman
ed9b8478b5
undo RDTSC commit
2011-08-17 21:13:06 +00:00
Stanislav Shwartsman
165e6f0fdf
separate TSC to uniq feature that can be disabled in CPU configuration
2011-08-17 20:57:44 +00:00
Stanislav Shwartsman
4a3209ae31
Increase cpu param length (exceeded with new icount variable)
...
CHECK_MAX_INSTRUCTIONS is not needed for debugger anymore.
Next step: eliminate it for SMP as well and remove cpu_loop parameter.
2011-08-17 20:00:51 +00:00
Stanislav Shwartsman
b69f728246
Fixed internal debugger part of the bug:
...
#3312237 stepN command might be not working properly
The problem still can be exists for SMP.
2011-08-17 19:51:32 +00:00
Stanislav Shwartsman
86d042a46e
added AVX to msdev workspaces
2011-08-16 20:44:02 +00:00
Stanislav Shwartsman
b0d7ffeb90
fixed compilation
2011-08-16 20:07:34 +00:00
Stanislav Shwartsman
a03e0266fb
added yonah CPUID to cpudb. remove bxversion.h from dep files
2011-08-16 19:58:56 +00:00
Stanislav Shwartsman
0bc93fdc59
added pentium mmx to cpudb. for now only can be enabled when cpu-level=5
2011-08-16 19:04:36 +00:00
Stanislav Shwartsman
6606c62439
cr4 available since Pentium only
2011-08-16 16:49:04 +00:00
Stanislav Shwartsman
e50e187128
#GP on EFER access when not supported
2011-08-14 20:41:46 +00:00
Stanislav Shwartsman
35ec48d17d
small fixes
2011-08-13 18:39:17 +00:00
Stanislav Shwartsman
290d3bf6ad
typofix
2011-08-12 18:09:24 +00:00
Stanislav Shwartsman
8962cfddde
re-definition of x86-64 support, 1st step towards x86-64 enable/disable through .bochsrc
2011-08-12 18:04:56 +00:00
Stanislav Shwartsman
7af5dccdcf
fixed compilation issue
2011-08-11 19:45:21 +00:00
Stanislav Shwartsman
d0344a1b84
added Id Revision to new files
2011-08-11 18:17:45 +00:00
Stanislav Shwartsman
6344c6a719
Added P2 Klamath CPUID + some code reorg again
2011-08-11 18:06:09 +00:00
Stanislav Shwartsman
f15bc6cf75
support for NX outside of x86-64.
...
required for Intel Yonah processor which is another interesting CPUID to be added
also found Via C7 CPUID, looking for the way to add it too
2011-08-10 22:04:33 +00:00
Stanislav Shwartsman
1b27438146
cleanups + small code reorg
2011-08-10 20:31:29 +00:00
Stanislav Shwartsman
360481b391
infastructure for RDMSR/WRMSR control for cpuid class
...
now the order is going to be:
1. MSRs emulated in Bochs (msr.cc)
2. MSRs emulated in model specific derivative class of cpuid_t
3. MSR can be loaded from msrs.def file
4. MSR is not found. We can fault or ignore based on ignore_bad_msrs option
2011-08-09 22:11:56 +00:00
Stanislav Shwartsman
0171324877
small favor to VMX OFF for code that compiled with VMX ON
...
avoid function call when not in vmx guest.
2011-08-09 20:50:51 +00:00
Stanislav Shwartsman
17a94fc58e
warning fixes
2011-08-09 18:00:19 +00:00
Stanislav Shwartsman
c6c94a79da
dos2unix for generic_cpuid.cc
...
fixed xsave leaf CPUID (again)
added one more CPUID configuration: Intel Mobile Core 2 Duo T9600
2011-08-08 18:20:29 +00:00
Stanislav Shwartsman
4476dea8f8
remove redundant code
2011-08-08 05:47:49 +00:00
Stanislav Shwartsman
20becdfbe7
fix compilation errors
2011-08-05 07:22:43 +00:00
Stanislav Shwartsman
2ee0029749
extract ffxsr support to separate CPU feature
2011-08-04 19:02:49 +00:00
Stanislav Shwartsman
b6e37b818d
small changes
2011-08-04 17:35:08 +00:00
Stanislav Shwartsman
1068b4bd8c
cleanup
2011-08-03 21:46:46 +00:00
Stanislav Shwartsman
5ffb201184
fixed CPU leaf 0xD
2011-08-03 21:23:08 +00:00
Stanislav Shwartsman
1adda7bf64
Fixed MWAIT leaf CPUID - required for Fedora15 startup
2011-08-03 20:29:24 +00:00
Stanislav Shwartsman
5451be2676
remove duplicated code
2011-08-03 18:09:07 +00:00
Stanislav Shwartsman
9162c0dc2a
dos2unix
2011-08-03 17:50:23 +00:00
Stanislav Shwartsman
075db389a9
added atom n270 cpuid + small fixes
2011-08-03 17:49:49 +00:00
Stanislav Shwartsman
b9a44a9dbf
added const to all cpudb methods
2011-08-01 18:10:48 +00:00
Stanislav Shwartsman
ea7d5e74ee
fixed cpuid_limit_winnt mode
2011-07-31 21:02:04 +00:00
Stanislav Shwartsman
e958df1333
report 3dnow for amd cpudb machine
2011-07-31 20:19:09 +00:00
Stanislav Shwartsman
bccf330665
typo fix
2011-07-31 20:11:04 +00:00
Stanislav Shwartsman
d84dbcd02b
fixed *x86 ISA extensions that enable this instruction* in ia_opcodes.h
2011-07-31 20:09:04 +00:00
Stanislav Shwartsman
04635ca88b
small fixes
2011-07-31 19:00:56 +00:00
Stanislav Shwartsman
1d89709e62
Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
...
Reimplemented CPUDB using pure C macros magic.
Fixed compilation errors when compiling with SMP on.
2011-07-31 18:43:46 +00:00
Stanislav Shwartsman
6e6db04b8f
Fixed compilation errors, dos2unix, added missed p3_katmai.txt
2011-07-31 14:56:45 +00:00
Stanislav Shwartsman
5e291e0860
Added Athlon64 Clawhammer CPUID to CPUDB
2011-07-30 21:28:16 +00:00
Stanislav Shwartsman
fefa4d5e5b
added PIII Katmai to CPUDB
2011-07-30 14:30:35 +00:00
Stanislav Shwartsman
7a157cf88d
fixed vmexit for xsetbv and getsec
2011-07-30 13:21:31 +00:00
Stanislav Shwartsman
6aaf9297f8
ability to turn off rdtscp
2011-07-30 09:35:20 +00:00
Stanislav Shwartsman
e48765a511
VMX fixed, cleanups
2011-07-29 20:22:35 +00:00
Stanislav Shwartsman
37d8523ab4
fixed compilation with VMX=1
2011-07-29 18:41:17 +00:00
Stanislav Shwartsman
4ac67ec386
compilation when cu_level < 4
2011-07-29 15:24:32 +00:00
Stanislav Shwartsman
919fbd95da
fixed CPUID after correlation with real HW CPUZ output
2011-07-29 15:18:39 +00:00
Stanislav Shwartsman
1a051f9f00
Added several predefined CPUs that can be selected from .bochsrc using new CPU::MODEL option.
...
Selecting CPU MODEL from .bochsrc automatically chooses real HW CPUID and also configures Bochs emulator to emulate this specific CPU including all its features only.
Supported CPUs to choose from:
core2_extreme_x9770
corei7_sandy_bridge_2600K
p4_prescott_celeron_336
2011-07-29 15:03:54 +00:00
Stanislav Shwartsman
74fc3da79d
conditional compile for generic cpuid
2011-07-28 19:20:16 +00:00
Stanislav Shwartsman
5da595e603
fixed OSXSAVE CPUID reporting
2011-07-28 16:38:22 +00:00
Stanislav Shwartsman
6ef7675d03
added new file
2011-07-28 16:21:18 +00:00
Stanislav Shwartsman
6ad0f5ddb2
regenerate dep for CPU
2011-07-28 16:19:30 +00:00
Stanislav Shwartsman
78327d3e5e
First step toward completely configurable CPU.
...
Change CPUID to generic interface which could be chosen from .bochsrc.
Bochs CPU emulation will enable/disable features (like instruction sets) according to CPUID that is selected.
TODO: Add database of CPUID from real hardware CPUs
2011-07-28 16:17:42 +00:00
Stanislav Shwartsman
81f6a283e2
trim cpuid info from save/restore tree
2011-07-27 14:16:51 +00:00
Stanislav Shwartsman
f8e4e7f16b
clean up/fixed instrumentation examples + removed old 2-years old configure options check (deprecated)
2011-07-23 19:58:38 +00:00
Stanislav Shwartsman
d11114ac19
Patch for emulating target with larger memory than host has available by Gary Cameron.
...
The patch was posted in mailing list at Thu 6/16/2011.
Desription for CHANGES:
- Memory
- Added new configure option which enables RAM file backing for large guest
memory with a smaller amount host memory, without causing a panic when
host memory is exhausted (patch by Gary Cameron). To enable configure with
--enable-large-ramfile option.
2011-07-22 17:46:06 +00:00
Stanislav Shwartsman
1e2c7de064
register state for pause-loop exiting
2011-07-22 09:28:31 +00:00
Stanislav Shwartsman
9c3a4b8dab
impemented pause-loop exiting VMX2 control
2011-07-22 09:19:35 +00:00
Stanislav Shwartsman
d1780b66de
typofix
2011-07-21 21:34:56 +00:00
Stanislav Shwartsman
b4118fcbfe
correct natural width VMX field read/write len
2011-07-21 20:58:54 +00:00
Stanislav Shwartsman
a69eeb13f3
move cpuid defs to cpuid.h
2011-07-19 21:14:07 +00:00
Stanislav Shwartsman
cac3c836fa
fixed typo
2011-07-18 21:47:14 +00:00
Stanislav Shwartsman
cddd1e3758
MONITOR/MWAIT: Do monitor on cache line granularity only + bugfix with possible TLB caching of monitored line
2011-07-18 21:44:22 +00:00
Stanislav Shwartsman
f81e47cca2
it is better to handle A20 in paging already
2011-07-18 20:22:59 +00:00
Stanislav Shwartsman
6e993adec7
small cleanup
2011-07-17 19:28:27 +00:00
Stanislav Shwartsman
041605f718
fixed corner case issue with SMP
2011-07-11 17:29:54 +00:00
Stanislav Shwartsman
28a58f4ea5
fix rdtscp code
2011-07-09 22:28:08 +00:00
Stanislav Shwartsman
432bf97197
was playing with SMP and debugger
2011-07-09 22:17:16 +00:00
Stanislav Shwartsman
92c4bd6f2b
forgot to merge file
2011-07-08 14:07:45 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
...
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
82a2ab6325
removed wrongly committed file
2011-07-03 16:05:41 +00:00
Stanislav Shwartsman
909e750549
Implemented VMX preemption timer VMEXIT control (patch by Jianan Hao)
2011-07-03 15:59:48 +00:00
Stanislav Shwartsman
2c168b2855
bugfix
2011-06-28 18:53:20 +00:00
Stanislav Shwartsman
90c4a74362
typo fix
2011-06-28 16:29:11 +00:00
Stanislav Shwartsman
08ba847ce4
fix bug inserted with prev commit + cleanup
2011-06-28 16:04:40 +00:00
Stanislav Shwartsman
f765b9fc58
cleanup
2011-06-27 19:48:13 +00:00
Stanislav Shwartsman
f7c6bd1134
clean code dupication
2011-06-27 19:27:49 +00:00
Stanislav Shwartsman
a1a140682c
cleanup
2011-06-26 20:22:04 +00:00
Stanislav Shwartsman
68f96846fe
no need to define 3b opcodes on < 80x686
2011-06-26 19:39:48 +00:00
Stanislav Shwartsman
87953711b1
cleanup in mmx code
2011-06-26 19:31:42 +00:00
Stanislav Shwartsman
2f582db722
compile less stuff for cpu-level=5
2011-06-26 19:15:30 +00:00
Stanislav Shwartsman
5ef9f8acf8
cleanup
2011-06-26 17:25:25 +00:00
Stanislav Shwartsman
beafa7c88b
improved x86 hw code bp handling
2011-06-24 13:38:34 +00:00
Stanislav Shwartsman
7e57d95364
Fix wrong address translation in debugger
2011-06-24 13:05:36 +00:00
Volker Ruppert
e4fe7f0c8f
- add some symbols required by MSVC for device plugins
2011-06-15 21:55:48 +00:00
Stanislav Shwartsman
31be835056
bugfix + rename function
2011-06-14 19:56:28 +00:00
Stanislav Shwartsman
31914e4a26
fixed compilation with avx off
2011-06-11 20:12:15 +00:00
Stanislav Shwartsman
778154b3b2
one more fix
2011-06-11 18:27:37 +00:00
Stanislav Shwartsman
ef38c9e235
fix decode for VCVTPH2PS
2011-06-11 18:26:05 +00:00
Stanislav Shwartsman
8399dee24c
implemented AVX float16 convert instructions
2011-06-11 13:12:32 +00:00
Stanislav Shwartsman
d7f19bcfd4
optimize sse DAZ feature + optimization for AVX OFF
2011-06-11 12:22:54 +00:00
Stanislav Shwartsman
3f075d1ddf
disasm for invpcid
2011-06-10 12:49:52 +00:00
Stanislav Shwartsman
77e15511be
AVX2 and BMI instructions were published on http://software.intel.com/en-us/avx
2011-06-10 08:46:10 +00:00
Stanislav Shwartsman
acf2175d6d
paging small change
2011-06-03 20:50:55 +00:00
Stanislav Shwartsman
29e3f6e762
remove trace cache disabled mode from the code. next step going to be - introducing new optimization features based on trace cache
2011-06-01 20:34:04 +00:00
Stanislav Shwartsman
04e9254e2c
AMD released new Vol4: 128 and 256 bit vector instructions, dropped SSE4A
2011-05-30 20:15:50 +00:00
Stanislav Shwartsman
1ba77b9f10
fixed defined but not used warnings
2011-05-29 20:42:47 +00:00
Stanislav Shwartsman
0de8b08f24
fixed too few arguments for format warning
2011-05-29 20:09:31 +00:00
Stanislav Shwartsman
5748c6b9f5
first fix for SMEP
2011-05-29 18:08:37 +00:00
Stanislav Shwartsman
ee3f9e36cb
Implemented Supervisor Mode Execution Protection (SMEP)
2011-05-29 16:28:26 +00:00
Stanislav Shwartsman
6ace540891
update for rev39 of Intel SDM
2011-05-28 20:20:25 +00:00
Stanislav Shwartsman
75ec0f835e
small bug fix for 32-bit linear addr wrap
2011-05-27 08:50:38 +00:00
Stanislav Shwartsman
e0160b4f29
ability to turn on/off AVX if compiled in
2011-05-24 20:33:36 +00:00
Stanislav Shwartsman
de95fa8e13
more changes towards configurable cpuid
2011-05-24 18:23:28 +00:00
Stanislav Shwartsman
92bb77ef1d
Merge patch from SF tracker:
...
[3298173] Breakpoint on VMEXIT event by Jianan Hao
Patch description:
The patch provides a new command "vmexitbp" to set breakpoint when VM guest exit. The simulation will be stopped before first HOST mode instruction is executed.
Usage:
Type "vmexitbp" in debugger command window to switch it on/off (similar to modebp).
Currently, the patch has no corresponding interface on GUI debugger. Someone may add it if interested.
2011-05-06 08:19:03 +00:00
Stanislav Shwartsman
a02ddb36d2
undo a change from 2 weeks ago that cause correctness failure
2011-05-06 08:03:45 +00:00
Stanislav Shwartsman
9fbf7d2f15
small cleanups
2011-05-04 05:53:17 +00:00
Stanislav Shwartsman
d440a5eda0
avx bug fix
2011-04-29 23:06:50 +00:00
Stanislav Shwartsman
c44f82f4ac
small cleanup
2011-04-25 20:26:22 +00:00
Stanislav Shwartsman
c3a31d3cf0
applied patch bochs-110423-builtinbswap.patch
2011-04-25 15:20:27 +00:00
Stanislav Shwartsman
a02d8cfe67
cleanups, simplications, copyright updates
2011-04-23 20:39:27 +00:00
Stanislav Shwartsman
4f46b6eab2
bcd flags handling change
2011-04-23 10:49:36 +00:00
Stanislav Shwartsman
610df62e93
fixed segfault with x86-64 disabled
2011-04-22 17:56:27 +00:00
Stanislav Shwartsman
a1b523dacd
warning fix
2011-04-22 15:18:05 +00:00
Stanislav Shwartsman
fb360ac334
bugfix
2011-04-22 07:39:38 +00:00
Stanislav Shwartsman
5230bd27ee
added/fixed comments
2011-04-21 15:51:36 +00:00
Stanislav Shwartsman
024a1ace38
move X2APIC to be .bochsrc option, rework of the cpuid code
2011-04-21 13:27:42 +00:00
Stanislav Shwartsman
1a7d38c28b
bswap optimization patch by Heikki Lindholm + cleanup
2011-04-19 12:48:06 +00:00
Stanislav Shwartsman
9aaeea3fda
remove icache.h code that was added for studies in trace cache
2011-04-15 04:48:37 +00:00
Stanislav Shwartsman
74792e6841
update CHANGES
2011-04-15 04:46:27 +00:00
Stanislav Shwartsman
69b829a935
small fixes
2011-04-12 06:05:31 +00:00
Stanislav Shwartsman
6e79fdfb1e
optimize data hw breakpoint
2011-04-09 05:12:28 +00:00
Stanislav Shwartsman
0de9a5f75d
compilation fix
2011-04-08 16:20:26 +00:00
Volker Ruppert
c78026a9a2
- deleted executable properties from source files
2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
bee5940167
fixed compilation err with trace cache off
2011-04-03 03:43:38 +00:00
Stanislav Shwartsman
734744847e
fix cpuid.h (c)
2011-04-03 03:40:25 +00:00
Stanislav Shwartsman
2b596e1bc4
warning fix
2011-03-27 15:17:38 +00:00
Stanislav Shwartsman
4de76b0571
introduced victim cache for a trace cache structure.
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Allows to significantly cut trace cache miss latenct and find data in victim cahe instead of redoding it
8 entries VC in parallel with direct map 64K entries
2011-03-25 23:06:34 +00:00
Stanislav Shwartsman
f0a3cce1e2
added XSAVEOPT instruction emulation (for now with no state tracking according to Intel docs, just alias it to XSAVE)
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update CHANGES
2011-03-25 20:32:07 +00:00
Stanislav Shwartsman
dd36d3c754
fixed code breakpoint hit
2011-03-24 19:06:58 +00:00
Stanislav Shwartsman
0a88065722
updated instrumentation callbacks
2011-03-22 22:18:40 +00:00
Stanislav Shwartsman
31dd6a70db
small cleanups
2011-03-20 21:16:45 +00:00
Stanislav Shwartsman
7664c55b08
first fixups after AVX
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(and for AVX)
2011-03-20 18:27:31 +00:00
Stanislav Shwartsman
7ced718040
implemented AVX instructions support
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many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
16021a0ddb
rename model_specific.h to be cpuid.h
2011-03-19 17:35:18 +00:00
Stanislav Shwartsman
1aaf596d79
small fixes
2011-03-19 17:19:41 +00:00
Stanislav Shwartsman
96312698f6
fixed typo
2011-03-15 20:31:49 +00:00
Stanislav Shwartsman
6deb746464
do not handle reserved bits yet
2011-03-15 20:22:17 +00:00
Stanislav Shwartsman
63fe52f601
accessors for DR6 and DR7 fields
2011-03-15 20:20:15 +00:00
Stanislav Shwartsman
edd7c2d787
small reorg in cpuid code
2011-03-14 20:28:16 +00:00
Stanislav Shwartsman
acd320699d
small cleanups
2011-03-14 06:25:54 +00:00
Stanislav Shwartsman
aff763349d
Fixed save/restore of segments in real mode (valid bit was corrupted)
2011-03-12 09:56:43 +00:00
Stanislav Shwartsman
93e152ef1a
no need to read ignore_bad_msrs on every reset
2011-03-05 18:54:23 +00:00
Stanislav Shwartsman
3b8903e19d
there is no need to duplicate ignore_bad_msrs in param tree, this knob is loaded from options anyway
2011-03-05 18:47:48 +00:00
Stanislav Shwartsman
2bef4597d6
volatile is redundant here
2011-03-03 19:51:29 +00:00
Stanislav Shwartsman
f600fcf6c1
limit family values for CPUID
2011-02-26 20:50:26 +00:00
Stanislav Shwartsman
acb83acfa7
Fixed decoding of CRC32 instr
2011-02-26 20:43:11 +00:00
Stanislav Shwartsman
c15220bdeb
assertion about misconfigured cpuid family
2011-02-25 17:54:50 +00:00
Stanislav Shwartsman
2d1d41e731
CPUID is not available when cpu-level=3
2011-02-25 16:27:01 +00:00
Stanislav Shwartsman
5a8c57fe65
end trace on setbv instruction
2011-02-25 15:19:12 +00:00
Stanislav Shwartsman
66682a0ba7
added ability to configure CPU family and model through .bochsrc
2011-02-25 15:05:48 +00:00
Stanislav Shwartsman
7d80a6ebe0
Adding Id and Rev property to all files
2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
e4c7e21c2c
added comment (check how SVN updates $Id tag)
2011-02-24 21:34:44 +00:00
Stanislav Shwartsman
d84b2d546d
Update Makefile.in (dep on vmx.h was missed)
2011-02-19 20:01:34 +00:00
Stanislav Shwartsman
57d01889b1
Fixed PCMPGTQ instruction
2011-02-19 11:00:43 +00:00
Stanislav Shwartsman
d8a2736d72
VMX pw loads should ask for RD perm
2011-02-19 08:31:05 +00:00
Stanislav Shwartsman
2d3f3668c7
Fixed IRET 64-bit mode bug
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Support for 32 float copare methods for AVX
ckeanups in fetchdecode
2011-02-13 06:10:11 +00:00
Stanislav Shwartsman
faa8ee63a5
fixes to sse_move.cc
2011-02-11 10:08:42 +00:00
Stanislav Shwartsman
b5ebe5865e
Fixes for incoming bug report, missed changes in CVS, repository fixups and etc
2011-02-11 09:56:23 +00:00
Stanislav Shwartsman
498b591452
quick code reorg that gives 3% speedup
2011-01-26 11:48:13 +00:00