more SVM fixes
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@ -169,7 +169,6 @@ void BX_CPU_C::debug(bx_address offset)
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BX_CPU_THIS_PTR get_PF() ? "PF" : "pf",
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BX_CPU_THIS_PTR get_CF() ? "CF" : "cf"));
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BX_INFO(("| SEG selector base limit G D"));
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BX_INFO(("| SEG sltr(index|ti|rpl) base limit G D"));
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BX_INFO(("| CS:%04x( %04x| %01u| %1u) %08x %08x %1u %1u",
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(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value,
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@ -393,11 +393,6 @@ bx_bool BX_CPU_C::SvmEnterLoadCheckGuestState(void)
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return 0;
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}
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if (guest.cr0.get_NW() && !guest.cr0.get_CD()) {
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BX_ERROR(("VMRUN: Guest CR0.NW is set when CR0.CD is clear"));
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return 0;
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}
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guest.cr2 = vmcb_read64(SVM_GUEST_CR2);
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guest.cr3 = vmcb_read64(SVM_GUEST_CR3);
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@ -431,36 +426,26 @@ bx_bool BX_CPU_C::SvmEnterLoadCheckGuestState(void)
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svm_segment_read(&guest.sregs[n], SVM_GUEST_ES_SELECTOR + n * 0x10);
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}
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// FIXME: patch segment attributes
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if (guest.sregs[BX_SEG_REG_CS].cache.u.segment.d_b && guest.sregs[BX_SEG_REG_CS].cache.u.segment.l) {
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BX_ERROR(("VMRUN: VMCB CS.D_B/L mismatch"));
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return 0;
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}
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if (guest.cr0.get_PE() && (guest.eflags & EFlagsVMMask) == 0) {
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if (! guest.sregs[BX_SEG_REG_CS].cache.valid || ! guest.sregs[BX_SEG_REG_CS].selector.value) {
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BX_ERROR(("VMRUN: VMCB null code segment"));
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return 0;
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if (! guest.cr0.get_PE() || (guest.eflags & EFlagsVMMask) != 0)
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{
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// real or vm8086 mode: make all segments valid
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for (n=0;n < 4; n++) {
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guest.sregs[n].cache.valid = 1;
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}
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if (! guest.sregs[BX_SEG_REG_SS].cache.valid || ! guest.sregs[BX_SEG_REG_SS].selector.value) {
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if (! guest.efer.get_LMA()) {
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BX_ERROR(("VMRUN: VMCB null stack segment in 32-bit mode"));
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return 0;
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}
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}
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}
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else {
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if (! guest.cr0.get_PE() && guest.cr0.get_PG()) {
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// special case : entering paged real mode
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BX_INFO(("VMRUN: entering paged real mode"));
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paged_real_mode = 1;
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guest.cr0.val32 &= ~BX_CR0_PG_MASK;
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}
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// real or vm8086 mode: make all segments valid
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for (n=0;n < 4; n++) {
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guest.sregs[n].cache.valid = 1;
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}
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}
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guest.cpl = vmcb_read8(SVM_GUEST_CPL);
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@ -499,6 +484,9 @@ bx_bool BX_CPU_C::SvmEnterLoadCheckGuestState(void)
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BX_CPU_THIS_PTR cr4.set32(guest.cr4.get32());
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BX_CPU_THIS_PTR cr3 = guest.cr3;
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if (paged_real_mode)
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BX_CPU_THIS_PTR cr0.val32 |= BX_CR0_PG_MASK;
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if (BX_CPU_THIS_PTR cr0.get_PG() && BX_CPU_THIS_PTR cr4.get_PAE() && !long_mode()) {
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if (! CheckPDPTR(BX_CPU_THIS_PTR cr3)) {
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BX_ERROR(("SVM: VMRUN PDPTR check failed !"));
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@ -506,9 +494,6 @@ bx_bool BX_CPU_C::SvmEnterLoadCheckGuestState(void)
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}
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}
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if (paged_real_mode)
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BX_CPU_THIS_PTR cr0.val32 |= BX_CR0_PG_MASK;
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BX_CPU_THIS_PTR dr6.set32(guest.dr6);
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BX_CPU_THIS_PTR dr7.set32(guest.dr7 | 0x400);
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