Fix wrong address translation in debugger
This commit is contained in:
Stanislav Shwartsman
parent
598b15f080
commit
7e57d95364
@ -65,6 +65,7 @@ Bochs repository moved to the SVN version control !
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from the "clock" setting)
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- SF patches applied
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[3327510] Fix wrong address translation in debugger by Jianan Hao
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[3323758] Ctrl-Break support for the Win32 gui by Nikolay Nikolov
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[3316785] Ctrl-Break support for the X11 gui by Nikolay Nikolov
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[3298173] Breakpoint on VMEXIT event by Jianan Hao
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@ -1458,120 +1458,120 @@ bx_bool BX_CPU_C::dbg_translate_guest_physical(bx_phy_address guest_paddr, bx_ph
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bx_bool BX_CPU_C::dbg_xlate_linear2phy(bx_address laddr, bx_phy_address *phy, bx_bool verbose)
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{
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if (! BX_CPU_THIS_PTR cr0.get_PG()) {
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*phy = (bx_phy_address) laddr;
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return 1;
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}
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bx_phy_address paddress;
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bx_phy_address pt_address = BX_CPU_THIS_PTR cr3 & BX_CR3_PAGING_MASK;
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// see if page is in the TLB first
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if (! verbose) {
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bx_address lpf = LPFOf(laddr);
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unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
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if (TLB_LPFOf(tlbEntry->lpf) == lpf) {
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paddress = tlbEntry->ppf | PAGE_OFFSET(laddr);
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*phy = paddress;
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return 1;
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}
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if (! BX_CPU_THIS_PTR cr0.get_PG()) {
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paddress = (bx_phy_address) laddr;
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}
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else {
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bx_phy_address pt_address = BX_CPU_THIS_PTR cr3 & BX_CR3_PAGING_MASK;
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// see if page is in the TLB first
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if (! verbose) {
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bx_address lpf = LPFOf(laddr);
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unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
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if (TLB_LPFOf(tlbEntry->lpf) == lpf) {
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paddress = tlbEntry->ppf | PAGE_OFFSET(laddr);
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*phy = paddress;
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return 1;
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}
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}
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#if BX_CPU_LEVEL >= 6
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if (BX_CPU_THIS_PTR cr4.get_PAE()) {
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Bit64u offset_mask = BX_CONST64(0x0000ffffffffffff);
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if (BX_CPU_THIS_PTR cr4.get_PAE()) {
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Bit64u offset_mask = BX_CONST64(0x0000ffffffffffff);
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int level = 3;
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if (! long_mode()) {
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if (! BX_CPU_THIS_PTR PDPTR_CACHE.valid)
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goto page_fault;
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pt_address = BX_CPU_THIS_PTR PDPTR_CACHE.entry[(laddr >> 30) & 3] & BX_CONST64(0x000ffffffffff000);
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offset_mask >>= 18;
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level = 1;
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}
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int level = 3;
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if (! long_mode()) {
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if (! BX_CPU_THIS_PTR PDPTR_CACHE.valid)
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goto page_fault;
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pt_address = BX_CPU_THIS_PTR PDPTR_CACHE.entry[(laddr >> 30) & 3] & BX_CONST64(0x000ffffffffff000);
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offset_mask >>= 18;
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level = 1;
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}
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for (; level >= 0; --level) {
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Bit64u pte;
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pt_address += ((laddr >> (9 + 9*level)) & 0xff8);
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offset_mask >>= 9;
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for (; level >= 0; --level) {
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Bit64u pte;
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pt_address += ((laddr >> (9 + 9*level)) & 0xff8);
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offset_mask >>= 9;
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#if BX_SUPPORT_VMX >= 2
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if (BX_CPU_THIS_PTR in_vmx_guest) {
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_EPT_ENABLE)) {
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if (! dbg_translate_guest_physical(pt_address, &pt_address, verbose))
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goto page_fault;
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if (BX_CPU_THIS_PTR in_vmx_guest) {
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_EPT_ENABLE)) {
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if (! dbg_translate_guest_physical(pt_address, &pt_address, verbose))
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goto page_fault;
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}
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}
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}
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#endif
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BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, pt_address, 8, &pte);
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BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, pt_address, 8, &pte);
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#if BX_DEBUGGER
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if (verbose)
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dbg_print_paging_pte(level, pte);
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if (verbose)
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dbg_print_paging_pte(level, pte);
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#endif
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if(!(pte & 1))
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goto page_fault;
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if (pte & BX_PAGING_PHY_ADDRESS_RESERVED_BITS)
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goto page_fault;
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pt_address = bx_phy_address(pte & BX_CONST64(0x000ffffffffff000));
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if (level == BX_LEVEL_PTE) break;
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if (pte & 0x80) {
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// 2M page
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if (level == BX_LEVEL_PDE) {
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pt_address &= BX_CONST64(0x000fffffffffe000);
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if (pt_address & offset_mask)
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goto page_fault;
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break;
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if(!(pte & 1))
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goto page_fault;
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if (pte & BX_PAGING_PHY_ADDRESS_RESERVED_BITS)
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goto page_fault;
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pt_address = bx_phy_address(pte & BX_CONST64(0x000ffffffffff000));
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if (level == BX_LEVEL_PTE) break;
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if (pte & 0x80) {
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// 2M page
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if (level == BX_LEVEL_PDE) {
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pt_address &= BX_CONST64(0x000fffffffffe000);
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if (pt_address & offset_mask)
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goto page_fault;
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break;
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}
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// 1G page
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if (bx_cpuid_support_1g_paging() && level == BX_LEVEL_PDPE && long_mode()) {
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pt_address &= BX_CONST64(0x000fffffffffe000);
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if (pt_address & offset_mask)
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goto page_fault;
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break;
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}
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goto page_fault;
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}
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// 1G page
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if (bx_cpuid_support_1g_paging() && level == BX_LEVEL_PDPE && long_mode()) {
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pt_address &= BX_CONST64(0x000fffffffffe000);
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if (pt_address & offset_mask)
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goto page_fault;
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break;
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}
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goto page_fault;
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}
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paddress = pt_address + (bx_phy_address)(laddr & offset_mask);
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}
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paddress = pt_address + (bx_phy_address)(laddr & offset_mask);
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}
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else // not PAE
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else // not PAE
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#endif
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{
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Bit32u offset_mask = 0xfff;
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for (int level = 1; level >= 0; --level) {
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Bit32u pte;
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pt_address += ((laddr >> (10 + 10*level)) & 0xffc);
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{
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Bit32u offset_mask = 0xfff;
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for (int level = 1; level >= 0; --level) {
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Bit32u pte;
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pt_address += ((laddr >> (10 + 10*level)) & 0xffc);
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#if BX_SUPPORT_VMX >= 2
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if (BX_CPU_THIS_PTR in_vmx_guest) {
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_EPT_ENABLE)) {
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if (! dbg_translate_guest_physical(pt_address, &pt_address, verbose))
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goto page_fault;
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if (BX_CPU_THIS_PTR in_vmx_guest) {
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_EPT_ENABLE)) {
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if (! dbg_translate_guest_physical(pt_address, &pt_address, verbose))
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goto page_fault;
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}
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}
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}
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#endif
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BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, pt_address, 4, &pte);
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BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, pt_address, 4, &pte);
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#if BX_DEBUGGER
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if (verbose)
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dbg_print_paging_pte(level, pte);
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if (verbose)
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dbg_print_paging_pte(level, pte);
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#endif
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if (!(pte & 1))
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goto page_fault;
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pt_address = pte & 0xfffff000;
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if (!(pte & 1))
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goto page_fault;
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pt_address = pte & 0xfffff000;
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#if BX_CPU_LEVEL >= 6
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if (level == BX_LEVEL_PDE && (pte & 0x80) != 0 && BX_CPU_THIS_PTR cr4.get_PSE()) {
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offset_mask = 0x3fffff;
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pt_address = pte & 0xffc00000;
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if (level == BX_LEVEL_PDE && (pte & 0x80) != 0 && BX_CPU_THIS_PTR cr4.get_PSE()) {
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offset_mask = 0x3fffff;
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pt_address = pte & 0xffc00000;
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#if BX_PHY_ADDRESS_WIDTH > 32
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pt_address += ((bx_phy_address)(pte & 0x003fe000)) << 19;
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pt_address += ((bx_phy_address)(pte & 0x003fe000)) << 19;
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#endif
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break;
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}
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#endif
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break;
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}
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#endif
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paddress = pt_address + (bx_phy_address)(laddr & offset_mask);
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}
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paddress = pt_address + (bx_phy_address)(laddr & offset_mask);
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}
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#if BX_SUPPORT_VMX >= 2
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if (BX_CPU_THIS_PTR in_vmx_guest) {
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_EPT_ENABLE)) {
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