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small code duplication fix

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This commit is contained in:
Stanislav Shwartsman 2011-09-19 20:47:59 +00:00
parent d489ba3d37
commit 2583f8549a
4 changed files with 44 additions and 44 deletions
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12
bochs/cpu/avx_pfp.cc
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@ -787,8 +787,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VMINSS_VssHpsWssR(bxInstruction_c
op2 = float32_denormal_to_zero(op2);
}
int rc = float32_compare(op1.xmm32u(0), op2, status);
op1.xmm32u(0) = (rc == float_relation_less) ? op1.xmm32u(0) : op2;
op1.xmm32u(0) = float32_min(op1.xmm32u(0), op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_CLEAR_HIGH(i->nnn(), op1);
@ -811,8 +810,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VMINSD_VsdHpdWsdR(bxInstruction_c
op2 = float64_denormal_to_zero(op2);
}
int rc = float64_compare(op1.xmm64u(0), op2, status);
op1.xmm64u(0) = (rc == float_relation_less) ? op1.xmm64u(0) : op2;
op1.xmm64u(0) = float64_min(op1.xmm64u(0), op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_CLEAR_HIGH(i->nnn(), op1);
@ -959,8 +957,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VMAXSS_VssHpsWssR(bxInstruction_c
op2 = float32_denormal_to_zero(op2);
}
int rc = float32_compare(op1.xmm32u(0), op2, status);
op1.xmm32u(0) = (rc == float_relation_greater) ? op1.xmm32u(0) : op2;
op1.xmm32u(0) = float32_max(op1.xmm32u(0), op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_CLEAR_HIGH(i->nnn(), op1);
@ -983,8 +980,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VMAXSD_VsdHpdWsdR(bxInstruction_c
op2 = float64_denormal_to_zero(op2);
}
int rc = float64_compare(op1.xmm64u(0), op2, status);
op1.xmm64u(0) = (rc == float_relation_greater) ? op1.xmm64u(0) : op2;
op1.xmm64u(0) = float64_max(op1.xmm64u(0), op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_CLEAR_HIGH(i->nnn(), op1);

36
bochs/cpu/simd_pfp.h
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@ -275,14 +275,10 @@ BX_CPP_INLINE void sse_minps(BxPackedXmmRegister *op1, BxPackedXmmRegister *op2,
op2->xmm32u(3) = float32_denormal_to_zero(op2->xmm32u(3));
}
int rc = float32_compare(op1->xmm32u(0), op2->xmm32u(0), status);
op1->xmm32u(0) = (rc == float_relation_less) ? op1->xmm32u(0) : op2->xmm32u(0);
rc = float32_compare(op1->xmm32u(1), op2->xmm32u(1), status);
op1->xmm32u(1) = (rc == float_relation_less) ? op1->xmm32u(1) : op2->xmm32u(1);
rc = float32_compare(op1->xmm32u(2), op2->xmm32u(2), status);
op1->xmm32u(2) = (rc == float_relation_less) ? op1->xmm32u(2) : op2->xmm32u(2);
rc = float32_compare(op1->xmm32u(3), op2->xmm32u(3), status);
op1->xmm32u(3) = (rc == float_relation_less) ? op1->xmm32u(3) : op2->xmm32u(3);
op1->xmm32u(0) = float32_min(op1->xmm32u(0), op2->xmm32u(0), status);
op1->xmm32u(1) = float32_min(op1->xmm32u(1), op2->xmm32u(1), status);
op1->xmm32u(2) = float32_min(op1->xmm32u(2), op2->xmm32u(2), status);
op1->xmm32u(3) = float32_min(op1->xmm32u(3), op2->xmm32u(3), status);
}
BX_CPP_INLINE void sse_minpd(BxPackedXmmRegister *op1, BxPackedXmmRegister *op2, float_status_t &status, bx_bool mxcsr_daz)
@ -294,10 +290,8 @@ BX_CPP_INLINE void sse_minpd(BxPackedXmmRegister *op1, BxPackedXmmRegister *op2,
op2->xmm64u(1) = float64_denormal_to_zero(op2->xmm64u(1));
}
int rc = float64_compare(op1->xmm64u(0), op2->xmm64u(0), status);
op1->xmm64u(0) = (rc == float_relation_less) ? op1->xmm64u(0) : op2->xmm64u(0);
rc = float64_compare(op1->xmm64u(1), op2->xmm64u(1), status);
op1->xmm64u(1) = (rc == float_relation_less) ? op1->xmm64u(1) : op2->xmm64u(1);
op1->xmm64u(0) = float64_min(op1->xmm64u(0), op2->xmm64u(0), status);
op1->xmm64u(1) = float64_min(op1->xmm64u(1), op2->xmm64u(1), status);
}
BX_CPP_INLINE void sse_maxps(BxPackedXmmRegister *op1, BxPackedXmmRegister *op2, float_status_t &status, bx_bool mxcsr_daz)
@ -314,14 +308,10 @@ BX_CPP_INLINE void sse_maxps(BxPackedXmmRegister *op1, BxPackedXmmRegister *op2,
op2->xmm32u(3) = float32_denormal_to_zero(op2->xmm32u(3));
}
int rc = float32_compare(op1->xmm32u(0), op2->xmm32u(0), status);
op1->xmm32u(0) = (rc == float_relation_greater) ? op1->xmm32u(0) : op2->xmm32u(0);
rc = float32_compare(op1->xmm32u(1), op2->xmm32u(1), status);
op1->xmm32u(1) = (rc == float_relation_greater) ? op1->xmm32u(1) : op2->xmm32u(1);
rc = float32_compare(op1->xmm32u(2), op2->xmm32u(2), status);
op1->xmm32u(2) = (rc == float_relation_greater) ? op1->xmm32u(2) : op2->xmm32u(2);
rc = float32_compare(op1->xmm32u(3), op2->xmm32u(3), status);
op1->xmm32u(3) = (rc == float_relation_greater) ? op1->xmm32u(3) : op2->xmm32u(3);
op1->xmm32u(0) = float32_max(op1->xmm32u(0), op2->xmm32u(0), status);
op1->xmm32u(1) = float32_max(op1->xmm32u(1), op2->xmm32u(1), status);
op1->xmm32u(2) = float32_max(op1->xmm32u(2), op2->xmm32u(2), status);
op1->xmm32u(3) = float32_max(op1->xmm32u(3), op2->xmm32u(3), status);
}
BX_CPP_INLINE void sse_maxpd(BxPackedXmmRegister *op1, BxPackedXmmRegister *op2, float_status_t &status, bx_bool mxcsr_daz)
@ -333,10 +323,8 @@ BX_CPP_INLINE void sse_maxpd(BxPackedXmmRegister *op1, BxPackedXmmRegister *op2,
op2->xmm64u(1) = float64_denormal_to_zero(op2->xmm64u(1));
}
int rc = float64_compare(op1->xmm64u(0), op2->xmm64u(0), status);
op1->xmm64u(0) = (rc == float_relation_greater) ? op1->xmm64u(0) : op2->xmm64u(0);
rc = float64_compare(op1->xmm64u(1), op2->xmm64u(1), status);
op1->xmm64u(1) = (rc == float_relation_greater) ? op1->xmm64u(1) : op2->xmm64u(1);
op1->xmm64u(0) = float64_max(op1->xmm64u(0), op2->xmm64u(0), status);
op1->xmm64u(1) = float64_max(op1->xmm64u(1), op2->xmm64u(1), status);
}
#endif

20
bochs/cpu/sse_pfp.cc
View File

@ -1460,10 +1460,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MINSD_VsdWsdR(bxInstruction_c *i)
op2 = float64_denormal_to_zero(op2);
}
int rc = float64_compare(op1, op2, status);
op1 = float64_min(op1, op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(),
(rc == float_relation_less) ? op1 : op2);
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
#endif
BX_NEXT_INSTR(i);
@ -1488,10 +1487,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MINSS_VssWssR(bxInstruction_c *i)
op2 = float32_denormal_to_zero(op2);
}
int rc = float32_compare(op1, op2, status);
op1 = float32_min(op1, op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(),
(rc == float_relation_less) ? op1 : op2);
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
#endif
BX_NEXT_INSTR(i);
@ -1654,10 +1652,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MAXSD_VsdWsdR(bxInstruction_c *i)
op2 = float64_denormal_to_zero(op2);
}
int rc = float64_compare(op1, op2, status);
op1 = float64_max(op1, op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(),
(rc == float_relation_greater) ? op1 : op2);
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
#endif
BX_NEXT_INSTR(i);
@ -1682,10 +1679,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MAXSS_VssWssR(bxInstruction_c *i)
op2 = float32_denormal_to_zero(op2);
}
int rc = float32_compare(op1, op2, status);
op1 = float32_max(op1, op2, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(),
(rc == float_relation_greater) ? op1 : op2);
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
#endif
BX_NEXT_INSTR(i);

20
bochs/fpu/softfloat.h
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@ -226,6 +226,16 @@ int float32_is_signaling_nan(float32);
int float32_is_nan(float32);
int float32_is_denormal(float32);
BX_CPP_INLINE float32 float32_min(float32 a, float32 b, float_status_t &status)
{
return (float32_compare(a, b, status) == float_relation_less) ? a : b;
}
BX_CPP_INLINE float32 float32_max(float32 a, float32 b, float_status_t &status)
{
return (float32_compare(a, b, status) == float_relation_greater) ? a : b;
}
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision conversion routines.
*----------------------------------------------------------------------------*/
@ -253,6 +263,16 @@ int float64_is_signaling_nan(float64);
int float64_is_nan(float64);
int float64_is_denormal(float64);
BX_CPP_INLINE float64 float64_min(float64 a, float64 b, float_status_t &status)
{
return (float64_compare(a, b, status) == float_relation_less) ? a : b;
}
BX_CPP_INLINE float64 float64_max(float64 a, float64 b, float_status_t &status)
{
return (float64_compare(a, b, status) == float_relation_greater) ? a : b;
}
#ifdef FLOAT16
float32 float16_to_float32(float16, float_status_t &status);
float16 float32_to_float16(float32, float_status_t &status);