MXCSR.FUZ is ignoired for F16 instructions
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@ -1339,6 +1339,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPH2PS_VpsWpsR(bxInstruction_c
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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status.flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
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for (unsigned n=0; n < (4*len); n++) {
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result.avx32u(n) = float16_to_float32(op.xmm16u(n), status);
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@ -1365,6 +1366,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPS2PH_WpsVpsIb(bxInstruction_c
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Bit8u control = i->Ib();
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status.flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
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// override MXCSR rounding mode with control coming from imm8
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if ((control & 0x4) == 0)
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status.float_rounding_mode = control & 0x3;
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