fixed FMA4 instructions sources

This commit is contained in:
Stanislav Shwartsman 2012-03-06 15:18:35 +00:00
parent baee102fa2
commit 562c8c91d1
2 changed files with 17 additions and 17 deletions

View File

@ -1193,13 +1193,13 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VFNMSUB231SS_VpsHssWssR(bxInstruct
{ \
BxPackedAvxRegister op1 = BX_READ_AVX_REG(i->vvv()), op2, op3; \
if (i->getVexW()) { \
op2 = BX_READ_AVX_REG(i->rm()); \
op3 = BX_READ_AVX_REG(i->Ib()); \
} \
else { \
op2 = BX_READ_AVX_REG(i->Ib()); \
op3 = BX_READ_AVX_REG(i->rm()); \
} \
else { \
op2 = BX_READ_AVX_REG(i->rm()); \
op3 = BX_READ_AVX_REG(i->Ib()); \
} \
unsigned len = i->getVL(); \
\
float_status_t status; \
@ -1238,20 +1238,21 @@ FMA4_OP_VECTOR(VFNMSUBPD_VpdHpdWpdVIbR, fnmsubpd)
{ \
float32 op1 = BX_READ_XMM_REG_LO_DWORD(i->vvv()), op2, op3; \
if (i->getVexW()) { \
op2 = BX_READ_XMM_REG_LO_DWORD(i->rm()); \
op3 = BX_READ_XMM_REG_LO_DWORD(i->Ib()); \
} \
else { \
op2 = BX_READ_XMM_REG_LO_DWORD(i->Ib()); \
op3 = BX_READ_XMM_REG_LO_DWORD(i->rm()); \
} \
\
else { \
op2 = BX_READ_XMM_REG_LO_DWORD(i->rm()); \
op3 = BX_READ_XMM_REG_LO_DWORD(i->Ib()); \
} \
BxPackedXmmRegister dest; \
dest.xmm64u(0) = dest.xmm64u(1) = 0; \
\
float_status_t status; \
mxcsr_to_softfloat_status_word(status, MXCSR); \
dest.xmm32u(0) = (func)(op1, op2, op3, status); \
\
dest.xmm64u(0) = (func)(op1, op2, op3, status); \
dest.xmm64u(1) = 0; \
\
check_exceptionsSSE(status.float_exception_flags); \
\
BX_WRITE_XMM_REG_CLEAR_HIGH(i->nnn(), dest); \
@ -1270,13 +1271,13 @@ FMA4_SINGLE_SCALAR(VFNMSUBSS_VssHssWssVIbR, float32_fnmsub)
{ \
float64 op1 = BX_READ_XMM_REG_LO_QWORD(i->vvv()), op2, op3; \
if (i->getVexW()) { \
op2 = BX_READ_XMM_REG_LO_QWORD(i->rm()); \
op3 = BX_READ_XMM_REG_LO_QWORD(i->Ib()); \
} \
else { \
op2 = BX_READ_XMM_REG_LO_QWORD(i->Ib()); \
op3 = BX_READ_XMM_REG_LO_QWORD(i->rm()); \
} \
else { \
op2 = BX_READ_XMM_REG_LO_QWORD(i->rm()); \
op3 = BX_READ_XMM_REG_LO_QWORD(i->Ib()); \
} \
BxPackedXmmRegister dest; \
\
float_status_t status; \

View File

@ -674,8 +674,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VFRCZSS_VssWssR(bxInstruction_c *i
float_status_t status;
mxcsr_to_softfloat_status_word(status, MXCSR);
r.xmm32u(0) = float32_frc(op, status);
r.xmm32u(1) = 0;
r.xmm64u(0) = (Bit64u) float32_frc(op, status);
r.xmm64u(1) = 0;
check_exceptionsSSE(status.float_exception_flags);