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cleaned up code duplication in CPUDB classes

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This commit is contained in:
Stanislav Shwartsman 2012-01-07 17:06:03 +00:00
parent a804adac46
commit 7defa74261
21 changed files with 19 additions and 179 deletions
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13
bochs/cpu/cpudb/atom_n270.cc
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@ -30,15 +30,6 @@
#if BX_CPU_LEVEL >= 6
atom_n270_t::atom_n270_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
}
void atom_n270_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const
{
static bx_bool cpuid_limit_winnt = SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
@ -180,11 +171,7 @@ void atom_n270_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

8
bochs/cpu/cpudb/atom_n270.h
View File

@ -30,7 +30,7 @@
class atom_n270_t : public bx_cpuid_t {
public:
atom_n270_t(BX_CPU_C *cpu);
atom_n270_t(BX_CPU_C *cpu): bx_cpuid_t(cpu) {}
virtual ~atom_n270_t() {}
// return CPU name
@ -44,12 +44,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

10
bochs/cpu/cpudb/core2_penryn_t9600.cc
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@ -32,12 +32,6 @@
core2_penryn_t9600_t::core2_penryn_t9600_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
if (! BX_SUPPORT_X86_64)
BX_PANIC(("You must enable x86-64 for Intel Mobile Core2 Duo T9600 (Penryn) configuration"));
}
@ -225,11 +219,7 @@ void core2_penryn_t9600_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

6
bochs/cpu/cpudb/core2_penryn_t9600.h
View File

@ -47,12 +47,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

13
bochs/cpu/cpudb/core_duo_t2400_yonah.cc
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@ -30,15 +30,6 @@
#if BX_CPU_LEVEL >= 6
core_duo_t2400_yonah_t::core_duo_t2400_yonah_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
}
void core_duo_t2400_yonah_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const
{
static bx_bool cpuid_limit_winnt = SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
@ -178,11 +169,7 @@ void core_duo_t2400_yonah_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

8
bochs/cpu/cpudb/core_duo_t2400_yonah.h
View File

@ -30,7 +30,7 @@
class core_duo_t2400_yonah_t : public bx_cpuid_t {
public:
core_duo_t2400_yonah_t(BX_CPU_C *cpu);
core_duo_t2400_yonah_t(BX_CPU_C *cpu): bx_cpuid_t(cpu) {}
virtual ~core_duo_t2400_yonah_t() {}
// return CPU name
@ -47,12 +47,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

10
bochs/cpu/cpudb/corei5_arrandale_m520.cc
View File

@ -32,12 +32,6 @@
corei5_arrandale_m520_t::corei5_arrandale_m520_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
if (! BX_SUPPORT_X86_64)
BX_PANIC(("You must enable x86-64 for Intel Core i5 M 520 (Arrandale) configuration"));
@ -241,11 +235,7 @@ void corei5_arrandale_m520_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

6
bochs/cpu/cpudb/corei5_arrandale_m520.h
View File

@ -47,12 +47,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

10
bochs/cpu/cpudb/corei5_lynnfield_750.cc
View File

@ -32,12 +32,6 @@
corei5_lynnfield_750_t::corei5_lynnfield_750_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
if (! BX_SUPPORT_X86_64)
BX_PANIC(("You must enable x86-64 for Intel Core i5 750 (Lynnfield) configuration"));
@ -219,11 +213,7 @@ void corei5_lynnfield_750_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

6
bochs/cpu/cpudb/corei5_lynnfield_750.h
View File

@ -47,12 +47,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

10
bochs/cpu/cpudb/corei7_sandy_bridge_2600K.cc
View File

@ -32,12 +32,6 @@
corei7_sandy_bridge_2600k_t::corei7_sandy_bridge_2600k_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
if (! BX_SUPPORT_X86_64)
BX_PANIC(("You must enable x86-64 for Intel Core i7 Sandy Bridge configuration"));
@ -256,11 +250,7 @@ void corei7_sandy_bridge_2600k_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) c
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

6
bochs/cpu/cpudb/corei7_sandy_bridge_2600K.h
View File

@ -47,12 +47,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

10
bochs/cpu/cpudb/p4_prescott_celeron_336.cc
View File

@ -32,12 +32,6 @@
p4_prescott_celeron_336_t::p4_prescott_celeron_336_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
if (! BX_SUPPORT_X86_64)
BX_PANIC(("You must enable x86-64 for P4 (Prescott) configuration"));
}
@ -158,11 +152,7 @@ void p4_prescott_celeron_336_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) con
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

6
bochs/cpu/cpudb/p4_prescott_celeron_336.h
View File

@ -44,12 +44,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

13
bochs/cpu/cpudb/p4_willamette.cc
View File

@ -30,15 +30,6 @@
#if BX_CPU_LEVEL >= 6
p4_willamette_t::p4_willamette_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
}
void p4_willamette_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const
{
switch(function) {
@ -134,11 +125,7 @@ void p4_willamette_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC

8
bochs/cpu/cpudb/p4_willamette.h
View File

@ -30,7 +30,7 @@
class p4_willamette_t : public bx_cpuid_t {
public:
p4_willamette_t(BX_CPU_C *cpu);
p4_willamette_t(BX_CPU_C *cpu): bx_cpuid_t(cpu) {}
virtual ~p4_willamette_t() {}
// return CPU name
@ -44,12 +44,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;

14
bochs/cpu/cpudb/turion64_tyler.cc
View File

@ -32,12 +32,6 @@
turion64_tyler_t::turion64_tyler_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#endif
if (! BX_SUPPORT_X86_64)
BX_PANIC(("You must enable x86-64 for Turion64 configuration"));
@ -167,11 +161,7 @@ void turion64_tyler_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [23:16] Number of logical processors in one physical processor
// [31:24] Local Apic ID
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
(n_logical_processors << 16);
#if BX_SUPPORT_APIC
@ -483,11 +473,7 @@ void turion64_tyler_t::get_ext_cpuid_leaf_8(cpuid_function_t *leaf) const
// virtual & phys address size in low 2 bytes.
leaf->eax = BX_PHY_ADDRESS_WIDTH | (BX_LIN_ADDRESS_WIDTH << 8);
leaf->ebx = 0;
#if BX_SUPPORT_SMP
leaf->ecx = ncores - 1;
#else
leaf->ecx = 0;
#endif
leaf->edx = 0;
}

6
bochs/cpu/cpudb/turion64_tyler.h
View File

@ -44,12 +44,6 @@ public:
virtual void dump_cpuid(void) const;
private:
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;

6
bochs/cpu/cpuid.h
View File

@ -33,7 +33,7 @@ struct cpuid_function_t {
class bx_cpuid_t {
public:
bx_cpuid_t(BX_CPU_C *_cpu): cpu(_cpu) {}
bx_cpuid_t(BX_CPU_C *_cpu);
virtual ~bx_cpuid_t() {}
// return CPU name
@ -60,6 +60,10 @@ public:
protected:
BX_CPU_C *cpu;
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
void get_reserved_leaf(cpuid_function_t *leaf) const
{
leaf->eax = 0;

23
bochs/cpu/generic_cpuid.cc
View File

@ -28,16 +28,23 @@
#define LOG_THIS cpu->
#if BX_CPU_LEVEL >= 4
bx_generic_cpuid_t::bx_generic_cpuid_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
bx_cpuid_t::bx_cpuid_t(BX_CPU_C *_cpu): cpu(_cpu)
{
#if BX_SUPPORT_SMP
nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
#else
nthreads = 1;
ncores = 1;
nprocessors = 1;
#endif
}
#if BX_CPU_LEVEL >= 4
bx_generic_cpuid_t::bx_generic_cpuid_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
{
init_isa_extensions_bitmask();
init_cpu_extensions_bitmask();
@ -206,11 +213,7 @@ void bx_generic_cpuid_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_CLFLUSH)) {
leaf->ebx |= (CACHE_LINE_SIZE / 8) << 8;
}
#if BX_SUPPORT_SMP
unsigned n_logical_processors = ncores*nthreads;
#else
unsigned n_logical_processors = 1;
#endif
leaf->ebx |= (n_logical_processors << 16);
#if BX_SUPPORT_APIC
leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
@ -1323,11 +1326,7 @@ Bit32u bx_generic_cpuid_t::get_std_cpuid_features(void) const
features |= BX_CPUID_STD_SELF_SNOOP;
#endif
#if BX_SUPPORT_SMP
// Intel(R) HyperThreading Technology
if (SIM->get_param_num(BXPN_CPU_NTHREADS)->get() > 1)
features |= BX_CPUID_STD_HT;
#endif
features |= BX_CPUID_STD_HT;
return features;
}

6
bochs/cpu/generic_cpuid.h
View File

@ -68,12 +68,6 @@ private:
Bit32u svm_extensions_bitmask;
#endif
#if BX_SUPPORT_SMP
unsigned nprocessors;
unsigned ncores;
unsigned nthreads;
#endif
unsigned max_std_leaf;
unsigned max_ext_leaf;