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fix decode for VCVTPH2PS

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This commit is contained in:
Stanislav Shwartsman 2011-06-11 18:26:05 +00:00
parent 61bd4023f6
commit ef38c9e235
4 changed files with 5 additions and 5 deletions
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2
bochs/cpu/avx_pfp.cc
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@ -1644,7 +1644,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VDPPS_VpsWpsIbR(bxInstruction_c *i)
}
/* Opcode: VEX.66.0F.3A.13 (VEX.W=0) */
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPH2PS_VpsWpsIbR(bxInstruction_c *i)
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPH2PS_VpsWpsR(bxInstruction_c *i)
{
BxPackedAvxRegister result;
BxPackedXmmRegister op = BX_READ_XMM_REG(i->rm());

2
bochs/cpu/cpu.h
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@ -2501,7 +2501,7 @@ public: // for now...
BX_SMF void VMASKMOVPS_MpsVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF void VMASKMOVPD_MpdVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF void VCVTPH2PS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF void VCVTPH2PS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF void VCVTPS2PH_WpsVpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
#endif

4
bochs/cpu/fetchdecode_avx.h
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@ -678,7 +678,7 @@ static const BxOpcodeInfo_t BxOpcodeTableAVX[256*3] = {
/* 10 */ { 0, BX_IA_ERROR },
/* 11 */ { 0, BX_IA_ERROR },
/* 12 */ { 0, BX_IA_ERROR },
/* 13 */ { 0, BX_IA_ERROR },
/* 13 */ { BxPrefixSSE66 | BxVexW0 | BxImmediate_Ib, BX_IA_VCVTPH2PS_VpsWps },
/* 14 */ { 0, BX_IA_ERROR },
/* 15 */ { 0, BX_IA_ERROR },
/* 16 */ { 0, BX_IA_ERROR },
@ -936,7 +936,7 @@ static const BxOpcodeInfo_t BxOpcodeTableAVX[256*3] = {
/* 10 */ { 0, BX_IA_ERROR },
/* 11 */ { 0, BX_IA_ERROR },
/* 12 */ { 0, BX_IA_ERROR },
/* 13 */ { BxPrefixSSE66 | BxVexW0 | BxImmediate_Ib, BX_IA_VCVTPH2PS_VpsWpsIb },
/* 13 */ { 0, BX_IA_ERROR },
/* 14 */ { BxPrefixSSE66 | BxImmediate_Ib, BX_IA_VPEXTRB_EbdVdqIb },
/* 15 */ { BxPrefixSSE66 | BxImmediate_Ib, BX_IA_VPEXTRW_EwdVdqIb },
/* 16 */ { BxSplitVexW | BxImmediate_Ib, BX_IA_ERROR, BxOpcodeInfoAVX_VexW_0f3a16 },

2
bochs/cpu/ia_opcodes.h
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@ -1646,7 +1646,7 @@ bx_define_opcode(BX_IA_VPINSRQ_VdqEqIb, &BX_CPU_C::PINSRD_VdqEdIbM, &BX_CPU_C::P
bx_define_opcode(BX_IA_VMOVQ_VdqEq, &BX_CPU_C::MOVQ_VqWqM, &BX_CPU_C::MOVQ_VdqEqR, BX_CPU_AVX | BX_CPU_X86_64, BX_PREPARE_AVX | BX_VEX_L128)
bx_define_opcode(BX_IA_VMOVQ_EqVq, &BX_CPU_C::MOVLPS_MqVps, &BX_CPU_C::MOVQ_EqVqR, BX_CPU_AVX | BX_CPU_X86_64, BX_PREPARE_AVX | BX_VEX_L128)
bx_define_opcode(BX_IA_VCVTPH2PS_VpsWpsIb, &BX_CPU_C::LOAD_VectorQ, &BX_CPU_C::VCVTPH2PS_VpsWpsIbR, BX_CPU_AVX_F16C, BX_PREPARE_AVX | BX_VEX_NO_VVV | BX_VEX_L128 | BX_VEX_L256)
bx_define_opcode(BX_IA_VCVTPH2PS_VpsWps, &BX_CPU_C::LOAD_VectorQ, &BX_CPU_C::VCVTPH2PS_VpsWpsR, BX_CPU_AVX_F16C, BX_PREPARE_AVX | BX_VEX_NO_VVV | BX_VEX_L128 | BX_VEX_L256)
bx_define_opcode(BX_IA_VCVTPS2PH_WpsVpsIb, &BX_CPU_C::VCVTPS2PH_WpsVpsIb, &BX_CPU_C::VCVTPS2PH_WpsVpsIb, BX_CPU_AVX_F16C, BX_PREPARE_AVX | BX_VEX_NO_VVV | BX_VEX_L128 | BX_VEX_L256)
#endif
// AVX