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fixed compilation err ith cpu-level=5 and cleanups

This commit is contained in:
Stanislav Shwartsman 2012-01-09 20:52:15 +00:00
parent 87b1c31495
commit 8d698c7087
5 changed files with 10 additions and 19 deletions
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3
bochs/cpu/flag_ctrl_pro.cc
View File

@ -72,8 +72,7 @@ BX_CPU_C::writeEFlags(Bit32u flags, Bit32u changeMask)
// Screen out changing of any unsupported bits.
changeMask &= supportMask;
Bit32u newEFlags = (BX_CPU_THIS_PTR read_eflags() & ~changeMask) |
(flags & changeMask);
Bit32u newEFlags = (read_eflags() & ~changeMask) | (flags & changeMask);
setEFlags(newEFlags);
}

16
bochs/cpu/generic_cpuid.cc
View File

@ -955,30 +955,22 @@ void bx_generic_cpuid_t::init_cpu_extensions_bitmask(void)
static unsigned apic_enabled = SIM->get_param_enum(BXPN_CPUID_APIC)->get();
// determine SSE in runtime
switch (apic_enabled) {
#if BX_CPU_LEVEL >= 6
case BX_CPUID_SUPPORT_X2APIC:
features_bitmask |= BX_CPU_X2APIC | BX_CPU_XAPIC;
break;
case BX_CPUID_SUPPORT_XAPIC_EXT:
features_bitmask |= BX_CPU_XAPIC_EXT | BX_CPU_XAPIC;
break;
#endif
case BX_CPUID_SUPPORT_XAPIC:
features_bitmask |= BX_CPU_XAPIC;
break;
case BX_CPUID_SUPPORT_LEGACY_APIC:
default:
break;
default:
BX_PANIC(("unknown APIC option %d", apic_enabled));
};
// I would like to allow XAPIC configuration with i586 together
if (apic_enabled >= BX_CPUID_SUPPORT_X2APIC && BX_CPU_LEVEL < 6) {
BX_PANIC(("PANIC: X2APIC require CPU_LEVEL >= 6 !"));
return;
}
if (apic_enabled >= BX_CPUID_SUPPORT_XAPIC_EXT && BX_CPU_LEVEL < 6) {
BX_PANIC(("PANIC: XAPIC_EXT require CPU_LEVEL >= 6 !"));
return;
}
#endif
#if BX_CPU_LEVEL >= 5

2
bochs/cpu/init.cc
View File

@ -651,7 +651,7 @@ Bit64s BX_CPU_C::param_save(bx_param_c *param)
pname = param->get_name();
if (!strcmp(pname, "EFLAGS")) {
val = BX_CPU_THIS_PTR read_eflags();
val = read_eflags();
} else if (!strcmp(pname, "selector")) {
segname = param->get_parent()->get_name();
if (!strcmp(segname, "CS")) {

6
bochs/cpu/vm8086.cc
View File

@ -176,13 +176,13 @@ int BX_CPU_C::v86_redirect_interrupt(Bit8u vector)
{
bx_address tr_base = BX_CPU_THIS_PTR tr.cache.u.segment.base;
if (BX_CPU_THIS_PTR tr.cache.u.segment.limit_scaled < 103) {
BX_ERROR(("INT_Ib(): TR.limit < 103 in VME"));
BX_ERROR(("v86_redirect_interrupt(): TR.limit < 103 in VME"));
exception(BX_GP_EXCEPTION, 0);
}
Bit32u io_base = system_read_word(tr_base + 102), offset = io_base - 32 + (vector >> 3);
if (offset > BX_CPU_THIS_PTR tr.cache.u.segment.limit_scaled) {
BX_ERROR(("INT_Ib(): failed to fetch VME redirection bitmap"));
BX_ERROR(("v86_redirect_interrupt(): failed to fetch VME redirection bitmap"));
exception(BX_GP_EXCEPTION, 0);
}
@ -228,7 +228,7 @@ int BX_CPU_C::v86_redirect_interrupt(Bit8u vector)
// interrupt is not redirected or VME is OFF
if (BX_CPU_THIS_PTR get_IOPL() < 3)
{
BX_DEBUG(("INT_Ib(): Interrupt cannot be redirected, generate #GP(0)"));
BX_DEBUG(("v86_redirect_interrupt(): interrupt cannot be redirected, generate #GP(0)"));
exception(BX_GP_EXCEPTION, 0);
}

2
bochs/cpu/vmx.cc
View File

@ -1810,7 +1810,7 @@ void BX_CPU_C::VMexitSaveGuestState(void)
VMwrite_natural(VMCS_GUEST_RIP, RIP);
VMwrite_natural(VMCS_GUEST_RSP, RSP);
VMwrite_natural(VMCS_GUEST_RFLAGS, BX_CPU_THIS_PTR read_eflags());
VMwrite_natural(VMCS_GUEST_RFLAGS, read_eflags());
for (n=0; n<6; n++) {
Bit32u selector = BX_CPU_THIS_PTR sregs[n].selector.value;