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expand FCMOV function to 8 different functions - each one is much simpler to implement and understand

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This commit is contained in:
Stanislav Shwartsman 2012-02-01 12:07:53 +00:00
parent b7333b7f3e
commit 14ec87768e
9 changed files with 321 additions and 188 deletions
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10
bochs/cpu/cpu.h
View File

@ -2158,11 +2158,19 @@ public: // for now...
BX_SMF BX_INSF_TYPE FCOM_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FICOM_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FICOM_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOV_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCOMPP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FUCOMPP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVB_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVBE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVU_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVNB_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVNE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVNBE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FCMOVNU_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
// misc
BX_SMF BX_INSF_TYPE FXCH_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE FNOP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);

128
bochs/cpu/fetchdecode_x87.h
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@ -148,38 +148,38 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDA[64+8] = {
/* 7 */ { 0, BX_IA_FIDIVR_DWORD_INTEGER },
/* /r form */
/* DA C0 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C1 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C2 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C3 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C4 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C5 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C6 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C7 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C8 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C9 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA CA */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA CB */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA CC */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA CD */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA CE */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA CF */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D0 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D1 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D2 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D3 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D4 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D5 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D6 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D7 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D8 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA D9 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA DA */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA DB */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA DC */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA DD */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA DE */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA DF */ { 0, BX_IA_FCMOV_ST0_STj },
/* DA C0 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C1 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C2 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C3 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C4 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C5 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C6 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C7 */ { 0, BX_IA_FCMOVB_ST0_STj },
/* DA C8 */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA C9 */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA CA */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA CB */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA CC */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA CD */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA CE */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA CF */ { 0, BX_IA_FCMOVE_ST0_STj },
/* DA D0 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D1 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D2 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D3 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D4 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D5 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D6 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D7 */ { 0, BX_IA_FCMOVBE_ST0_STj },
/* DA D8 */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA D9 */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA DA */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA DB */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA DC */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA DD */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA DE */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA DF */ { 0, BX_IA_FCMOVU_ST0_STj },
/* DA E0 */ { 0, BX_IA_ERROR },
/* DA E1 */ { 0, BX_IA_ERROR },
/* DA E2 */ { 0, BX_IA_ERROR },
@ -227,38 +227,38 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDB[64+8] = {
/* 7 */ { 0, BX_IA_FSTP_EXTENDED_REAL },
/* /r form */
/* DB C0 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C1 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C2 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C3 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C4 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C5 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C6 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C7 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C8 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C9 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB CA */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB CB */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB CC */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB CD */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB CE */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB CF */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D0 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D1 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D2 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D3 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D4 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D5 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D6 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D7 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D8 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB D9 */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB DA */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB DB */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB DC */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB DD */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB DE */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB DF */ { 0, BX_IA_FCMOV_ST0_STj },
/* DB C0 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C1 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C2 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C3 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C4 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C5 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C6 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C7 */ { 0, BX_IA_FCMOVNB_ST0_STj },
/* DB C8 */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB C9 */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB CA */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB CB */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB CC */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB CD */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB CE */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB CF */ { 0, BX_IA_FCMOVNE_ST0_STj },
/* DB D0 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D1 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D2 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D3 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D4 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D5 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D6 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D7 */ { 0, BX_IA_FCMOVNBE_ST0_STj },
/* DB D8 */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB D9 */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB DA */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB DB */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB DC */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB DD */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB DE */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB DF */ { 0, BX_IA_FCMOVNU_ST0_STj },
/* DB E0 */ { 0, BX_IA_FPLEGACY }, // feni (287 only)
/* DB E1 */ { 0, BX_IA_FPLEGACY }, // fdisi (287 only)
/* DB E2 */ { 0, BX_IA_FNCLEX },

9
bochs/cpu/ia_opcodes.h
View File

@ -580,7 +580,14 @@ bx_define_opcode(BX_IA_FICOM_WORD_INTEGER, &BX_CPU_C::FICOM_WORD_INTEGER, &BX_CP
bx_define_opcode(BX_IA_FICOMP_WORD_INTEGER, &BX_CPU_C::FICOM_WORD_INTEGER, &BX_CPU_C::FICOM_WORD_INTEGER, BX_ISA_X87, 0)
bx_define_opcode(BX_IA_FICOM_DWORD_INTEGER, &BX_CPU_C::FICOM_DWORD_INTEGER, &BX_CPU_C::FICOM_DWORD_INTEGER, BX_ISA_X87, 0)
bx_define_opcode(BX_IA_FICOMP_DWORD_INTEGER, &BX_CPU_C::FICOM_DWORD_INTEGER, &BX_CPU_C::FICOM_DWORD_INTEGER, BX_ISA_X87, 0)
bx_define_opcode(BX_IA_FCMOV_ST0_STj, &BX_CPU_C::FCMOV_ST0_STj, &BX_CPU_C::FCMOV_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVB_ST0_STj, &BX_CPU_C::FCMOVB_ST0_STj, &BX_CPU_C::FCMOVB_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVE_ST0_STj, &BX_CPU_C::FCMOVE_ST0_STj, &BX_CPU_C::FCMOVE_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVBE_ST0_STj, &BX_CPU_C::FCMOVBE_ST0_STj, &BX_CPU_C::FCMOVBE_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVU_ST0_STj, &BX_CPU_C::FCMOVU_ST0_STj, &BX_CPU_C::FCMOVU_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVNB_ST0_STj, &BX_CPU_C::FCMOVNB_ST0_STj, &BX_CPU_C::FCMOVNB_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVNE_ST0_STj, &BX_CPU_C::FCMOVNE_ST0_STj, &BX_CPU_C::FCMOVNE_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVNBE_ST0_STj, &BX_CPU_C::FCMOVNBE_ST0_STj, &BX_CPU_C::FCMOVNBE_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCMOVNU_ST0_STj, &BX_CPU_C::FCMOVNU_ST0_STj, &BX_CPU_C::FCMOVNU_ST0_STj, BX_ISA_P6, 0)
bx_define_opcode(BX_IA_FCOMPP, &BX_CPU_C::FCOMPP, &BX_CPU_C::FCOMPP, BX_ISA_X87, 0)
bx_define_opcode(BX_IA_FUCOMPP, &BX_CPU_C::FUCOMPP, &BX_CPU_C::FUCOMPP, BX_ISA_X87, 0)
bx_define_opcode(BX_IA_FXCH_STi, &BX_CPU_C::FXCH_STi, &BX_CPU_C::FXCH_STi, BX_ISA_X87, 0)

16
bochs/fpu/Makefile.in
View File

@ -41,8 +41,8 @@ L_TARGET = libfpu.a
BX_INCDIRS = -I.. -I$(srcdir)/.. -I../@INSTRUMENT_DIR@ -I$(srcdir)/../@INSTRUMENT_DIR@ -I. -I$(srcdir)/. -I./stubs -I$(srcdir)/./stubs
OBJS = ferr.o fpu.o fpu_arith.o fpu_compare.o fpu_const.o \
fpu_load_store.o fpu_misc.o fpu_trans.o fpu_tags.o \
OBJS = ferr.o fpu.o fpu_arith.o fpu_compare.o fpu_const.o fpu_cmov.o \
fpu_load_store.o fpu_misc.o fpu_trans.o \
fprem.o fsincos.o f2xm1.o fyl2x.o fpatan.o \
softfloat.o softfloatx80.o softfloat16.o softfloat-muladd.o \
softfloat-specialize.o softfloat-round-pack.o poly.o
@ -116,6 +116,15 @@ fpu_compare.o: fpu_compare.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \
../fpu/control_w.h ../cpu/xmm.h ../cpu/vmx.h ../cpu/svm.h ../cpu/stack.h \
softfloatx80.h softfloat.h softfloat-specialize.h
fpu_cmov.o: fpu_cmov.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
../bx_debug/debug.h ../config.h ../osdep.h ../gui/siminterface.h \
../cpudb.h ../gui/paramtree.h ../memory/memory.h ../pc_system.h \
../gui/gui.h ../instrument/stubs/instrument.h ../cpu/cpu.h \
../cpu/cpuid.h ../cpu/crregs.h ../cpu/descriptor.h ../cpu/instr.h \
../cpu/ia_opcodes.h ../cpu/lazy_flags.h ../cpu/icache.h ../cpu/apic.h \
../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \
../fpu/control_w.h ../cpu/xmm.h ../cpu/vmx.h ../cpu/svm.h ../cpu/stack.h \
softfloatx80.h softfloat.h softfloat-specialize.h
fpu_const.o: fpu_const.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
../bx_debug/debug.h ../config.h ../osdep.h ../gui/siminterface.h \
../cpudb.h ../gui/paramtree.h ../memory/memory.h ../pc_system.h \
@ -143,9 +152,6 @@ fpu_misc.o: fpu_misc.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \
../fpu/control_w.h ../cpu/xmm.h ../cpu/vmx.h ../cpu/svm.h ../cpu/stack.h \
softfloatx80.h softfloat.h softfloat-specialize.h
fpu_tags.o: fpu_tags.@CPP_SUFFIX@ ../config.h softfloat.h softfloat-specialize.h \
../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \
../fpu/control_w.h
fpu_trans.o: fpu_trans.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
../bx_debug/debug.h ../config.h ../osdep.h ../gui/siminterface.h \
../cpudb.h ../gui/paramtree.h ../memory/memory.h ../pc_system.h \

35
bochs/fpu/fpu.cc
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@ -590,4 +590,39 @@ void BX_CPU_C::print_state_FPU(void)
}
}
#include "softfloat-specialize.h"
/* -----------------------------------------------------------
* Slimmed down version used to compile against a CPU simulator
* rather than a kernel (ported by Kevin Lawton)
* ------------------------------------------------------------ */
int FPU_tagof(const floatx80 &reg)
{
Bit32s exp = floatx80_exp(reg);
if (exp == 0)
{
if (! floatx80_fraction(reg))
return FPU_Tag_Zero;
/* The number is a de-normal or pseudodenormal. */
return FPU_Tag_Special;
}
if (exp == 0x7fff)
{
/* Is an Infinity, a NaN, or an unsupported data type. */
return FPU_Tag_Special;
}
if (!(reg.fraction & BX_CONST64(0x8000000000000000)))
{
/* Unsupported data type. */
/* Valid numbers have the ms bit set to 1. */
return FPU_Tag_Special;
}
return FPU_Tag_Valid;
}
#endif

159
bochs/fpu/fpu_cmov.cc Executable file
View File

@ -0,0 +1,159 @@
/////////////////////////////////////////////////////////////////////////
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2012 Stanislav Shwartsman
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
/////////////////////////////////////////////////////////////////////////
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#include "cpu/cpu.h"
#define LOG_THIS BX_CPU_THIS_PTR
#if BX_SUPPORT_FPU
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVB_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (get_CF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVBE_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (get_CF() || get_ZF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVE_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (get_ZF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVNB_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (! get_CF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVNBE_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (! get_CF() && ! get_ZF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVNE_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (! get_ZF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVNU_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (! get_PF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOVU_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm())) {
FPU_stack_underflow(0);
}
else {
if (get_PF())
BX_WRITE_FPU_REG(BX_READ_FPU_REG(i->rm()), 0);
}
BX_NEXT_INSTR(i);
}
#endif

61
bochs/fpu/fpu_compare.cc
View File

@ -2,7 +2,7 @@
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003-2009 Stanislav Shwartsman
// Copyright (c) 2003-2012 Stanislav Shwartsman
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
//
// This library is free software; you can redistribute it and/or
@ -80,10 +80,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_STi(bxInstruction_c *i)
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->nnn() & 1;
// handle special case of FSTP opcode @ 0xDE 0xD0..D7
if (i->b1() == 0xde)
pop_stack = 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FCOMP_STi)
pop_stack = 1;
clear_C1();
@ -191,7 +190,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOM_STi(bxInstruction_c *i)
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->nnn() & 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FUCOMP_STi)
pop_stack = 1;
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
{
@ -224,7 +225,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_SINGLE_REAL(bxInstruction_c *
{
BX_CPU_THIS_PTR prepareFPU(i);
int pop_stack = i->nnn() & 1, rc;
int rc, pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FCOMP_SINGLE_REAL)
pop_stack = 1;
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
@ -272,7 +275,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_DOUBLE_REAL(bxInstruction_c *
{
BX_CPU_THIS_PTR prepareFPU(i);
int pop_stack = i->nnn() & 1, rc;
int rc, pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FCOMP_DOUBLE_REAL)
pop_stack = 1;
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
@ -320,7 +325,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_WORD_INTEGER(bxInstruction_c
{
BX_CPU_THIS_PTR prepareFPU(i);
int pop_stack = i->nnn() & 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FICOMP_WORD_INTEGER)
pop_stack = 1;
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
@ -361,7 +368,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_DWORD_INTEGER(bxInstruction_
{
BX_CPU_THIS_PTR prepareFPU(i);
int pop_stack = i->nnn() & 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FICOMP_DWORD_INTEGER)
pop_stack = 1;
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
@ -465,38 +474,6 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOMPP(bxInstruction_c *i)
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOV_ST0_STj(bxInstruction_c *i)
{
BX_CPU_THIS_PTR prepareFPU(i);
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
{
FPU_stack_underflow(0);
BX_NEXT_INSTR(i);
}
floatx80 sti_reg = BX_READ_FPU_REG(i->rm());
bx_bool condition = 0;
switch(i->nnn() & 3)
{
case 0: condition = get_CF(); break;
case 1: condition = get_ZF(); break;
case 2: condition = get_CF() || get_ZF(); break;
case 3: condition = get_PF(); break;
default:
BX_PANIC(("FCMOV_ST0_STj: default case"));
}
if (i->b1() & 1)
condition = !condition;
if (condition)
BX_WRITE_FPU_REG(sti_reg, 0);
BX_NEXT_INSTR(i);
}
/* D9 E4 */
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FTST(bxInstruction_c *i)
{

25
bochs/fpu/fpu_load_store.cc
View File

@ -2,7 +2,7 @@
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003-2009 Stanislav Shwartsman
// Copyright (c) 2003-2012 Stanislav Shwartsman
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
//
// This library is free software; you can redistribute it and/or
@ -273,10 +273,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_STi(bxInstruction_c *i)
BX_CPU_THIS_PTR prepareFPU(i);
FPU_update_last_instruction(i);
int pop_stack = i->nnn() & 1;
// handle special case of FSTP opcode @ 0xDF 0xD0..D7
if (i->b1() == 0xdf)
pop_stack = 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FSTP_STi)
pop_stack = 1;
clear_C1();
@ -308,7 +307,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_SINGLE_REAL(bxInstruction_c *i
float32 save_reg = float32_default_nan; /* The masked response */
int pop_stack = i->nnn() & 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FSTP_SINGLE_REAL)
pop_stack = 1;
if (IS_TAG_EMPTY(0))
{
@ -354,7 +355,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_DOUBLE_REAL(bxInstruction_c *i
float64 save_reg = float64_default_nan; /* The masked response */
int pop_stack = i->nnn() & 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FSTP_DOUBLE_REAL)
pop_stack = 1;
if (IS_TAG_EMPTY(0))
{
@ -431,7 +434,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_WORD_INTEGER(bxInstruction_c
Bit16s save_reg = int16_indefinite;
int pop_stack = i->nnn() & 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FISTP_WORD_INTEGER)
pop_stack = 1;
clear_C1();
@ -477,7 +482,9 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_DWORD_INTEGER(bxInstruction_c
Bit32s save_reg = int32_indefinite; /* The masked response */
int pop_stack = i->nnn() & 1;
int pop_stack = 0;
if (i->getIaOpcode() == BX_IA_FISTP_DWORD_INTEGER)
pop_stack = 1;
clear_C1();

66
bochs/fpu/fpu_tags.cc
View File

@ -1,66 +0,0 @@
/////////////////////////////////////////////////////////////////////////
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003-2009 Stanislav Shwartsman
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
/////////////////////////////////////////////////////////////////////////
#include "config.h"
#if BX_SUPPORT_FPU
#include "softfloat.h"
#include "softfloat-specialize.h"
/* -----------------------------------------------------------
* Slimmed down version used to compile against a CPU simulator
* rather than a kernel (ported by Kevin Lawton)
* ------------------------------------------------------------ */
#include <cpu/i387.h>
int FPU_tagof(const floatx80 &reg)
{
Bit32s exp = floatx80_exp(reg);
if (exp == 0)
{
if (! floatx80_fraction(reg))
return FPU_Tag_Zero;
/* The number is a de-normal or pseudodenormal. */
return FPU_Tag_Special;
}
if (exp == 0x7fff)
{
/* Is an Infinity, a NaN, or an unsupported data type. */
return FPU_Tag_Special;
}
if (!(reg.fraction & BX_CONST64(0x8000000000000000)))
{
/* Unsupported data type. */
/* Valid numbers have the ms bit set to 1. */
return FPU_Tag_Special;
}
return FPU_Tag_Valid;
}
#endif