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3046 Commits

Author SHA1 Message Date
Stanislav Shwartsman
9b22ba7edf softfloat: added float to uint64 conversion operations (based on QEMU patch by Tom Musta) 2013-11-10 19:08:12 +00:00
Stanislav Shwartsman
3be7e5884b added lock prefix used info into bx_Instriction_c and use it in disasm 2013-11-08 21:43:21 +00:00
Stanislav Shwartsman
4b03247287 fixed compilation error with vs2008 2013-10-25 05:36:10 +00:00
Stanislav Shwartsman
d9fc472ba7 Added VMEXIT instrumentation callback 
Fixed possible RSP corruption in SMP mode - the speculative_rsp variable might be not reset properly
 2013-10-23 21:18:19 +00:00
Stanislav Shwartsman
d52adaa0ee improve debug print to the log file which is printed in case of triple fault - tell VMX host/guest info 2013-10-20 16:41:34 +00:00
Stanislav Shwartsman
39f2f172b5 fixed PAUSE/NOP decoding bug in prev commit 2013-10-16 05:46:57 +00:00
Stanislav Shwartsman
8bcc8cf073 split PREFETCH opcode to Group16 for better disasm of bxInstruction_c 2013-10-15 21:21:28 +00:00
Stanislav Shwartsman
940c2a1c8e fixes for disasm 2013-10-15 17:19:18 +00:00
Stanislav Shwartsman
e1012f1165 add vmcs revision id interface to CPUID class 2013-10-14 18:35:56 +00:00
Stanislav Shwartsman
9fb7384e6b finish sse tables cleanup in disasm and fetchdecode 2013-10-11 20:09:51 +00:00
Stanislav Shwartsman
05d2bb2b9a fixed typo bug caused spurios #UD on SSE shift 2013-10-11 06:20:42 +00:00
Stanislav Shwartsman
5fc491e9b6 resolve aliases after actually decoding base instr 2013-10-11 05:58:30 +00:00
Stanislav Shwartsman
34025e469f resolve aliases after actually decoding base instr 2013-10-11 05:54:18 +00:00
Stanislav Shwartsman
582bf84bae apply same optimization to disasm as well 2013-10-10 21:00:26 +00:00
Stanislav Shwartsman
46e36b463b size-optimization for SSE opcode tables 2013-10-10 20:21:15 +00:00
Stanislav Shwartsman
2ec138f96e Apply patch from developers mailing list: 
bx_debug: allow expressions instead of numerals, where relevant
by Samium Gromoff

fix code duplication in fma handlers
 2013-10-09 20:04:05 +00:00
Stanislav Shwartsman
0b2e533a55 more avx512 instructions done 2013-10-09 19:45:36 +00:00
Stanislav Shwartsman
d6d1c707df implemented set of integer avx512 instructions 2013-10-08 19:44:52 +00:00
Stanislav Shwartsman
70230049fa opmask_ok support in fetchdecode32.cc 2013-10-08 18:40:10 +00:00
Stanislav Shwartsman
09254eb474 avx512 implementation fixes and next steps 2013-10-08 18:31:18 +00:00
Stanislav Shwartsman
8446685ba2 fixed FPU and MMX disasm 2013-10-07 20:55:43 +00:00
Stanislav Shwartsman
5724013e7d updates to AVX512 decoding and CPUID 2013-10-07 20:39:34 +00:00
Stanislav Shwartsman
cb0eee9456 disasm fixes 2013-10-07 19:02:53 +00:00
Stanislav Shwartsman
059769e2a6 disasm bug fixes 2013-10-06 20:42:13 +00:00
Stanislav Shwartsman
f0b917ca15 disasm fixes 2013-10-06 19:27:40 +00:00
Stanislav Shwartsman
e55611df21 disasm fixes 2013-10-06 19:04:52 +00:00
Stanislav Shwartsman
add8eea761 disasm bug fixes 2013-10-06 18:37:56 +00:00
Stanislav Shwartsman
f1f35a236c disasm: Id form in 32-bit should be sign-extended to 64-bit 2013-10-06 18:10:58 +00:00
Stanislav Shwartsman
a392612b03 fixed compilation err in cpu-level=3 config 2013-10-06 18:01:25 +00:00
Stanislav Shwartsman
e1512ccaf8 fixed warning under new MSDEV compiler 2013-10-05 19:35:00 +00:00
Stanislav Shwartsman
fd370a4d41 fixes in disasm, added example of using bxInstruction_c disasm into dbg_main.cc (commented out for now) 2013-10-05 19:32:09 +00:00
Stanislav Shwartsman
b1d703e47c fixed compilation with x86-64 off 2013-10-05 18:51:28 +00:00
Stanislav Shwartsman
67bce7af97 fixed memref disasm 2013-10-05 11:00:31 +00:00
Stanislav Shwartsman
d4bfbffdbb disasm fixes 2013-10-05 08:34:09 +00:00
Stanislav Shwartsman
c9a1f259cb fixed compilation error in new disasm module under SMP config 2013-10-04 18:14:54 +00:00
Stanislav Shwartsman
ba1249ed15 disasm fixes 2013-10-04 17:26:56 +00:00
Stanislav Shwartsman
85b0402668 fixes for disasm 2013-10-02 19:23:34 +00:00
Stanislav Shwartsman
8c60799e72 fix for new disasm interface 2013-10-01 20:17:21 +00:00
Stanislav Shwartsman
e592f81209 updates to internal disasm 2013-10-01 18:47:55 +00:00
Stanislav Shwartsman
147d788022 few fixes in new disasm module 2013-09-30 20:16:52 +00:00
Stanislav Shwartsman
fd383435f0 - Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon). 
The code already knows to disasm most of the opcodes with their operands.

- Split according to OSIZE opcodes RDFSBASE/WRFSBASE / RDGSBASE/WRGSBASE both for disasm and performance

- Minimize amount of opcode forms in ia_opcodes.h again.
  For example Udq means the same as Wdq but with no memory form.
 2013-09-30 19:01:42 +00:00
Stanislav Shwartsman
fa06b26c88 Make possible to deliver instruction name for disasm directly from bx_ia_opcode_name (some opcodes were renamed). 
Fixed bug in stack optimization in 64-bit mode (should result in some speedup)
ia_opcode.h - eliminate some OP_M cases when they actually meant "value of specific type in the memory"
example: "MOVBE Md, Gd" actually means "MOVBE Ed, Gd"which just not have reg/reg form.
 2013-09-26 18:54:32 +00:00
Stanislav Shwartsman
839b841c38 added register type to register source information in decoder 2013-09-24 09:50:25 +00:00
Stanislav Shwartsman
ff79cbd596 Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm) 
The end goal will be also merging of disasm and cpu decoder to one module and remove the disasm.

Two bug fixes on the way:
TBM: fixed 64-bit TBM instructions with memory access (did 32-bit load instead of 64-bit)
BMI2: fixed operands order for PEXT/PDEP instructions
AVX2: fixed gather instruction decoding bug from decoder alias commit
 2013-09-24 05:21:00 +00:00
Stanislav Shwartsman
f791802286 infrastructure change for several AVX handlers to support any VL and only 128/256 2013-09-21 20:40:57 +00:00
Stanislav Shwartsman
404b8b1475 move end of trace indication to separate 'flags' field of bx_ia_opcode. this saves a lot of code duplication and simplifies the decode tables. also on the way found missing SVM opcodes that missed 'end of trace' mark 2013-09-21 18:58:01 +00:00
Stanislav Shwartsman
047b17d415 fixed typo in makefile 2013-09-21 10:52:18 +00:00
Stanislav Shwartsman
cd55ace8c8 fixed compilation err, rename opcode and handler functions for PUSHA/POPA instructions 2013-09-21 10:03:49 +00:00
Stanislav Shwartsman
2526282ed9 small additions for avx512 2013-09-20 18:27:33 +00:00
Stanislav Shwartsman
3803ac7fbe fixed evex override mscsr controls 2013-09-19 21:38:25 +00:00
Stanislav Shwartsman
0441f82b02 implement more AVX512 instructions 2013-09-19 20:35:55 +00:00
Stanislav Shwartsman
55f9155bc5 add new file 2013-09-19 18:32:39 +00:00
Stanislav Shwartsman
8b3a0acde9 implement first EVEX instructions - VADDPS/PD/SS/SD 2013-09-19 18:31:30 +00:00
Stanislav Shwartsman
8e71a86542 seve vex prefix value to the indication of vex prefix used 2013-09-18 18:01:48 +00:00
Stanislav Shwartsman
da0e2baf22 avoid segfault when decoding incorrectly encoded kmask op 2013-09-17 21:01:24 +00:00
Stanislav Shwartsman
d169860f6c added masked operations to simd_pfp.h, optimize simd_int.h, rewrite dpps instr using new masked op from simd_pfp.h 2013-09-17 20:49:26 +00:00
Stanislav Shwartsman
aa25c1db6a name convention change - search and replace 2013-09-17 17:34:20 +00:00
Stanislav Shwartsman
b6c39a3176 merge AVX and SSE .bochsrc options to single SIMD option which will configure SSE and AVX together 2013-09-16 19:50:36 +00:00
Stanislav Shwartsman
1cebe5f83d rellback part of commit with xmm register access interface changes - doesn't work for big endian hosts 2013-09-16 19:10:42 +00:00
Stanislav Shwartsman
0cb0acc30f added evex decode tables - next step to populate them :) 2013-09-15 20:48:39 +00:00
Stanislav Shwartsman
1e1fa45cac fixed makefile after file rename 2013-09-08 20:16:38 +00:00
Stanislav Shwartsman
e4a99b4294 rename avx512_mask.cc 2013-09-08 20:15:52 +00:00
Stanislav Shwartsman
132714bf29 fixed compilation w/o EVEX support enabled 2013-09-08 19:45:46 +00:00
Stanislav Shwartsman
8881800b1f enable avx-512 in init.cc 2013-09-08 19:35:37 +00:00
Stanislav Shwartsman
7297323c69 First step of AVX512 support implementation (simplest) 
decode and implement KMASK manipulation instructions
disasm: coming soon
 2013-09-08 19:19:16 +00:00
Stanislav Shwartsman
6ddfe5fc3b reorg avx opcodes in ia_opcodes.h. place v128 and v256 opcodes together. todo: find way to merge them sometimes 2013-09-07 18:52:31 +00:00
Stanislav Shwartsman
a6b85d9443 compress xop tables for vex.l - smaller binary size 2013-09-06 18:56:46 +00:00
Stanislav Shwartsman
0fd4e3450c update (c) for few files 2013-09-05 18:40:14 +00:00
Stanislav Shwartsman
2c9cf33b2f update (c) for few files 2013-09-05 18:37:10 +00:00
Stanislav Shwartsman
69f947cef2 fixes and small optimizations for avx and xop decoding 2013-09-05 18:29:50 +00:00
Stanislav Shwartsman
f36364bc65 it doesn't matter if it was vex or xop ... 2013-09-05 17:52:47 +00:00
Volker Ruppert
7c0a261751 final fix for BX_CPU_LEVEL 4 2013-09-05 06:42:17 +00:00
Stanislav Shwartsman
897bf85494 fixed bug in fma4 decoding - found now thanks to new tables re-org 2013-09-04 18:37:49 +00:00
Stanislav Shwartsman
2f957bf142 re-arrange AVX/XOP table to avoid redundant multiplication in decode. TODO: compress the tables 2x using aliases 2013-09-04 18:36:01 +00:00
Stanislav Shwartsman
bb695fd5f5 remove redundant (and incorrect) check 2013-09-04 16:47:52 +00:00
Stanislav Shwartsman
81affbe328 fixed incorrect lock prefix detection 2013-08-30 20:08:04 +00:00
Stanislav Shwartsman
c2558f52d6 generic_cpuid: fixed xsave cpuid leaf when xsave is disabled (need to clear output) 2013-08-29 19:58:31 +00:00
Stanislav Shwartsman
59c65151f5 various fixes 2013-08-29 19:43:15 +00:00
Stanislav Shwartsman
7e2ab5ca81 decode simplification for AMD XOP prefix 2013-08-28 19:56:19 +00:00
Stanislav Shwartsman
5d61c19b0b evex support - step2 2013-08-27 20:47:24 +00:00
Stanislav Shwartsman
5fe5bf1ed6 fixed alias typo corrupting avx opcodes 2013-08-27 19:45:31 +00:00
Stanislav Shwartsman
c5f72033ad correct vzeroupper opcode 2013-08-27 06:57:48 +00:00
Stanislav Shwartsman
735154a755 oops, typo bug in prev commit 2013-08-24 19:46:04 +00:00
Stanislav Shwartsman
65e6760915 small decode optimization 2013-08-24 19:29:43 +00:00
Stanislav Shwartsman
748a0da712 one more step in the way towards avx-512 which have more vector registers 2013-08-24 12:12:10 +00:00
Stanislav Shwartsman
701d88388e fixed FCS/FDS deprecation 2013-08-22 20:21:36 +00:00
Stanislav Shwartsman
3a7e336cb6 more opcode alias - now VEX.W alias 2013-08-21 18:45:36 +00:00
Stanislav Shwartsman
115ec37a4c make decoder tables smaller using decode aliases 2013-08-21 04:52:49 +00:00
Stanislav Shwartsman
33a7063e60 bug fixes 2013-08-05 15:33:41 +00:00
Stanislav Shwartsman
362b99eba0 fixed typo in last commit 2013-08-04 19:47:19 +00:00
Stanislav Shwartsman
3fabcb00b7 VMX: CMPXHG instructions should always write to the memory destination, even if the value unchanged - it affects VMEXIT conditions for the full apic virtualization 
Fixed also CMPXHG16B instruction (last one, others were fixed earlier)
 2013-08-04 19:37:04 +00:00
Stanislav Shwartsman
7005afd3a8 clean up BxRepeatable attribute - not needed anymore after VL AVX field moved to new location 2013-07-26 15:42:49 +00:00
Stanislav Shwartsman
2dbe81db51 first infrastructure changes to support EVEX prefix and AVX-512 extensions recently published by Intel 2013-07-26 12:50:56 +00:00
Stanislav Shwartsman
0da1d659d3 CMPXHG should always write to memory dest - affects APIC virtualization VMEXIT conditions 2013-07-24 21:06:24 +00:00
Stanislav Shwartsman
54d3dc4353 properly added sha.cc to the tree 2013-07-24 18:56:37 +00:00
Stanislav Shwartsman
2357dc5ccc Fixed number of invocations of the BX_INSTR_LIN_ACCESS instrumentation callback in cpu/access32.cc, cpu/access64.cc and cpu/paging.cc specify the BX_READ memory access type where BX_RW really applies. 
SF Patch #1335 by Mateusz Jurczyk
 2013-07-24 18:54:18 +00:00
Stanislav Shwartsman
4c7031962e added new sha.cc file 2013-07-24 18:47:28 +00:00
Stanislav Shwartsman
852b5c3749 implemented SHA new instructions announced in recent Intel SDM extensions document rev015 2013-07-24 18:44:22 +00:00
Stanislav Shwartsman
fd71b03353 add some definitions introduced in recent Intel SDM extensions document (rev015) 2013-07-23 20:51:52 +00:00
Stanislav Shwartsman
4a36fb3edc fixed debug print message for BOUND instruction 2013-07-22 18:52:15 +00:00
Stanislav Shwartsman
148cb1aee0 Thanks to avanced trace linking 256K entries ICache is not needed anymore. 
Reduce to 64K entries and save memory.
 2013-06-29 10:25:56 +00:00
Stanislav Shwartsman
ef0d2142ab Allow cross-page trace linking again. 
The SMC problem was solved in following manner:

 - Every trace linked to another remembers when it was linked (a special timestamp value called traceLinkTimeStamp)
 - When true SMC happens it incremements the traceLinkTimeStamp
 - Jump to the linked trace won't be allowed if traceLinkTimeStamp in the link doesn't match traceLinkTimeStamp

So SMC effectively breaks all trace links and therefore I should not care for them anymore

5%-10% speedup on OS boot benchamarks observed
 2013-06-29 10:16:28 +00:00
Stanislav Shwartsman
0276bdfb3e still not allow cross page linking until SMC issue will be solved - cause Win98 crash 2013-06-28 07:51:42 +00:00
Stanislav Shwartsman
c42afb0a2d allow linking of traces cross 4K page boundary 2013-06-23 21:12:03 +00:00
Stanislav Shwartsman
91b3417e57 small bugfix 2013-06-23 15:45:25 +00:00
Stanislav Shwartsman
d30d1ac93a small bugfix 2013-06-21 14:12:46 +00:00
Stanislav Shwartsman
c7698a5589 implemented fcs/fds deprecation. added haswell to cpudb.h as well 2013-06-20 20:12:53 +00:00
Stanislav Shwartsman
b335f472bd Added Haswell configuration to CPUDB 2013-06-20 19:33:30 +00:00
Stanislav Shwartsman
769d35b06c remove debug print from Sandy Bridge CPUID wrongly commited 2013-06-15 17:57:03 +00:00
Stanislav Shwartsman
edc3003f35 do not use cpuid:level param when it doesn't exists 2013-06-15 17:53:49 +00:00
Stanislav Shwartsman
9651b5d53c bugfix: vmx preemption timer vmexit should not wakeup CPU from sleep state. cpuid: added definitions from recently published intel SDM rev047 2013-06-04 20:28:27 +00:00
Stanislav Shwartsman
b950de7155 add more vmx capabilities to generic cpu 2013-05-20 18:18:52 +00:00
Stanislav Shwartsman
964583a40f Added X2APIC support to Ivy Bridge configuration 2013-05-20 18:15:35 +00:00
Stanislav Shwartsman
2bca9b8273 updates in CPUID defines after new published AMD SDM 2013-05-17 19:41:57 +00:00
Stanislav Shwartsman
1304b3fb4b Do not report Architectural Performance Monitoring in CPUID 
Reporting true capabilities breaks Win7 x64 installation
 2013-05-07 15:34:58 +00:00
Stanislav Shwartsman
694dc8a0e1 fixed generic cpuid leafs - all std leafs > 2 were corrupted 2013-05-06 20:33:27 +00:00
Stanislav Shwartsman
b2b42dd714 small fix for LOAD_SS interrupts inhibit 2013-05-04 19:10:50 +00:00
Stanislav Shwartsman
139ec7d538 PANIC on options which require P6 when CPU_LEVEL is set to 5 instead of ignoring them 2013-04-17 20:24:12 +00:00
Stanislav Shwartsman
3fbdf7ff03 do not recognize MTRR MSRs when mtrr is not enabled 2013-04-17 19:59:56 +00:00
Stanislav Shwartsman
9b958b3a05 allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6 2013-04-17 19:46:11 +00:00
Stanislav Shwartsman
025fb15461 properly handle RDMSR/WRMSR of MSR_PAT when PAT feature is disabled 2013-04-11 19:41:54 +00:00
Stanislav Shwartsman
f1c7d163a1 activity state is ignored when vmenter injecting event 2013-04-09 20:36:02 +00:00
Stanislav Shwartsman
a277d60d89 implemented vmentering to non-active cpu state 2013-04-09 15:43:15 +00:00
Stanislav Shwartsman
6a8357105b fix for guest segment AR field size 2013-04-08 17:29:00 +00:00
Stanislav Shwartsman
13a6524acb hw task switch tempdr6 hanlding fix 2013-03-15 08:26:22 +00:00
Stanislav Shwartsman
913e3defd1 fixed SIPI delivery bug from one the latest checkins 2013-03-13 19:06:55 +00:00
Stanislav Shwartsman
53d14c01b5 correctly signal bit 12 (nmi unblocking by iret) in vmx interruption info. todo: find how to implement it clean way 2013-03-06 21:11:23 +00:00
Stanislav Shwartsman
1a770dd260 implementation of virtual NMI 2013-03-05 21:12:43 +00:00
Stanislav Shwartsman
39ae66b5a3 Suppress 'entering paged real mode' CR0 check for SVM guest 
After a lot of thinking and browsing in the SVM arch forums I assume now that it shold be fine to enter to paged real mode under SVM guest.
The test case to consider:

  (paged) real mode guest -> entering Pmode (not paged) -> disabling the Pmode back

Ths assumption still should be validated with real AMD hardware

Context: AMD's manual about CR0 intercept priority :
	"Checks non-memory exceptions (CPL, illegal bit combinations, etc.) before the intercept"

The check for 'paged real mode' suposed to be illegal bit combination ...
 2013-02-27 19:11:28 +00:00
Stanislav Shwartsman
ab63b22a68 SVM: implemented missed RSM, LDTR READ/WRITE, TR READ/WRITE and IRET intercepts 2013-02-25 19:36:41 +00:00
Stanislav Shwartsman
8708d05bea rename some VMX controls to match intel docs. added missed VMX consistency check 2013-02-24 20:22:22 +00:00
Volker Ruppert
058c0e05fb - removed wx debugger dialogs (enhanced gui debugger now almost stable with wx) 2013-02-16 12:22:13 +00:00
Stanislav Shwartsman
e43ac349a6 fixed injected exception err code check for unrestricted guests 2013-02-14 19:31:42 +00:00
Stanislav Shwartsman
40669115e1 use different formatter for printing phy address in paging dbg messages 2013-02-14 19:30:59 +00:00
Volker Ruppert
97de484efb use enhanced gui debugger instead of classic wx debugger if BX_DEBUGGER_GUI == 1 
The Windows version looks almost stable, but the GTK version fails in some cases.
That's why the classic wx debugger is still available if BX_DEBUGGER_GUI is set to 0.
- added function close_debug_dialog() to handle the simulation stop case in wx
- disable all the wx debugger related code if BX_DEBUGGER_GUI is set to 1
- added enhanced debugger specific init code similar to the code in sdl.cc
- include debugger related resources on Windows
- TODO: make the GTK / wxGTK case stable and remove the wx debugger
 2013-02-12 21:08:35 +00:00
Stanislav Shwartsman
ec971d0ce8 add #VE exception specific VMCS fields into VMCS bitmap 2013-01-28 20:20:54 +00:00
Stanislav Shwartsman
863e1a0f8a fixed compilation with debugger enabled 2013-01-28 18:26:56 +00:00
Stanislav Shwartsman
64df073617 implemented virtualization exception feature 2013-01-28 16:30:25 +00:00
Stanislav Shwartsman
d38fce8218 preparation for future extension in translate_linear - I would like to return data to caller through tlbEntry 2013-01-27 19:27:30 +00:00
Stanislav Shwartsman
016e112ac2 fixed compilation err with vmx=1 2013-01-23 19:04:53 +00:00
Stanislav Shwartsman
a0c9522fef fix compilation with no vmx enabled 2013-01-22 19:06:20 +00:00
Stanislav Shwartsman
8865df606a fixed typo bug in VMX code 2013-01-22 08:39:41 +00:00
Stanislav Shwartsman
608775cd5a vmread/vmwrite should always check for CPL, also when in vmx guest 2013-01-21 20:20:14 +00:00
Stanislav Shwartsman
3ab0331307 implemented VMCS shadowing (Intel SDM rev045) 2013-01-21 19:55:00 +00:00
Stanislav Shwartsman
9e896ce0bf SFENCE instruction doesn't require SSE2 2013-01-20 17:56:08 +00:00
Stanislav Shwartsman
4bed791ccb Added year 2013 to Copyright in all files already modified in new year 2013-01-19 20:45:03 +00:00
Stanislav Shwartsman
05d36f0acc fixed performance bug in smap/smep fix - tlb never had user executable page permission 2013-01-19 20:14:44 +00:00
Stanislav Shwartsman
eda28b95f4 unfortunately this change is rquired to make SMAP and SMEP features to work. 
I observed ~5% emulation slowdown ... thinking about possible mitigations

this fixes TLB issue with SMAP and SMEP features.
these features introduce a new behavior when page can be inaccessible by System (CPL=0).
Current behavior is accessBits was not supporting it but legacy (from Bochs 2.3.6) was.
The wrong behavior can be observed if user access a user page and system access the same page later.
user access is fine and pass SMEP/SMA checks and stores the translation in TLB.
the system access will hit the TLB and nobody could detect that system cannot access that page.
 2013-01-16 17:28:20 +00:00
Stanislav Shwartsman
c337b7babb Intel Software Developers Manual rev45 was released 
Added CPUID bits and preparations for newly documented VMX features
 2013-01-16 16:57:48 +00:00
Stanislav Shwartsman
c96f5e27a9 flush tlb also when cr4.smap changes 2013-01-14 17:02:51 +00:00
Stanislav Shwartsman
d93607cfe6 implemented pause threshold count in SVN + bugfix in SMAP 2013-01-08 21:03:22 +00:00
Stanislav Shwartsman
93d6c2e1fc added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00
Stanislav Shwartsman
c6b1f6c22b fixed IsValidPageAlignedPhyAddr check for VMX/SVM 2012-12-30 19:49:20 +00:00
Stanislav Shwartsman
685e0091b4 fixed decoding of RDRAND/RDSEED with 0x66 prefix 2012-12-27 19:31:21 +00:00
Stanislav Shwartsman
48d7fa3786 fixed code duplication, mainly in vmx/svm code 2012-12-26 21:59:16 +00:00
Stanislav Shwartsman
6e5a934eea XSAVE: Fixed XCR0 reserved combination checking in XSETBV instruction 2012-12-23 16:54:18 +00:00
Stanislav Shwartsman
ce2751a13c move misaligned_sse from compile time to .bochsrc option 2012-12-20 19:43:11 +00:00
Stanislav Shwartsman
db4d75317a fixed small avx issues 2012-12-11 21:01:05 +00:00
Stanislav Shwartsman
318ad5e26d optimize avx stores 2012-12-10 14:43:21 +00:00
Stanislav Shwartsman
182ad65ea3 changes in avx emulation code 2012-12-09 16:42:48 +00:00
Stanislav Shwartsman
574b69c81e fixed MSDEV warnings 2012-11-27 15:40:45 +00:00
Stanislav Shwartsman
64f9c12bbc name new CPUID bits from AMD 2012-11-10 11:00:09 +00:00
Stanislav Shwartsman
edf4ea4c74 fixed SF bug #1318 dbg: several issues with 'set' command 2012-11-06 20:01:02 +00:00
Stanislav Shwartsman
7bace61c12 fixed compilation issue 2012-11-05 06:41:10 +00:00
Stanislav Shwartsman
8a01ee1661 implemented SVM decode assists. some is still missing - coming soon 2012-11-02 07:46:50 +00:00
Stanislav Shwartsman
8d32f2e305 fixed another compilaton err in vapic 2012-10-28 18:32:58 +00:00
Stanislav Shwartsman
7e663e785e fix compilation err 2012-10-28 16:34:25 +00:00
Stanislav Shwartsman
744001e35e Implemented VMX APIC Registers Virtualization and VMX Virtual Interrupt Delivery emulation 
Bugfix: VMX: VmEntry should do TPR Virtualization (TPR Shadow + APIC Access Virtualization case is affected) and even could possibly cause TPR Threshold VMEXIT
 2012-10-26 18:43:53 +00:00
Stanislav Shwartsman
9b65cae026 make WRMSR end-of-trace instruction 2012-10-25 16:49:22 +00:00
Stanislav Shwartsman
4273b41d00 fixed write to apicbase when in x2apic mode 2012-10-25 16:09:34 +00:00
Stanislav Shwartsman
7e1b67f91e fixed bugs in vmx code 2012-10-25 16:08:28 +00:00
Stanislav Shwartsman
e4d659c54d fix compilation err 2012-10-25 16:07:11 +00:00
Stanislav Shwartsman
45d5d690d7 initialize random generator for RDRAND/RDSEED 2012-10-09 20:53:50 +00:00
Stanislav Shwartsman
2638c1136a Add RDRAND/RDSEED instructions support (+ disasm) 
Of course no true random numbers will be generated - use standard "C" rand() function as stub.
In future it will be possible to improve (using another random generator) or even use real rdrand/rdseed intrinsics
 2012-10-09 15:16:48 +00:00
Stanislav Shwartsman
e7a2c9892c re-implement VTPF write using event handling interface as trap event (in preparation to more apic virtualization features) 2012-10-07 09:16:13 +00:00
Stanislav Shwartsman
b0edc32f4c fixed compilation with VMX 2012-10-06 09:13:41 +00:00
Stanislav Shwartsman
c48e516386 implemented injection of MTF event. The MTF VMexec control is still not implemented yet 2012-10-05 20:48:22 +00:00
Stanislav Shwartsman
3cd11b02ee optimization and bugfix for prev commit 2012-10-04 21:30:50 +00:00
Stanislav Shwartsman
1b228aec32 Fixed double and triple fault detection in exception.cc. Remove errorno variable from CPU (redundant now) 2012-10-04 20:52:27 +00:00
Stanislav Shwartsman
f69bc016d2 vmx: nmi blocking after NMI event injection. better dbg print for VMEXIT 2012-10-04 16:15:58 +00:00
Stanislav Shwartsman
be1642e02e fixed compile with debugger enabled 2012-10-03 20:32:02 +00:00
Stanislav Shwartsman
2ca0c6c677 Move INTR, Local APIC INTR and SVN VINTR into new event interface (hardest part) 
Minor speedup (of 1-2%) was observed due to new implementation
Remove obsolete dbg_take_irq function and dbg_force_interrupt function from CPU code, the functions were not working properly anyway
 2012-10-03 20:24:29 +00:00
Stanislav Shwartsman
49bb3ba8f5 some cleanups and optimizations with new event interface 2012-10-03 15:49:45 +00:00
Stanislav Shwartsman
ae06a0825b svm virq - move to new event interface 2012-10-02 20:49:16 +00:00
Stanislav Shwartsman
9132c29280 optimization and code duplication cleanup in event handling code 2012-10-02 20:07:26 +00:00
Stanislav Shwartsman
dbb23aed43 close another SMC hole 2012-10-01 18:19:09 +00:00
Stanislav Shwartsman
3a6f649b18 fixed comment 2012-10-01 12:08:23 +00:00
Stanislav Shwartsman
e397a86ce0 fixed code duplication related to EXT field 2012-09-29 09:31:34 +00:00
Stanislav Shwartsman
dc369d831f small cleanup 2012-09-27 07:03:25 +00:00
Stanislav Shwartsman
8189a5ed20 fixed compilation with SMP 2012-09-26 16:00:49 +00:00
Stanislav Shwartsman
b2afa834c5 fixed compilation with intrumentation w/o x86-64 2012-09-25 20:48:46 +00:00
Stanislav Shwartsman
66a9a769fc fixed nmi window exiting 2012-09-25 20:00:33 +00:00
Stanislav Shwartsman
08d0ef6dbf fixes for new event handling code 2012-09-25 13:53:26 +00:00
Stanislav Shwartsman
d5f858d100 transfer VMX NMI window exiting into event vector infrastructure 2012-09-25 10:21:29 +00:00
Stanislav Shwartsman
40ba9c8d7b introducing new interface for handling CPU events based on vector of events and not on many not related variables. this is very initial implementation which takes into new interface only few events, more will code soon 2012-09-25 09:35:38 +00:00
Stanislav Shwartsman
f0c153e550 fixed warning 2012-09-24 19:53:49 +00:00
Stanislav Shwartsman
da150bc163 small optimization in icache 2012-09-23 19:35:46 +00:00
Stanislav Shwartsman
eb348992c2 optimize POPCNT implementation 2012-09-21 14:56:56 +00:00
Stanislav Shwartsman
74f5bb1934 WBINVD not necessary havw to flush ICACHE 2012-09-21 08:55:10 +00:00
Stanislav Shwartsman
f419798ca5 fixed reset value for mtrr 2012-09-15 19:52:11 +00:00