one more step in the way towards avx-512 which have more vector registers

This commit is contained in:
Stanislav Shwartsman 2013-08-24 12:12:10 +00:00
parent 25f99f76c3
commit 748a0da712
6 changed files with 770 additions and 764 deletions

View File

@ -147,10 +147,8 @@ void BX_CPU_C::debug(bx_address offset)
else
#endif
{
BX_INFO(("| EAX=%08x EBX=%08x ECX=%08x EDX=%08x",
(unsigned) EAX, (unsigned) EBX, (unsigned) ECX, (unsigned) EDX));
BX_INFO(("| ESP=%08x EBP=%08x ESI=%08x EDI=%08x",
(unsigned) ESP, (unsigned) EBP, (unsigned) ESI, (unsigned) EDI));
BX_INFO(("| EAX=%08x EBX=%08x ECX=%08x EDX=%08x", EAX, EBX, ECX, EDX));
BX_INFO(("| ESP=%08x EBP=%08x ESI=%08x EDI=%08x", ESP, EBP, ESI, EDI));
}
BX_INFO(("| IOPL=%1u %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s",
BX_CPU_THIS_PTR get_IOPL(),

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@ -1909,6 +1909,9 @@ modrm_done:
case BX_SRC_RM:
i->setSrcReg(n, mod_mem ? BX_TMP_REGISTER : rm);
break;
case BX_SRC_VEC_RM:
i->setSrcReg(n, mod_mem ? BX_VECTOR_TMP_REGISTER : rm);
break;
#if BX_SUPPORT_AVX
case BX_SRC_MEM_NO_VVV:
if (mod_mem) break;

View File

@ -73,6 +73,7 @@ enum {
BX_SRC_EAX,
BX_SRC_NNN,
BX_SRC_RM,
BX_SRC_VEC_RM, // will use vector TMP register
BX_SRC_MEM_NO_VVV,
BX_SRC_VVV,
BX_SRC_VIB

View File

@ -2340,6 +2340,9 @@ modrm_done:
case BX_SRC_RM:
i->setSrcReg(n, mod_mem ? BX_TMP_REGISTER : rm);
break;
case BX_SRC_VEC_RM:
i->setSrcReg(n, mod_mem ? BX_VECTOR_TMP_REGISTER : rm);
break;
#if BX_SUPPORT_AVX
case BX_SRC_MEM_NO_VVV:
if (mod_mem) break;

File diff suppressed because it is too large Load Diff

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@ -61,7 +61,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wb(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 6
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit8u val_8 = read_virtual_byte(i->seg(), eaddr);
BX_WRITE_XMM_REG_LO_BYTE(BX_TMP_REGISTER, val_8);
BX_WRITE_XMM_REG_LO_BYTE(BX_VECTOR_TMP_REGISTER, val_8);
return BX_CPU_CALL_METHOD(i->execute2(), (i));
#endif
@ -72,7 +72,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ww(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 6
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u val_16 = read_virtual_word(i->seg(), eaddr);
BX_WRITE_XMM_REG_LO_WORD(BX_TMP_REGISTER, val_16);
BX_WRITE_XMM_REG_LO_WORD(BX_VECTOR_TMP_REGISTER, val_16);
return BX_CPU_CALL_METHOD(i->execute2(), (i));
#endif
@ -83,7 +83,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wss(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 6
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
BX_WRITE_XMM_REG_LO_DWORD(BX_TMP_REGISTER, val_32);
BX_WRITE_XMM_REG_LO_DWORD(BX_VECTOR_TMP_REGISTER, val_32);
return BX_CPU_CALL_METHOD(i->execute2(), (i));
#endif
@ -94,7 +94,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wsd(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 6
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
BX_WRITE_XMM_REG_LO_QWORD(BX_TMP_REGISTER, val_64);
BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
return BX_CPU_CALL_METHOD(i->execute2(), (i));
#endif
@ -108,7 +108,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wdq(bxInstruction_c *i)
if (BX_CPU_THIS_PTR mxcsr.get_MM())
read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_TMP_REGISTER));
else
read_virtual_xmmword_aligned(i->seg(), eaddr, &BX_READ_XMM_REG(BX_TMP_REGISTER));
read_virtual_xmmword_aligned(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
return BX_CPU_CALL_METHOD(i->execute2(), (i));
#endif
@ -118,7 +118,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOADU_Wdq(bxInstruction_c *i)
{
#if BX_CPU_LEVEL >= 6
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_TMP_REGISTER));
read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
return BX_CPU_CALL_METHOD(i->execute2(), (i));
#endif