small fix for LOAD_SS interrupts inhibit
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05c711b2b5
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@ -73,7 +73,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RETnear64(bxInstruction_c *i)
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Bit64u return_RIP = stack_read_qword(RSP);
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if (! IsCanonical(return_RIP)) {
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BX_ERROR(("RETnear64: canonical RIP violation %08x%08x", GET32H(return_RIP), GET32L(return_RIP)));
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BX_ERROR(("RETnear64: canonical RIP violation 0x%08x%08x", GET32H(return_RIP), GET32L(return_RIP)));
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exception(BX_GP_EXCEPTION, 0);
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}
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@ -373,9 +373,13 @@ bx_bool BX_CPU_C::handleAsyncEvent(void)
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// Certain instructions inhibit interrupts, some debug exceptions and single-step traps.
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void BX_CPU_C::inhibit_interrupts(unsigned mask)
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{
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BX_DEBUG(("inhibit interrupts mask = %d", mask));
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BX_CPU_THIS_PTR inhibit_mask = mask;
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BX_CPU_THIS_PTR inhibit_icount = get_icount() + 1; // inhibit for next instruction
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// Loading of SS disables interrupts until the next instruction completes
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// but only under assumption that previous instruction didn't load SS also.
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if (! interrupts_inhibited(BX_INHIBIT_INTERRUPTS_BY_MOVSS)) {
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BX_DEBUG(("inhibit interrupts mask = %d", mask));
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BX_CPU_THIS_PTR inhibit_mask = mask;
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BX_CPU_THIS_PTR inhibit_icount = get_icount() + 1; // inhibit for next instruction
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}
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}
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bx_bool BX_CPU_C::interrupts_inhibited(unsigned mask)
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