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Bochs/bochs/cpu
History
Stanislav Shwartsman d4bfbffdbb disasm fixes
2013-10-05 08:34:09 +00:00
..
cpudb
various fixes
2013-08-29 19:43:15 +00:00
fpu
fixed evex override mscsr controls
2013-09-19 21:38:25 +00:00
3dnow.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
access32.cc
first infrastructure changes to support EVEX prefix and AVX-512 extensions recently published by Intel
2013-07-26 12:50:56 +00:00
access64.cc
fixed typo in last commit
2013-08-04 19:47:19 +00:00
access.cc
VMX: CMPXHG instructions should always write to the memory destination, even if the value unchanged - it affects VMEXIT conditions for the full apic virtualization
2013-08-04 19:37:04 +00:00
aes.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
apic.cc
Move INTR, Local APIC INTR and SVN VINTR into new event interface (hardest part)
2012-10-03 20:24:29 +00:00
apic.h
preparations for apic regs virtualization feature described in SDM rev044
2012-09-06 15:21:08 +00:00
arith8.cc
CMPXHG should always write to memory dest - affects APIC virtualization VMEXIT conditions
2013-07-24 21:06:24 +00:00
arith16.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
arith32.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
arith64.cc
VMX: CMPXHG instructions should always write to the memory destination, even if the value unchanged - it affects VMEXIT conditions for the full apic virtualization
2013-08-04 19:37:04 +00:00
avx2.cc
infrastructure change for several AVX handlers to support any VL and only 128/256
2013-09-21 20:40:57 +00:00
avx512_mask16.cc
rename avx512_mask.cc
2013-09-08 20:15:52 +00:00
avx512_pfp.cc
infrastructure change for several AVX handlers to support any VL and only 128/256
2013-09-21 20:40:57 +00:00
avx_fma.cc
infrastructure change for several AVX handlers to support any VL and only 128/256
2013-09-21 20:40:57 +00:00
avx_pfp.cc
infrastructure change for several AVX handlers to support any VL and only 128/256
2013-09-21 20:40:57 +00:00
avx.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
bcd.cc
…
bit16.cc
optimize POPCNT implementation
2012-09-21 14:56:56 +00:00
bit32.cc
optimize POPCNT implementation
2012-09-21 14:56:56 +00:00
bit64.cc
optimize POPCNT implementation
2012-09-21 14:56:56 +00:00
bit.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
bmi32.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
bmi64.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
call_far.cc
…
cpu.cc
update (c) for few files
2013-09-05 18:40:14 +00:00
cpu.h
fixes for disasm
2013-10-02 19:23:34 +00:00
cpuid.h
First step of AVX512 support implementation (simplest)
2013-09-08 19:19:16 +00:00
crc32.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
crregs.cc
allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6
2013-04-17 19:46:11 +00:00
crregs.h
various fixes
2013-08-29 19:43:15 +00:00
ctrl_xfer16.cc
allow linking of traces cross 4K page boundary
2013-06-23 21:12:03 +00:00
ctrl_xfer32.cc
allow linking of traces cross 4K page boundary
2013-06-23 21:12:03 +00:00
ctrl_xfer64.cc
allow linking of traces cross 4K page boundary
2013-06-23 21:12:03 +00:00
ctrl_xfer_pro.cc
…
data_xfer8.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
data_xfer16.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
data_xfer32.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
data_xfer64.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
debugstuff.cc
one more step in the way towards avx-512 which have more vector registers
2013-08-24 12:12:10 +00:00
descriptor.h
…
disasm.cc
disasm fixes
2013-10-05 08:34:09 +00:00
event.cc
update (c) for few files
2013-09-05 18:40:14 +00:00
exception.cc
Added year 2013 to Copyright in all files already modified in new year
2013-01-19 20:45:03 +00:00
fetchdecode64.cc
disasm fixes
2013-10-05 08:34:09 +00:00
fetchdecode_avx.h
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
fetchdecode_evex.h
Make possible to deliver instruction name for disasm directly from bx_ia_opcode_name (some opcodes were renamed).
2013-09-26 18:54:32 +00:00
fetchdecode_sse.h
- Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon).
2013-09-30 19:01:42 +00:00
fetchdecode_x87.h
…
fetchdecode_xop.h
added evex decode tables - next step to populate them :)
2013-09-15 20:48:39 +00:00
fetchdecode.cc
disasm fixes
2013-10-05 08:34:09 +00:00
fetchdecode.h
disasm fixes
2013-10-05 08:34:09 +00:00
flag_ctrl_pro.cc
Move INTR, Local APIC INTR and SVN VINTR into new event interface (hardest part)
2012-10-03 20:24:29 +00:00
flag_ctrl.cc
Move INTR, Local APIC INTR and SVN VINTR into new event interface (hardest part)
2012-10-03 20:24:29 +00:00
fpu_emu.cc
…
gather.cc
first infrastructure changes to support EVEX prefix and AVX-512 extensions recently published by Intel
2013-07-26 12:50:56 +00:00
generic_cpuid.cc
merge AVX and SSE .bochsrc options to single SIMD option which will configure SSE and AVX together
2013-09-16 19:50:36 +00:00
generic_cpuid.h
…
i387.h
…
ia_opcodes.h
disasm fixes
2013-10-05 08:34:09 +00:00
icache.cc
fixes for disasm
2013-10-02 19:23:34 +00:00
icache.h
Thanks to avanced trace linking 256K entries ICache is not needed anymore.
2013-06-29 10:25:56 +00:00
init.cc
enable avx-512 in init.cc
2013-09-08 19:35:37 +00:00
instr.h
updates to internal disasm
2013-10-01 18:47:55 +00:00
io.cc
…
iret.cc
…
jmp_far.cc
…
lazy_flags.h
small optimization in lazy flags code
2012-09-06 19:49:14 +00:00
load.cc
implement first EVEX instructions - VADDPS/PD/SS/SD
2013-09-19 18:31:30 +00:00
logical8.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
logical16.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
logical32.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
logical64.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
Makefile.in
- Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon).
2013-09-30 19:01:42 +00:00
mmx.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
msr.cc
do not recognize MTRR MSRs when mtrr is not enabled
2013-04-17 19:59:56 +00:00
mult8.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
mult16.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
mult32.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
mult64.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
paging.cc
Fixed number of invocations of the BX_INSTR_LIN_ACCESS instrumentation callback in cpu/access32.cc, cpu/access64.cc and cpu/paging.cc specify the BX_READ memory access type where BX_RW really applies.
2013-07-24 18:54:18 +00:00
proc_ctrl.cc
- Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon).
2013-09-30 19:01:42 +00:00
protect_ctrl.cc
SVM: implemented missed RSM, LDTR READ/WRITE, TR READ/WRITE and IRET intercepts
2013-02-25 19:36:41 +00:00
rdrand.cc
Add RDRAND/RDSEED instructions support (+ disasm)
2012-10-09 15:16:48 +00:00
resolver.cc
…
ret_far.cc
…
segment_ctrl_pro.cc
…
segment_ctrl.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
sha.cc
properly added sha.cc to the tree
2013-07-24 18:56:37 +00:00
shift8.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
shift16.cc
fixed comments for SHLD/SHRD instructrions and make code a little more clear
2012-09-09 17:44:42 +00:00
shift32.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
shift64.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
simd_compare.h
name convention change - search and replace
2013-09-17 17:34:20 +00:00
simd_int.h
fixed evex override mscsr controls
2013-09-19 21:38:25 +00:00
simd_pfp.h
added masked operations to simd_pfp.h, optimize simd_int.h, rewrite dpps instr using new masked op from simd_pfp.h
2013-09-17 20:49:26 +00:00
smm.cc
implementation of virtual NMI
2013-03-05 21:12:43 +00:00
smm.h
…
soft_int.cc
fixed debug print message for BOUND instruction
2013-07-22 18:52:15 +00:00
sse_move.cc
- Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon).
2013-09-30 19:01:42 +00:00
sse_pfp.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
sse_rcp.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
sse_string.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
sse.cc
name convention change - search and replace
2013-09-17 17:34:20 +00:00
stack16.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
stack32.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
stack64.cc
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
2013-09-24 05:21:00 +00:00
stack.cc
properly added sha.cc to the tree
2013-07-24 18:56:37 +00:00
stack.h
…
string.cc
…
svm.cc
implementation of virtual NMI
2013-03-05 21:12:43 +00:00
svm.h
updates in CPUID defines after new published AMD SDM
2013-05-17 19:41:57 +00:00
tasking.cc
hw task switch tempdr6 hanlding fix
2013-03-15 08:26:22 +00:00
tbm32.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
tbm64.cc
Standartization of Bochs instruction handlers.
2012-08-05 13:52:40 +00:00
todo
added masked operations to simd_pfp.h, optimize simd_int.h, rewrite dpps instr using new masked op from simd_pfp.h
2013-09-17 20:49:26 +00:00
vapic.cc
fixed compilation issue
2012-11-05 06:41:10 +00:00
vm8086.cc
…
vmcs.cc
rename some VMX controls to match intel docs. added missed VMX consistency check
2013-02-24 20:22:22 +00:00
vmexit.cc
correctly signal bit 12 (nmi unblocking by iret) in vmx interruption info. todo: find how to implement it clean way
2013-03-06 21:11:23 +00:00
vmfunc.cc
implemented virtualization exception feature
2013-01-28 16:30:25 +00:00
vmx.cc
bugfix: vmx preemption timer vmexit should not wakeup CPU from sleep state. cpuid: added definitions from recently published intel SDM rev047
2013-06-04 20:28:27 +00:00
vmx.h
implemented vmentering to non-active cpu state
2013-04-09 15:43:15 +00:00
xmm.h
infrastructure change for several AVX handlers to support any VL and only 128/256
2013-09-21 20:40:57 +00:00
xop.cc
name convention change - search and replace
2013-09-17 17:34:20 +00:00
xsave.cc
update (c) for few files
2013-09-05 18:37:10 +00:00