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3046 Commits

Author SHA1 Message Date
Stanislav Shwartsman
374b8f615a softloat: implemented some more unsigned integer vs float conversions 2013-12-12 21:00:59 +00:00
Stanislav Shwartsman
9c179bade8 fixed evex.b validation condition 2013-12-10 21:48:17 +00:00
Stanislav Shwartsman
258a60f3fa Implemented AVX512 EXPAND/COMPRESS instructions 
Fixed memory access size for AVX shift instructions with shift count in memory
Do not allow to encode with EVEX.b instructions which do not support implicit broadcast 
softfloat: prepare float32/64 to uint32 conversion functions
 2013-12-10 21:09:46 +00:00
Stanislav Shwartsman
9a4d947a28 implemented avx-512 cvt*2si instructions 2013-12-09 20:52:39 +00:00
Stanislav Shwartsman
ccb1d86d6e code cleanups 2013-12-09 20:36:24 +00:00
Stanislav Shwartsman
d20c81417c Implemented VSHUFF32x4/64x2, VSHUFI32x4/64x2 AVX512 instructions 
Implemented AVX512 blend instructions
Do not allow setting of EVEX.b in reg form when no floating point exceptions could be generated by instruction
 2013-12-09 19:09:37 +00:00
Stanislav Shwartsman
4c78ca8c1c implemented mask load for most of the load+op instructions. all take care for instructions which do not support maksing of memory exceptions (shuffle and permutes) 2013-12-08 21:54:59 +00:00
Stanislav Shwartsman
8836d1aa2d added mask destination to disasm 2013-12-08 17:01:30 +00:00
Stanislav Shwartsman
0621f2a983 extend movddup/sldup/shdup to 512-bit vlen 2013-12-07 20:58:32 +00:00
Stanislav Shwartsman
d681bd868f fixed typo bug in xmm accessor definition 2013-12-07 20:48:41 +00:00
Stanislav Shwartsman
1e474ede51 fixed corrupted fetchdecode from svn rev12001 2013-12-07 20:30:27 +00:00
Stanislav Shwartsman
7ed017a56d implemented avx-512 gather/scatter 2013-12-07 20:15:56 +00:00
Stanislav Shwartsman
3154c3682e fixed decoding of RDRAND instructions 2013-12-07 07:17:04 +00:00
Stanislav Shwartsman
8c3d0aed7a added #UD condition for wrong EVEX.LL setting 2013-12-05 20:40:53 +00:00
Stanislav Shwartsman
ca2793ac76 Debugger: fixed param tree access to 64-bit variables (need to use get64() instead of get()) 
Debugger: if AVX-512 if not supported by current configuration do not print high256 of vector registers and zmm15..zmm31 in AVX command
Implement VBROADCASTF64x4, VBROADCASTF32x4, VBROADCASTFI64x4, VBROADCASTI32x4 AVX-512 instructions
Fetchdecode optimizations and bugfixes
 2013-12-05 19:17:16 +00:00
Stanislav Shwartsman
cfc8a0ad38 get rid of BX_MEM_NO_VVV decoding form (by splitting just two opcode groups using Split11B) 2013-12-04 20:15:22 +00:00
Stanislav Shwartsman
401caf168d Implemented VPERMILPS/PD AVX512 instructions 
Implemented VPTERNLOGD/Q AVX512 instructions
Implemented VPBROADCASTD/Q, VPBROADCASTPS/PD AVX512 instructions
Implemented VTEST* AVX512 instructions
Bugfixes in EVEX decoding tables
 2013-12-04 18:30:44 +00:00
Stanislav Shwartsman
a5153c348f fixed bugs in vcmp* avx512 opcodes 2013-12-03 22:16:22 +00:00
Stanislav Shwartsman
ccdd21a76b small diet to the avx-512 files - remove code duplication 2013-12-03 21:32:04 +00:00
Stanislav Shwartsman
18922fa1a3 added sanity check assert 2013-12-03 17:41:13 +00:00
Stanislav Shwartsman
6d9b16e0f7 Implemented VCMPPS/PD/SS/SD AVX512 instructions 
Implemented AVX512 shift/rotate instructions
 2013-12-03 15:44:23 +00:00
Stanislav Shwartsman
ba505677d2 bugfix for avx-512 masked load with mask all-zero 2013-12-02 20:46:26 +00:00
Stanislav Shwartsman
a85a9081b7 use shorter opcode names in the debug prints (skip the BX_IA_ prefix) 2013-12-02 20:06:59 +00:00
Stanislav Shwartsman
0683b00535 implemented more avx-512 opcodes 2013-12-02 19:16:48 +00:00
Stanislav Shwartsman
79456eb7e1 Implemented VPCMP* AVX512 instructions 
Implemented VMOVNTPS/PD/DQ AVX512 instructions
Implemented VMOVNTDQA AVX512 instruction
Bugfixes for AVX-512
 2013-12-02 18:05:18 +00:00
Stanislav Shwartsman
b78489628d make use of new accessor 2013-12-01 22:21:55 +00:00
Stanislav Shwartsman
287523e19a add dedicated 8bit low register accessor 2013-12-01 22:18:38 +00:00
Stanislav Shwartsman
4aa5199d0c added missing decoding for avx-512 fma flavor 2013-12-01 21:50:19 +00:00
Stanislav Shwartsman
4f158aef5f Fixed 8-bit opmask read 
Added opmask printout for AVX dump in dbg_main.cc
 2013-12-01 20:50:01 +00:00
Stanislav Shwartsman
c7b03eb00b implement avx-512 vpabsd/q instructions 2013-12-01 20:10:39 +00:00
Stanislav Shwartsman
2b83146ae2 more avx-512 instructions implemented 2013-12-01 19:39:18 +00:00
Stanislav Shwartsman
37d6403681 typo fix 2 2013-11-30 19:57:03 +00:00
Stanislav Shwartsman
32c91015a7 typo fix 2013-11-30 19:55:10 +00:00
Stanislav Shwartsman
fb2521a1fe implemented avx-512 vsqrt instructions 2013-11-30 19:33:08 +00:00
Stanislav Shwartsman
7db6c647b0 fixed memory access decoding in presence of evex prefix 2013-11-30 18:51:27 +00:00
Stanislav Shwartsman
ac82b38736 fixed typos causing compilation err 2013-11-30 18:39:22 +00:00
Stanislav Shwartsman
d082c6a0f9 implemented avx-512 masked load instructions 2013-11-30 18:37:25 +00:00
Stanislav Shwartsman
f76c85dca9 fixed 512-bit VL encoding in EVEX 2013-11-29 21:05:29 +00:00
Stanislav Shwartsman
b820b7af57 fixed zmm reg name in disasm 2013-11-29 20:52:34 +00:00
Stanislav Shwartsman
61deec2689 fixed zmm reg name in disasm 2013-11-29 20:48:31 +00:00
Stanislav Shwartsman
11f082af82 Implemented VMOVDQU32/VMOVDQA32/VMOVDQU64/VMOVDQA64 AVX512 instructions 
Implemented VCOMISS/VCOMISD/VUCOMISS/VUCOMISD AVX512 instructions
Fix vector length values for AVX-512 (512-bit vector should have length 4)
support mis-alignment #GP exception for VMOVAPS/PD/DQA32/DQ64 AVX512 instructions
move AVX512 load/store and register move operations into dedicated file avx512_move.cc
 2013-11-29 20:22:31 +00:00
Stanislav Shwartsman
031583dbd9 moved avx masked load/store operations to separate functions 2013-11-29 18:15:48 +00:00
Stanislav Shwartsman
21bb1363ac avx512 move functions introduced 2013-11-29 11:10:34 +00:00
Stanislav Shwartsman
1a735e9fdf bugfix for decoding segment prefix with EVEX 2013-11-28 21:28:50 +00:00
Stanislav Shwartsman
4680c22d0e implemented avx-512 masked register moves 2013-11-28 20:58:31 +00:00
Stanislav Shwartsman
b7f950aa5c more coding for avx512 2013-11-26 19:22:31 +00:00
Stanislav Shwartsman
1beeb33b51 implemented avx-512 fma instructions (in seperate file), fixes in avx-512 decoding tables 2013-11-25 20:42:24 +00:00
Stanislav Shwartsman
eb9778220d fixed decoding of 0f3a opcode map 2013-11-20 20:46:03 +00:00
Stanislav Shwartsman
b553591bb4 fixed compilation error under AVX 2013-11-20 17:33:57 +00:00
Stanislav Shwartsman
7f8429c643 fix code duplication in fetchdecode modules 2013-11-20 16:00:24 +00:00
Stanislav Shwartsman
9b22ba7edf softfloat: added float to uint64 conversion operations (based on QEMU patch by Tom Musta) 2013-11-10 19:08:12 +00:00
Stanislav Shwartsman
3be7e5884b added lock prefix used info into bx_Instriction_c and use it in disasm 2013-11-08 21:43:21 +00:00
Stanislav Shwartsman
4b03247287 fixed compilation error with vs2008 2013-10-25 05:36:10 +00:00
Stanislav Shwartsman
d9fc472ba7 Added VMEXIT instrumentation callback 
Fixed possible RSP corruption in SMP mode - the speculative_rsp variable might be not reset properly
 2013-10-23 21:18:19 +00:00
Stanislav Shwartsman
d52adaa0ee improve debug print to the log file which is printed in case of triple fault - tell VMX host/guest info 2013-10-20 16:41:34 +00:00
Stanislav Shwartsman
39f2f172b5 fixed PAUSE/NOP decoding bug in prev commit 2013-10-16 05:46:57 +00:00
Stanislav Shwartsman
8bcc8cf073 split PREFETCH opcode to Group16 for better disasm of bxInstruction_c 2013-10-15 21:21:28 +00:00
Stanislav Shwartsman
940c2a1c8e fixes for disasm 2013-10-15 17:19:18 +00:00
Stanislav Shwartsman
e1012f1165 add vmcs revision id interface to CPUID class 2013-10-14 18:35:56 +00:00
Stanislav Shwartsman
9fb7384e6b finish sse tables cleanup in disasm and fetchdecode 2013-10-11 20:09:51 +00:00
Stanislav Shwartsman
05d2bb2b9a fixed typo bug caused spurios #UD on SSE shift 2013-10-11 06:20:42 +00:00
Stanislav Shwartsman
5fc491e9b6 resolve aliases after actually decoding base instr 2013-10-11 05:58:30 +00:00
Stanislav Shwartsman
34025e469f resolve aliases after actually decoding base instr 2013-10-11 05:54:18 +00:00
Stanislav Shwartsman
582bf84bae apply same optimization to disasm as well 2013-10-10 21:00:26 +00:00
Stanislav Shwartsman
46e36b463b size-optimization for SSE opcode tables 2013-10-10 20:21:15 +00:00
Stanislav Shwartsman
2ec138f96e Apply patch from developers mailing list: 
bx_debug: allow expressions instead of numerals, where relevant
by Samium Gromoff

fix code duplication in fma handlers
 2013-10-09 20:04:05 +00:00
Stanislav Shwartsman
0b2e533a55 more avx512 instructions done 2013-10-09 19:45:36 +00:00
Stanislav Shwartsman
d6d1c707df implemented set of integer avx512 instructions 2013-10-08 19:44:52 +00:00
Stanislav Shwartsman
70230049fa opmask_ok support in fetchdecode32.cc 2013-10-08 18:40:10 +00:00
Stanislav Shwartsman
09254eb474 avx512 implementation fixes and next steps 2013-10-08 18:31:18 +00:00
Stanislav Shwartsman
8446685ba2 fixed FPU and MMX disasm 2013-10-07 20:55:43 +00:00
Stanislav Shwartsman
5724013e7d updates to AVX512 decoding and CPUID 2013-10-07 20:39:34 +00:00
Stanislav Shwartsman
cb0eee9456 disasm fixes 2013-10-07 19:02:53 +00:00
Stanislav Shwartsman
059769e2a6 disasm bug fixes 2013-10-06 20:42:13 +00:00
Stanislav Shwartsman
f0b917ca15 disasm fixes 2013-10-06 19:27:40 +00:00
Stanislav Shwartsman
e55611df21 disasm fixes 2013-10-06 19:04:52 +00:00
Stanislav Shwartsman
add8eea761 disasm bug fixes 2013-10-06 18:37:56 +00:00
Stanislav Shwartsman
f1f35a236c disasm: Id form in 32-bit should be sign-extended to 64-bit 2013-10-06 18:10:58 +00:00
Stanislav Shwartsman
a392612b03 fixed compilation err in cpu-level=3 config 2013-10-06 18:01:25 +00:00
Stanislav Shwartsman
e1512ccaf8 fixed warning under new MSDEV compiler 2013-10-05 19:35:00 +00:00
Stanislav Shwartsman
fd370a4d41 fixes in disasm, added example of using bxInstruction_c disasm into dbg_main.cc (commented out for now) 2013-10-05 19:32:09 +00:00
Stanislav Shwartsman
b1d703e47c fixed compilation with x86-64 off 2013-10-05 18:51:28 +00:00
Stanislav Shwartsman
67bce7af97 fixed memref disasm 2013-10-05 11:00:31 +00:00
Stanislav Shwartsman
d4bfbffdbb disasm fixes 2013-10-05 08:34:09 +00:00
Stanislav Shwartsman
c9a1f259cb fixed compilation error in new disasm module under SMP config 2013-10-04 18:14:54 +00:00
Stanislav Shwartsman
ba1249ed15 disasm fixes 2013-10-04 17:26:56 +00:00
Stanislav Shwartsman
85b0402668 fixes for disasm 2013-10-02 19:23:34 +00:00
Stanislav Shwartsman
8c60799e72 fix for new disasm interface 2013-10-01 20:17:21 +00:00
Stanislav Shwartsman
e592f81209 updates to internal disasm 2013-10-01 18:47:55 +00:00
Stanislav Shwartsman
147d788022 few fixes in new disasm module 2013-09-30 20:16:52 +00:00
Stanislav Shwartsman
fd383435f0 - Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon). 
The code already knows to disasm most of the opcodes with their operands.

- Split according to OSIZE opcodes RDFSBASE/WRFSBASE / RDGSBASE/WRGSBASE both for disasm and performance

- Minimize amount of opcode forms in ia_opcodes.h again.
  For example Udq means the same as Wdq but with no memory form.
 2013-09-30 19:01:42 +00:00
Stanislav Shwartsman
fa06b26c88 Make possible to deliver instruction name for disasm directly from bx_ia_opcode_name (some opcodes were renamed). 
Fixed bug in stack optimization in 64-bit mode (should result in some speedup)
ia_opcode.h - eliminate some OP_M cases when they actually meant "value of specific type in the memory"
example: "MOVBE Md, Gd" actually means "MOVBE Ed, Gd"which just not have reg/reg form.
 2013-09-26 18:54:32 +00:00
Stanislav Shwartsman
839b841c38 added register type to register source information in decoder 2013-09-24 09:50:25 +00:00
Stanislav Shwartsman
ff79cbd596 Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm) 
The end goal will be also merging of disasm and cpu decoder to one module and remove the disasm.

Two bug fixes on the way:
TBM: fixed 64-bit TBM instructions with memory access (did 32-bit load instead of 64-bit)
BMI2: fixed operands order for PEXT/PDEP instructions
AVX2: fixed gather instruction decoding bug from decoder alias commit
 2013-09-24 05:21:00 +00:00
Stanislav Shwartsman
f791802286 infrastructure change for several AVX handlers to support any VL and only 128/256 2013-09-21 20:40:57 +00:00
Stanislav Shwartsman
404b8b1475 move end of trace indication to separate 'flags' field of bx_ia_opcode. this saves a lot of code duplication and simplifies the decode tables. also on the way found missing SVM opcodes that missed 'end of trace' mark 2013-09-21 18:58:01 +00:00
Stanislav Shwartsman
047b17d415 fixed typo in makefile 2013-09-21 10:52:18 +00:00
Stanislav Shwartsman
cd55ace8c8 fixed compilation err, rename opcode and handler functions for PUSHA/POPA instructions 2013-09-21 10:03:49 +00:00
Stanislav Shwartsman
2526282ed9 small additions for avx512 2013-09-20 18:27:33 +00:00
Stanislav Shwartsman
3803ac7fbe fixed evex override mscsr controls 2013-09-19 21:38:25 +00:00
Stanislav Shwartsman
0441f82b02 implement more AVX512 instructions 2013-09-19 20:35:55 +00:00
Stanislav Shwartsman
55f9155bc5 add new file 2013-09-19 18:32:39 +00:00
Stanislav Shwartsman
8b3a0acde9 implement first EVEX instructions - VADDPS/PD/SS/SD 2013-09-19 18:31:30 +00:00
Stanislav Shwartsman
8e71a86542 seve vex prefix value to the indication of vex prefix used 2013-09-18 18:01:48 +00:00
Stanislav Shwartsman
da0e2baf22 avoid segfault when decoding incorrectly encoded kmask op 2013-09-17 21:01:24 +00:00
Stanislav Shwartsman
d169860f6c added masked operations to simd_pfp.h, optimize simd_int.h, rewrite dpps instr using new masked op from simd_pfp.h 2013-09-17 20:49:26 +00:00
Stanislav Shwartsman
aa25c1db6a name convention change - search and replace 2013-09-17 17:34:20 +00:00
Stanislav Shwartsman
b6c39a3176 merge AVX and SSE .bochsrc options to single SIMD option which will configure SSE and AVX together 2013-09-16 19:50:36 +00:00
Stanislav Shwartsman
1cebe5f83d rellback part of commit with xmm register access interface changes - doesn't work for big endian hosts 2013-09-16 19:10:42 +00:00
Stanislav Shwartsman
0cb0acc30f added evex decode tables - next step to populate them :) 2013-09-15 20:48:39 +00:00
Stanislav Shwartsman
1e1fa45cac fixed makefile after file rename 2013-09-08 20:16:38 +00:00
Stanislav Shwartsman
e4a99b4294 rename avx512_mask.cc 2013-09-08 20:15:52 +00:00
Stanislav Shwartsman
132714bf29 fixed compilation w/o EVEX support enabled 2013-09-08 19:45:46 +00:00
Stanislav Shwartsman
8881800b1f enable avx-512 in init.cc 2013-09-08 19:35:37 +00:00
Stanislav Shwartsman
7297323c69 First step of AVX512 support implementation (simplest) 
decode and implement KMASK manipulation instructions
disasm: coming soon
 2013-09-08 19:19:16 +00:00
Stanislav Shwartsman
6ddfe5fc3b reorg avx opcodes in ia_opcodes.h. place v128 and v256 opcodes together. todo: find way to merge them sometimes 2013-09-07 18:52:31 +00:00
Stanislav Shwartsman
a6b85d9443 compress xop tables for vex.l - smaller binary size 2013-09-06 18:56:46 +00:00
Stanislav Shwartsman
0fd4e3450c update (c) for few files 2013-09-05 18:40:14 +00:00
Stanislav Shwartsman
2c9cf33b2f update (c) for few files 2013-09-05 18:37:10 +00:00
Stanislav Shwartsman
69f947cef2 fixes and small optimizations for avx and xop decoding 2013-09-05 18:29:50 +00:00
Stanislav Shwartsman
f36364bc65 it doesn't matter if it was vex or xop ... 2013-09-05 17:52:47 +00:00
Volker Ruppert
7c0a261751 final fix for BX_CPU_LEVEL 4 2013-09-05 06:42:17 +00:00
Stanislav Shwartsman
897bf85494 fixed bug in fma4 decoding - found now thanks to new tables re-org 2013-09-04 18:37:49 +00:00
Stanislav Shwartsman
2f957bf142 re-arrange AVX/XOP table to avoid redundant multiplication in decode. TODO: compress the tables 2x using aliases 2013-09-04 18:36:01 +00:00
Stanislav Shwartsman
bb695fd5f5 remove redundant (and incorrect) check 2013-09-04 16:47:52 +00:00
Stanislav Shwartsman
81affbe328 fixed incorrect lock prefix detection 2013-08-30 20:08:04 +00:00
Stanislav Shwartsman
c2558f52d6 generic_cpuid: fixed xsave cpuid leaf when xsave is disabled (need to clear output) 2013-08-29 19:58:31 +00:00
Stanislav Shwartsman
59c65151f5 various fixes 2013-08-29 19:43:15 +00:00
Stanislav Shwartsman
7e2ab5ca81 decode simplification for AMD XOP prefix 2013-08-28 19:56:19 +00:00
Stanislav Shwartsman
5d61c19b0b evex support - step2 2013-08-27 20:47:24 +00:00
Stanislav Shwartsman
5fe5bf1ed6 fixed alias typo corrupting avx opcodes 2013-08-27 19:45:31 +00:00
Stanislav Shwartsman
c5f72033ad correct vzeroupper opcode 2013-08-27 06:57:48 +00:00
Stanislav Shwartsman
735154a755 oops, typo bug in prev commit 2013-08-24 19:46:04 +00:00
Stanislav Shwartsman
65e6760915 small decode optimization 2013-08-24 19:29:43 +00:00
Stanislav Shwartsman
748a0da712 one more step in the way towards avx-512 which have more vector registers 2013-08-24 12:12:10 +00:00
Stanislav Shwartsman
701d88388e fixed FCS/FDS deprecation 2013-08-22 20:21:36 +00:00
Stanislav Shwartsman
3a7e336cb6 more opcode alias - now VEX.W alias 2013-08-21 18:45:36 +00:00
Stanislav Shwartsman
115ec37a4c make decoder tables smaller using decode aliases 2013-08-21 04:52:49 +00:00
Stanislav Shwartsman
33a7063e60 bug fixes 2013-08-05 15:33:41 +00:00
Stanislav Shwartsman
362b99eba0 fixed typo in last commit 2013-08-04 19:47:19 +00:00
Stanislav Shwartsman
3fabcb00b7 VMX: CMPXHG instructions should always write to the memory destination, even if the value unchanged - it affects VMEXIT conditions for the full apic virtualization 
Fixed also CMPXHG16B instruction (last one, others were fixed earlier)
 2013-08-04 19:37:04 +00:00
Stanislav Shwartsman
7005afd3a8 clean up BxRepeatable attribute - not needed anymore after VL AVX field moved to new location 2013-07-26 15:42:49 +00:00
Stanislav Shwartsman
2dbe81db51 first infrastructure changes to support EVEX prefix and AVX-512 extensions recently published by Intel 2013-07-26 12:50:56 +00:00
Stanislav Shwartsman
0da1d659d3 CMPXHG should always write to memory dest - affects APIC virtualization VMEXIT conditions 2013-07-24 21:06:24 +00:00
Stanislav Shwartsman
54d3dc4353 properly added sha.cc to the tree 2013-07-24 18:56:37 +00:00
Stanislav Shwartsman
2357dc5ccc Fixed number of invocations of the BX_INSTR_LIN_ACCESS instrumentation callback in cpu/access32.cc, cpu/access64.cc and cpu/paging.cc specify the BX_READ memory access type where BX_RW really applies. 
SF Patch #1335 by Mateusz Jurczyk
 2013-07-24 18:54:18 +00:00
Stanislav Shwartsman
4c7031962e added new sha.cc file 2013-07-24 18:47:28 +00:00
Stanislav Shwartsman
852b5c3749 implemented SHA new instructions announced in recent Intel SDM extensions document rev015 2013-07-24 18:44:22 +00:00
Stanislav Shwartsman
fd71b03353 add some definitions introduced in recent Intel SDM extensions document (rev015) 2013-07-23 20:51:52 +00:00
Stanislav Shwartsman
4a36fb3edc fixed debug print message for BOUND instruction 2013-07-22 18:52:15 +00:00