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fixed SF bug #1318 dbg: several issues with 'set' command

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This commit is contained in:
Stanislav Shwartsman 2012-11-06 20:01:02 +00:00
parent 110fd4b92a
commit edf4ea4c74
8 changed files with 1383 additions and 1389 deletions
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20
bochs/bx_debug/dbg_main.cc
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@ -2759,11 +2759,8 @@ void bx_dbg_set_symbol_command(const char *symbol, Bit32u val)
bx_bool is_OK = false;
symbol++; // get past '$'
if (!strcmp(symbol, "eip")) {
is_OK = BX_CPU(dbg_cpu)->dbg_set_reg(BX_DBG_REG_EIP, val);
}
else if (!strcmp(symbol, "eflags")) {
is_OK = BX_CPU(dbg_cpu)->dbg_set_reg(BX_DBG_REG_EFLAGS, val);
if (!strcmp(symbol, "eflags")) {
is_OK = BX_CPU(dbg_cpu)->dbg_set_eflags(val);
}
else if (!strcmp(symbol, "cpu")) {
if (val >= BX_SMP_PROCESSORS) {
@ -2801,7 +2798,7 @@ void bx_dbg_set_symbol_command(const char *symbol, Bit32u val)
}
if (!is_OK) {
dbg_printf("Error: could not set register '%s'.\n", symbol);
dbg_printf("Error: could not set register '%s'\n", symbol);
}
}
@ -3735,6 +3732,17 @@ void bx_dbg_set_reg64_value(unsigned reg, Bit64u value)
dbg_printf("Unknown 64B register [%d] !!!\n", reg);
}
void bx_dbg_set_rip_value(bx_address value)
{
#if BX_SUPPORT_X86_64
if ((value >> 32) != 0 && ! BX_CPU(dbg_cpu)->long64_mode()) {
dbg_printf("Cannot set EIP to 64-bit value hen not in long64 mode !\n");
}
else
#endif
BX_CPU(dbg_cpu)->dbg_set_eip(value);
}
Bit16u bx_dbg_get_selector_value(unsigned int seg_no)
{
bx_dbg_sreg_t sreg;

14
bochs/bx_debug/debug.h
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@ -219,6 +219,7 @@ void bx_dbg_set_reg8h_value(unsigned reg, Bit8u value);
void bx_dbg_set_reg16_value(unsigned reg, Bit16u value);
void bx_dbg_set_reg32_value(unsigned reg, Bit32u value);
void bx_dbg_set_reg64_value(unsigned reg, Bit64u value);
void bx_dbg_set_rip_value(bx_address value);
void bx_dbg_load_segreg(unsigned reg, unsigned value);
bx_address bx_dbg_get_laddr(Bit16u sel, bx_address ofs);
void bx_dbg_step_over_command(void);
@ -345,19 +346,6 @@ typedef enum {
BREAK_POINT_MAGIC, BREAK_POINT_READ, BREAK_POINT_WRITE, BREAK_POINT_TIME
} break_point_t;
#define BX_DBG_REG_EIP 10
#define BX_DBG_REG_EFLAGS 11
#define BX_DBG_REG_CS 20
#define BX_DBG_REG_SS 21
#define BX_DBG_REG_DS 22
#define BX_DBG_REG_ES 23
#define BX_DBG_REG_FS 24
#define BX_DBG_REG_GS 25
#define BX_DBG_REG_CR0 30
#define BX_DBG_REG_CR2 32
#define BX_DBG_REG_CR3 33
#define BX_DBG_REG_CR4 34
#define BX_DBG_PENDING_DMA 1
#define BX_DBG_PENDING_IRQ 2

2648
bochs/bx_debug/parser.c
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File diff suppressed because it is too large Load Diff

13
bochs/bx_debug/parser.h
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@ -1,8 +1,9 @@
/* A Bison parser, made by GNU Bison 2.5. */
/* A Bison parser, made by GNU Bison 2.4.2. */
/* Bison interface for Yacc-like parsers in C
/* Skeleton interface for Bison's Yacc-like parsers in C
Copyright (C) 1984, 1989-1990, 2000-2011 Free Software Foundation, Inc.
Copyright (C) 1984, 1989-1990, 2000-2006, 2009-2010 Free Software
Foundation, Inc.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -254,7 +255,7 @@
typedef union YYSTYPE
{
/* Line 2068 of yacc.c */
/* Line 1685 of yacc.c */
#line 13 "parser.y"
char *sval;
@ -263,8 +264,8 @@ typedef union YYSTYPE
/* Line 2068 of yacc.c */
#line 268 "y.tab.h"
/* Line 1685 of yacc.c */
#line 269 "y.tab.h"
} YYSTYPE;
# define YYSTYPE_IS_TRIVIAL 1
# define yystype YYSTYPE /* obsolescent; will be withdrawn */

11
bochs/bx_debug/parser.y
View File

@ -485,6 +485,14 @@ set_command:
{
bx_dbg_set_reg64_value($2, $4);
}
| BX_TOKEN_SET BX_TOKEN_REG_EIP '=' expression '\n'
{
bx_dbg_set_rip_value($4);
}
| BX_TOKEN_SET BX_TOKEN_REG_RIP '=' expression '\n'
{
bx_dbg_set_rip_value($4);
}
| BX_TOKEN_SET BX_TOKEN_SEGREG '=' expression '\n'
{
bx_dbg_load_segreg($2, $4);
@ -1109,7 +1117,8 @@ help_command:
| BX_TOKEN_HELP BX_TOKEN_SET '\n'
{
dbg_printf("set <regname> = <expr> - set register value to expression\n");
dbg_printf("set $reg = val - set CPU register to value val\n");
dbg_printf("set eflags = <expr> - set eflags value to expression, not all flags can be modified\n");
dbg_printf("set $cpu = <N> - move debugger control to cpu <N> in SMP simulation\n");
dbg_printf("set $auto_disassemble = 1 - cause debugger to disassemble current instruction\n");
dbg_printf(" every time execution stops\n");
dbg_printf("set u|disasm|disassemble on - same as 'set $auto_disassemble = 1'\n");

3
bochs/cpu/cpu.h
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@ -3588,7 +3588,8 @@ public: // for now...
#if BX_DEBUGGER
BX_SMF void dbg_take_dma(void);
BX_SMF bx_bool dbg_set_reg(unsigned reg, Bit32u val);
BX_SMF bx_bool dbg_set_eflags(Bit32u val);
BX_SMF void dbg_set_eip(bx_address val);
BX_SMF bx_bool dbg_get_sreg(bx_dbg_sreg_t *sreg, unsigned sreg_no);
BX_SMF bx_bool dbg_set_sreg(unsigned sreg_no, bx_segment_reg_t *sreg);
BX_SMF void dbg_get_tr(bx_dbg_sreg_t *sreg);

57
bochs/cpu/debugstuff.cc
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@ -271,41 +271,38 @@ void BX_CPU_C::debug(bx_address offset)
#if BX_DEBUGGER
bx_bool BX_CPU_C::dbg_set_reg(unsigned reg, Bit32u val)
void BX_CPU_C::dbg_set_eip(bx_address val)
{
RIP = BX_CPU_THIS_PTR prev_rip = val;
invalidate_prefetch_q();
}
bx_bool BX_CPU_C::dbg_set_eflags(Bit32u val)
{
// returns 1=OK, 0=can't change
Bit32u current_sys_bits;
switch (reg) {
case BX_DBG_REG_EIP:
RIP = BX_CPU_THIS_PTR prev_rip = val;
invalidate_prefetch_q();
return(1);
case BX_DBG_REG_EFLAGS:
if (val & 0xffff0000) {
BX_INFO(("dbg_set_reg: can not set upper 16 bits of eflags."));
return(0);
}
// make sure none of the system bits are being changed
current_sys_bits = ((BX_CPU_THIS_PTR getB_NT()) << 14) |
(BX_CPU_THIS_PTR get_IOPL () << 12) |
((BX_CPU_THIS_PTR getB_TF()) << 8);
if (current_sys_bits != (val & 0x0000f100)) {
BX_INFO(("dbg_set_reg: can not modify NT, IOPL, or TF."));
return(0);
}
BX_CPU_THIS_PTR set_CF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_PF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_AF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_ZF(val & 0x01); val >>= 1;
BX_CPU_THIS_PTR set_SF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_IF(val & 0x01); val >>= 1;
BX_CPU_THIS_PTR set_DF(val & 0x01); val >>= 1;
BX_CPU_THIS_PTR set_OF(val & 0x01);
return(1);
if (val & 0xffff0000) {
BX_INFO(("dbg_set_eflags: can't set upper 16 bits of EFLAGS !"));
return(0);
}
return(0);
// make sure none of the system bits are being changed
Bit32u current_sys_bits = ((BX_CPU_THIS_PTR getB_NT()) << 14) |
(BX_CPU_THIS_PTR get_IOPL () << 12) |
((BX_CPU_THIS_PTR getB_TF()) << 8);
if (current_sys_bits != (val & 0x0000f100)) {
BX_INFO(("dbg_set_eflags: can't modify NT, IOPL, or TF !"));
return(0);
}
BX_CPU_THIS_PTR set_CF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_PF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_AF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_ZF(val & 0x01); val >>= 1;
BX_CPU_THIS_PTR set_SF(val & 0x01); val >>= 2;
BX_CPU_THIS_PTR set_DF(val & 0x01); val >>= 1;
BX_CPU_THIS_PTR set_OF(val & 0x01);
return(1);
}
unsigned BX_CPU_C::dbg_query_pending(void)

6
bochs/doc/docbook/user/user.dbk
View File

@ -6957,9 +6957,9 @@ From here, you may use the following commands:
<para>
<screen>
set reg = expr Change a CPU register to value of expression.
Currently only general purpose registers are supported,
you may not change:
eflags, eip, cs, ss, ds, es, fs, gs.
Currently only general purpose registers and instruction pointer
are supported. You may not change eflags, segment registers,
floating point or SIMD registers.
Examples: set eax = 2+2/2
set esi = 2*eax+ebx