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949 Commits

Author SHA1 Message Date
Stanislav Shwartsman
19750b0324 Fixed highest_priority_int calculation function 
Fixed I/O APIC ID for 8CPU configuration to match BIOS tables
Remove I/O APIC initialization when INIT IPI received
 2005-04-27 18:09:27 +00:00
Stanislav Shwartsman
494af8b1f3 Fixed segmentation fault for 2CPU cfg 2005-04-26 19:19:58 +00:00
Stanislav Shwartsman
76af95a9a7 Added debug prints for APIC 2005-04-26 18:30:30 +00:00
Stanislav Shwartsman
4444dc095b Fixed SIGSEGV in 8cpu configuration 2005-04-23 17:52:51 +00:00
Stanislav Shwartsman
77e398b47b Added comments for cpuid flags 2005-04-20 18:12:54 +00:00
Stanislav Shwartsman
501cca67c2 Fix compilation err 2005-04-18 17:41:15 +00:00
Stanislav Shwartsman
163d28b0e8 dos2unix 2005-04-18 17:28:30 +00:00
Stanislav Shwartsman
8482511af3 Fix compilation errors 
Add BX_INFO for writing to TSC_MSR (not implemented message)
 2005-04-18 17:21:34 +00:00
Stanislav Shwartsman
caa0648188 Move duplicated code to separate function 
And fix a bug I added by previous merge
 2005-04-17 21:51:59 +00:00
Stanislav Shwartsman
6fa52214b0 Canonical address check for RIP in x86-64 2005-04-17 18:54:54 +00:00
Stanislav Shwartsman
fd02a03516 Fixed broadcast mode 2005-04-16 15:55:00 +00:00
Stanislav Shwartsman
495102369f Fix PAE functionality 2005-04-14 16:44:40 +00:00
Stanislav Shwartsman
0b6a3afb53 Fixed compilation problem in segment_ctrl.pro 
Restore back the workaround for segmentation checking in exception.cc until the better solution will be found
 2005-04-13 17:13:05 +00:00
Stanislav Shwartsman
9b30cad4c4 Just software changes: 
1. Separate interrupt function to 3 different functions (real_mode, long_mode, pmode)
2. Added PANIC messages for not implemented FAR CALL, FAR JUMP and FAR RET in long mode
 2005-04-12 18:08:10 +00:00
Stanislav Shwartsman
c2c18d2aa4 Clean fix for loading NULL SS selector in exception.cc 2005-04-11 18:53:04 +00:00
Stanislav Shwartsman
1755589376 Separate pageWriteStamp from ICACHE. The pageWriteStamp has totally independant structure and could be used in future with icache structure. Also it could be significantly speeded up using BX_SMF analog constructions. 2005-04-10 19:42:48 +00:00
Stanislav Shwartsman
6fd9f82c35 Fixed typo in apic.cc 
Small speedup for arith64.cc (redundant modC0() call ellimination)
Cleanup
 2005-04-02 18:49:44 +00:00
Volker Ruppert
a5fb44c340 - changed data type of bulkIOHostAddr to Bit8u* (fixed compilation on 64 bit hosts) 2005-04-02 11:30:08 +00:00
Stanislav Shwartsman
6d491de4d3 Fixed bug with jumping from long mode when executing interrupt 2005-03-30 22:31:03 +00:00
Stanislav Shwartsman
8e01acfaa1 Change non-error messages from BX_ERROR to BX_DEBUG 2005-03-30 21:43:08 +00:00
Stanislav Shwartsman
0f7f728e86 Added debug messages for interrupt function in long mode 
Added mode switch debug prints
 2005-03-30 20:53:04 +00:00
Stanislav Shwartsman
52041f60d4 Support for X86_64 in debug CPU method 
Fixed debug messages printed from read_virtual_checks
 2005-03-30 19:56:02 +00:00
Stanislav Shwartsman
e5c3e3c262 CPU mode enumeration changed 2005-03-29 22:18:13 +00:00
Stanislav Shwartsman
619942cf9a Enable SYSENTER/SYSEXIT together with x86-64 support, these instructions used by gentoo amd64 LiveCD image (at least it WRMSR to SYSENTER MSRs). 
SYSENTER/SYSEXIT is not recognized in long mode but it could be used i any other mode without problem
 2005-03-29 21:59:44 +00:00
Stanislav Shwartsman
da9091f04a Fixed compatability mode execution bug, compatability mode and long mode should be treated as protected for all protected_mode() checks 2005-03-29 21:37:06 +00:00
Stanislav Shwartsman
0ed560ed3d Enable info fpu command in debugger 2005-03-28 18:19:02 +00:00
Stanislav Shwartsman
22098eefa2 Removed unused instruction (function) methods which were generated as a result of the initial implementation of AMD64 support. 2005-03-28 06:29:22 +00:00
Kevin Lawton
831afe7c40 Removed unused instruction (function) prototypes which were generated as 
a result of the initial implementation of AMD64 support.  These appear
  to have been cut-n-paste vestiges.
 2005-03-25 21:33:47 +00:00
Kevin Lawton
e6cb602231 Moved macros for duplicate SSE/SSE2 functions from fetchdecode.h to 
cpu.h, and defined function prototypes for the case where bochs
  is compiled with a new #define (called StandAloneDecoder) is set.
  This allows for the decoder to be tested separately from bochs.
 2005-03-23 01:45:16 +00:00
Kevin Lawton
4e03c4448c Added some comment tags so that a script can pull out relevant parts 
of the decoder to test it in standalone mode.  A few lines in cpu.h
  were re-arranged to make this easy, but no real lines of code were
  changed or generated.
Changed a few PANICs to INFOs after testing corresponding cases.
 2005-03-22 18:19:55 +00:00
Stanislav Shwartsman
c3fd89eceb More accurate fix for cpu_online_map ellimination 2005-03-20 18:33:02 +00:00
Stanislav Shwartsman
1e37312c14 Remove code duplication 2005-03-20 18:08:46 +00:00
Stanislav Shwartsman
3570f5f629 Reverting back RETF instruction changes made by Kevin Lawton 2005-03-20 18:01:01 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files. 
One more small change in APIC
 2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
f77ddd9701 Remove cpu_onlline_map varaible, it wasn't initialized properly and might cause APIC problems 2005-03-19 18:43:00 +00:00
Stanislav Shwartsman
e6e9dd3825 Extend Bochs instrumentation 
Compatability fixes
 2005-03-17 20:50:57 +00:00
Stanislav Shwartsman
6e53a54907 Extend cpu_mode for : 
#define BX_MODE_IA32_REAL       0x0   // CR0.PE=0
#define BX_MODE_IA32_PROTECTED  0x1   // CR0.PE=1, EFLAGS.VM=0
#define BX_MODE_IA32_V8086      0x2   // CR0.PE=1, EFLAGS.VM=1
#define BX_MODE_LONG_COMPAT     0x3   // EFER.LMA = 0, EFER.LME = 1
#define BX_MODE_LONG_64         0x4   // EFER.LMA = 1, EFER.LME = 1
 2005-03-15 19:00:04 +00:00
Stanislav Shwartsman
189e55885d put VME initial code in BX_SUPPORT_VME ifdefs 2005-03-13 20:18:37 +00:00
Stanislav Shwartsman
e3bd4e2b34 Update recent closed byg reports 
Remove redundant debug prints in VERR instruction emulation
 2005-03-13 18:20:26 +00:00
Stanislav Shwartsman
fd13784231 Small cleanup in access.cc 
VME feature code should be valid only for CPU LEVEL >= 4
 2005-03-12 19:34:18 +00:00
Stanislav Shwartsman
6a36385743 Add more comments for loading segment register in real mode 2005-03-12 18:38:56 +00:00
Stanislav Shwartsman
5a393d2399 Fix for PANIC 
1162042 Duke Nukem 3D: >>PANIC<< iret: VM set on stack, CPL!=0
according to Intel and AMD docs the behaviour wasn't correct
 2005-03-12 18:09:32 +00:00
Stanislav Shwartsman
2a5a5c2de5 Fixed compilation error for 486 CPU 
small fixes for IRET instructionm
 2005-03-12 16:40:14 +00:00
Stanislav Shwartsman
714b9c9d22 Added ICACHE statistics 2005-03-10 21:22:15 +00:00
Stanislav Shwartsman
24fa5935c1 Getting little bit closer to VME feature 2005-03-09 22:01:13 +00:00
Stanislav Shwartsman
031cd64827 More code review - changing BX_PANIC to BX_ERROR where implentation matches Intel docs. Also solved two cases when TS exception generated instead of GPF 2005-03-04 21:03:22 +00:00
Stanislav Shwartsman
c30e89289b Fixed R/O pages access in CPL=3 (TLB accessBits bug) 2005-03-03 20:24:52 +00:00
Stanislav Shwartsman
709b218c10 Reduce metaInfo initialization in fetchDecode 2005-03-01 21:44:01 +00:00
Stanislav Shwartsman
23e2895f8e Fixed interrupt function for 
286 int/trap gate, in vm8086 mode
 2005-03-01 20:55:25 +00:00
Stanislav Shwartsman
dafc5fd193 Fix extdb.cc compilation error 2005-03-01 17:49:34 +00:00
Stanislav Shwartsman
b25088bf2f Merge patch [1153327] ignore segment bases in x86-64 by Avi Kivity 2005-02-28 18:56:05 +00:00
Stanislav Shwartsman
aeec5a6c5a just dos2unix 2005-02-27 18:14:29 +00:00
Stanislav Shwartsman
c583a6f9cf move segments and descriptors definitions and macroses for new descriptor.h 2005-02-27 17:41:45 +00:00
Stanislav Shwartsman
6e773a652a Fix SYSENTER/SYSEXIT instructions 2005-02-26 12:00:22 +00:00
Stanislav Shwartsman
f483bcfd70 Fixed possible memory corruption in case of wrong size APIC read (used by WinNT MP) 
Compiler compitability fixes (use 0 and 1 instead of true and false)
 2005-02-25 20:53:14 +00:00
Stanislav Shwartsman
0e472af877 Merge patch: 
[1151012] allow null ss on x86-64 by Avi Kivity
 2005-02-24 19:50:36 +00:00
Stanislav Shwartsman
ef197b2a56 Fixed compilation error in paging.cc 
Some fixed for APIC in P4 processor
APIC patch by mrieker cleaned even more
 2005-02-23 21:18:24 +00:00
Stanislav Shwartsman
830ca51b91 Merge patches: 
1149720 critical - fix x86-64 SYSCALL RFLAGS masking
 1149758 wrmsr efer fix
 2005-02-23 18:00:07 +00:00
Stanislav Shwartsman
41578589c1 Merge two patches by Avi Kivity (avik) 2005-02-22 18:24:19 +00:00
Stanislav Shwartsman
76e0f2cc95 Fixed AMD cpuid 2005-02-20 20:02:54 +00:00
Stanislav Shwartsman
3351723e70 Fixed P4 extended CPUID 2005-02-17 06:07:58 +00:00
Stanislav Shwartsman
2bfc842c09 CPU fixes by Kevin Lawton 2005-02-16 21:27:21 +00:00
Stanislav Shwartsman
169769504e Changes BX_PANIC to BX_INFO in some more cases (patch by Kavin Lawton) 2005-02-16 19:59:03 +00:00
Stanislav Shwartsman
91526a90b3 Merged patch 
[1123895] x86-64 gdb/debugger fixes by Avi Kivity
 2005-02-16 18:58:48 +00:00
Stanislav Shwartsman
a01347f17d Extended information for AMD and Intel processors (CPUID) 2005-02-14 21:17:20 +00:00
Stanislav Shwartsman
b69345225b Correct model_id for Pentium MMX in CPUID 2005-02-13 21:20:48 +00:00
Stanislav Shwartsman
e7e149d21a Changed PANIC message to ERROR message. This should fix an error message reported in Bug Tracker - PANIC after Reset button is pushed. 2005-02-13 18:36:52 +00:00
Stanislav Shwartsman
9492942ae6 In 64-bit mode, the CS, DS, ES, and SS segment overrides are ignored. 2005-02-12 19:25:33 +00:00
Stanislav Shwartsman
799403620e Small speedup in boundaryFetch method 2005-02-12 14:00:13 +00:00
Stanislav Shwartsman
c1284af614 Removed already obsolete patch.smp-pge-pic-poll 
Small cleanup in apic.cc/apic.h
I would like to test patch.apic-mrieker so I need more clean apic code
 2005-02-08 18:41:33 +00:00
Stanislav Shwartsman
e6efa3a451 - exceeding the instruction length limit of 15 bytes (this only can 
occur when redundant prefixes are placed before an instruction)
    generate #GP(0) (Stanislav)
 2005-02-05 20:56:44 +00:00
Stanislav Shwartsman
153bec9d1a Fixed compilation errors when CPU-LEVEL=3 2005-02-03 22:24:45 +00:00
Stanislav Shwartsman
9305305493 First (and may be last) step to implementation of 
Virtual Mode Extensions (VME)
and
Protected Mode Virtual Interrupts (PVI)
instructions STI and CLI have full support of these features, according to Intel docs. Need to check POPF and PUSHF instructions and afterwise VME and PVI extensions could be enabled in CR4
 2005-02-03 22:08:34 +00:00
Stanislav Shwartsman
5701f62a42 Fix compiler warnings with -wall 2005-02-03 18:43:23 +00:00
Stanislav Shwartsman
d27e81bdac -in case of --enable-ignore-bad-msr enabled read ignored MSRs as zeRo 
- enabled #DE and #TSD and #MCE bits in CR4 register, previosly setting
    of one of these bits generated #GP(0) (Stanislav, Volker Ruppert)
 2005-02-03 18:25:10 +00:00
Stanislav Shwartsman
3fdbf48a69 Fixed bug in interrupt function in real mode 
Style change
Update CHANGES
Remove patch.v8086-exception.lightcone because it already in CVS
 2005-02-01 21:17:57 +00:00
Stanislav Shwartsman
68714924b0 Return local APIC id in CPUID 00000001h function in EBX register 2005-01-29 15:24:57 +00:00
Stanislav Shwartsman
bbcc5e0e3a Split BOUND instruction to two different according to operand size 
Coding style change
 2005-01-28 20:50:48 +00:00
Stanislav Shwartsman
42a5a899c2 Improvement in the speed of general memory access. 
The idea was taken from patch written by
LightCone
 2005-01-25 20:41:43 +00:00
Stanislav Shwartsman
7eb2f0aa3e Enable TSD in CR4 (RDTSC instruction is already implemented so it has no problem to enable TSD for CPU LEVEL >=5) 2005-01-23 21:13:49 +00:00
Stanislav Shwartsman
57fcc89274 Non-Execution support impelemented and enabled in CPUID when in x86-64 configuration 2005-01-20 19:37:43 +00:00
Stanislav Shwartsman
2212b963ed Added additional comment to code in paging.cc 2005-01-19 20:48:51 +00:00
Stanislav Shwartsman
8d5d5b1561 Reset local apic on CPU RESET 2005-01-13 19:18:27 +00:00
Stanislav Shwartsman
3cd646004f Fixed bug "1101168 APIC base address change" 2005-01-13 19:03:40 +00:00
Volker Ruppert
48ebc288c6 - MCE is supported on Pentium or higher (exception 18 never appears in Bochs) 2005-01-09 08:14:15 +00:00
Stanislav Shwartsman
d142f23242 Fixed undocumented flags handling for SHLD instruction 
Added lazy flags for SHLD instruction
Bugfix and speedup in SHLD and SHRD instructions
 2004-12-24 22:44:13 +00:00
Stanislav Shwartsman
8fe15b0ddc Fixed compilation error 2004-12-17 10:50:49 +00:00
Stanislav Shwartsman
f5b64a3a59 more preparations to NXE feature 2004-12-16 22:21:35 +00:00
Stanislav Shwartsman
5955549a8d Fixed bug report [#879050] 
Bochs reports enabled APIC without support
 2004-12-14 20:41:55 +00:00
Stanislav Shwartsman
da24883199 Extend page directory entries to 8 byte in PAE mode when X86_64 is enabled 
(prepartions to NX feature implementation)
 2004-12-13 22:26:36 +00:00
Volker Ruppert
02ae558db8 - removed old unused code designed for a save/restore feature 
- fixed pcidev targets in iodev/Makefile.in
- updated all Makefile dependencies using a default setup (.conf.linux).
  TODO: dependencies should be generated at compile time since they depend on
  the config settings
 2004-12-13 19:10:38 +00:00
Stanislav Shwartsman
f375203fdb preparations for x86-64 support in disasm 2004-12-12 22:12:43 +00:00
Stanislav Shwartsman
46bb3d8853 remove duplicated data arrays from CPU 2004-12-11 20:51:13 +00:00
Stanislav Shwartsman
ce80380b29 fixed ENTER instruction, this implemntation looks correct but it still need to be confirmed by testing ... 2004-11-27 20:36:53 +00:00
Stanislav Shwartsman
5213e903bd mov duplicate opcode groups from fectchdecode*.cc to .h 
use common register accessor macroses instead of direct register file structure access
 2004-11-26 20:21:28 +00:00
Stanislav Shwartsman
0d09a8c8a8 fix code duplication 2004-11-26 19:53:04 +00:00
Stanislav Shwartsman
69c0b06955 fixes in disassembler 
split REPEAT instructions according to opsize to speedup execution
now each REPEATABLE instruction splitted to 3 different instructions, one for 16-bit operand size, one for 32-bit and one for 64-bit. Choosing of correct instruction occure in fetchdecode step.
 2004-11-20 23:26:32 +00:00
Stanislav Shwartsman
bf0fc24cd5 Fixed icache uncompetability with physical addresses > mem.len 2004-11-19 09:39:30 +00:00
Stanislav Shwartsman
645e04860e For now : disable fetching from physical address 0xFFFFFFF0 after #RESET 
because ICACHE do not support physical address > mem.len.
This is the first part of the fix, the rest coming soon
 2004-11-18 23:16:36 +00:00
Stanislav Shwartsman
02fc33a86b Fix CS.base register after #RESET 
update changes
 2004-11-16 19:19:13 +00:00
Stanislav Shwartsman
c482fbed43 Add additional debug info 2004-11-15 19:38:42 +00:00
Stanislav Shwartsman
a75280d757 Fix CS.BASE wrong value on reset 2004-11-14 21:47:58 +00:00
Stanislav Shwartsman
730b8c0243 Fix this pointers in the code 2004-11-14 21:25:42 +00:00
Stanislav Shwartsman
71c1275b21 dos2unix 2004-11-14 19:39:01 +00:00
Stanislav Shwartsman
7b62a6e206 Fix reset registers in CPU for #RESET signal 
Extract ICACHE from cpu.h to separate icache.h
 2004-11-14 19:29:34 +00:00
Stanislav Shwartsman
08810d54c4 Fix fetchdecode for FPU instructions when FPU is not present 2004-11-12 16:47:35 +00:00
Volker Ruppert
3cad938b05 - gdbstub support turned into a runtime option (SF patch #1021740 by Charles Duffy) 
- gdb_* options moved to the new gdbstub option
 2004-11-06 10:50:03 +00:00
Stanislav Shwartsman
41daacdf80 fixed BX_CPU_THIS pointers 2004-11-05 10:13:15 +00:00
Stanislav Shwartsman
1a6656ce91 Fixed compilation warnings (g++, -Wall) 
Improve speed and precision of FPATAN FPU instruction
 2004-11-04 22:41:24 +00:00
Stanislav Shwartsman
2ce5495d38 Fixed compilation errors 2004-11-03 06:35:48 +00:00
Stanislav Shwartsman
8191201e17 If exception occured register should not be modified. 
Fix for x86-64
 2004-11-02 20:39:45 +00:00
Stanislav Shwartsman
4e3bc367b6 Fixed all JUMP near, CALL near and RET near cases 
for problem EIP>CS.limit was not checked in real mode
 2004-11-02 18:05:19 +00:00
Stanislav Shwartsman
2ed7e4eed5 EIP > CS.limit should be checked in real mode too. 
Enable for now for JUMP instructions, still todo - CALL and RET
 2004-11-02 17:31:14 +00:00
Stanislav Shwartsman
f06c8b6b95 EIP > CS.limit should not be a problem 
Manual says that GP(0) shouldd be generated in this case ALWAYS
Fixed instructions PANIC messages to ERROR for this case
And ... do not leave PANIC messages w/o taking care that user could push CONTINUE button and program should know to continue after the PANIC code line. Mainly in rerurn instructions were several problems ...
 2004-11-02 16:10:02 +00:00
Stanislav Shwartsman
79bd13c46c iret32_real implemented right for 386+, not only for Pentium CPU. 
Removed ifdef's
 2004-10-30 16:04:58 +00:00
Stanislav Shwartsman
a9022ac5cb Fixed compilation prroblem reported in bug 
[ bochs-Bugs-913418 ] compiler errors with --enable-external-debugger option
Remove code duplication
 2004-10-29 21:15:48 +00:00
Stanislav Shwartsman
5e23909c7c prepations for NX bit implementation 2004-10-21 18:20:40 +00:00
Stanislav Shwartsman
95c894d403 Removed unused code 2004-10-19 20:05:07 +00:00
Stanislav Shwartsman
75e0c5b421 Little speed optimizations in cpu_loop function 
change apic classes to more c++ friendly
 2004-10-16 19:34:17 +00:00
Stanislav Shwartsman
4a9bd714d8 Fix init values for system registers 2004-10-16 10:18:01 +00:00
Stanislav Shwartsman
80ee150d83 Imlemented CR8 register for X86-64 mode 2004-10-13 20:58:16 +00:00
Stanislav Shwartsman
4f1f070c37 Fix comments for code 2004-10-08 19:29:04 +00:00
Stanislav Shwartsman
3adc5c8659 Fix lock prefix for XOR instruction in 64-bit mode 2004-10-08 19:07:18 +00:00
Stanislav Shwartsman
d1af05cbe2 Fix typo in stack64 2004-10-06 20:10:01 +00:00
Stanislav Shwartsman
6a9e8e6011 Drop unnecessary warning 2004-10-05 20:25:06 +00:00
Stanislav Shwartsman
4988a098f5 Small optimizations 2004-10-03 21:52:10 +00:00
Stanislav Shwartsman
a28a2c6ce1 Added comments 2004-10-03 20:25:19 +00:00
Stanislav Shwartsman
a21018e1db Fixed bug 
[ 766020 ] info registers / dump_cpu get old eflags
 2004-09-30 16:50:03 +00:00
Stanislav Shwartsman
c9bc4eaf02 1. add comments to CPUID instruction 
2. small cleanup
 2004-09-26 20:29:04 +00:00
Stanislav Shwartsman
3f096fdb9f Fix FISTTP instruction opcode table 2004-09-21 21:19:59 +00:00
Stanislav Shwartsman
040be015d8 1. Added required GP(0) exception when setting conficting flags in CR0 
2. APIC disabled compilation error fixed
 2004-09-21 20:19:19 +00:00
Stanislav Shwartsman
b6657b1322 NX feature still not implemented in Bochs. 
The change forces CPUID do not report bit 20 (NX bit support)
May be some OS that really checks it will boot better now
 2004-09-17 21:01:50 +00:00
Stanislav Shwartsman
760a195c9d * Fix LOCK prefix handling for x86-64 
* Split BT*_EvGv functions to 3 different function according to exec mode
 2004-09-17 20:47:19 +00:00
Stanislav Shwartsman
c780a15e6f dos2unix for apic.h 2004-09-15 22:02:19 +00:00
Stanislav Shwartsman
bbd55fe16f Merge and commit patch.apic-zwane from CVS patches directory. 
the patch release notes by Zwane:

o Define symbols for constants like
o APIC arbitration
o Processor priority
o Various interrupt delivery fixes
o Focus processor checking
o ExtINT delivery

I need to release this now so that i don't fall too far behind CVS, when
it was part of the bochs-smp patch it could boot 2.4.18 4way. Apologies
for the whitespace changes.


Also remove patch.apic-ppr-zwane patch because it already included in
patch.apic-zwane.

I hope it will help to boot x86-64 or cmp systems required missed APIC
features !
 2004-09-15 21:48:57 +00:00
Stanislav Shwartsman
283f9ae5d2 Simplify cpu.h 
Speedup FYL2X and FYL2XP1 instructions
 2004-09-14 20:19:54 +00:00
Stanislav Shwartsman
6cdb42d909 Little bit optimize memory access functions. Now values are calculated only if they actually needed. 2004-09-13 20:48:11 +00:00
Stanislav Shwartsman
fc631037ff remove obsolete comments from fetchdecode 2004-09-06 20:22:39 +00:00
Stanislav Shwartsman
ce459276c3 Fixed problem in previous commit ... 2004-09-04 20:19:39 +00:00
Stanislav Shwartsman
3916754e30 speedup and cleanup 2004-09-04 19:37:37 +00:00
Stanislav Shwartsman
6dc8a1cafd Very small code cleanup 2004-09-04 18:22:22 +00:00
Stanislav Shwartsman
193c7332aa 1. Small optimization for lazy_flags.cc 
2. Merge patch 1013516
Avoid invalidate_prefetch_q on enter, leave and cpuid
 2004-09-04 10:21:28 +00:00
Stanislav Shwartsman
75006eed8a Fix MUL/IMUL instructions flags handling 2004-08-31 19:43:58 +00:00
Stanislav Shwartsman
016207b222 Commented problematic check in misc_mem.cc 
Implemnted lazy-flags and undocumented flags handling for IMUL instructions
 2004-08-30 21:47:24 +00:00
Stanislav Shwartsman
77b3886f8b Cleanup and optimize 2004-08-28 08:41:46 +00:00
Stanislav Shwartsman
8953bfaffb Fixed flags handling for SHLD and rotate instrructions 2004-08-27 20:13:32 +00:00
Stanislav Shwartsman
27897c925e Fix undocumented flags handling for SHL instruction 
remove invalidate_prefetch_q from CPUID
 2004-08-27 18:43:23 +00:00
Stanislav Shwartsman
f2294e7c29 LAZY-FLAGS for MUL instructions 
undocumented flags handling for MUL instructions
 2004-08-26 20:37:50 +00:00
Stanislav Shwartsman
fcc54c7f82 Add missed flags modification 2004-08-18 21:38:50 +00:00
Stanislav Shwartsman
1f5aa2696f Fix compilation errors ;) 2004-08-18 21:29:07 +00:00
Stanislav Shwartsman
8c618be951 Fix comments 2004-08-18 20:49:31 +00:00
Stanislav Shwartsman
b370a417a4 Optimize lazy-flags for ADC and SBB instructions 2004-08-18 20:47:35 +00:00
Stanislav Shwartsman
729e0abd2a Fixed bug [ 912496 ] IDIV can cause simulator divide error 2004-08-18 19:27:52 +00:00
Stanislav Shwartsman
571617bcda Optimize lazy flags for NEG instruction 
Removed duplicate flags modification in CMPXCHG instruction
 2004-08-17 17:34:47 +00:00
Stanislav Shwartsman
231cd533c6 1. Update changes 
2. Fix lazy_flags duplicate instruction patterns
 2004-08-16 20:18:01 +00:00
Stanislav Shwartsman
c2b7f183af more correct implementation 2004-08-15 20:31:27 +00:00
Stanislav Shwartsman
eefdcece6f Speed-up BTC instruction 
Speed-up SAR instruction with implementing lazy-flags for it
 2004-08-15 20:12:05 +00:00
Stanislav Shwartsman
12b68ede54 XADD and ADD instructions have same flags modification rules - remove redundant switch case 2004-08-14 20:44:48 +00:00
Stanislav Shwartsman
88a19a8594 Speedup lazy-flags for NEG instruction 2004-08-14 20:09:22 +00:00
Stanislav Shwartsman
1b7b791493 Speedup lazy-flags for INC and DEC instructions 2004-08-14 20:00:24 +00:00
Stanislav Shwartsman
1732e54baa Fixed undocumented flags handling for some instructions. 
Bugfix for CF flag handling for SHL64 instruction
 2004-08-14 19:34:02 +00:00
Stanislav Shwartsman
a1f830d429 Implemented FAST lazy flags version for logic instructions. 
Small code cleanup/simplification for others.
 2004-08-13 20:00:03 +00:00
Stanislav Shwartsman
5de51f67d9 Prepare lazy flags macroses for more efficient lazy flags handling 2004-08-11 21:26:23 +00:00
Stanislav Shwartsman
8f0cf91fff This commit is the first commit in long series of changes the have several purposes: 
1. Review and commit patch

	[ 896733 ] Lazy flags, for more instructions, only 1 src op

   May be partially, but I hope to get all ideas from patch in

2. Get Bochs speedup after lazy flags optimization

3. Most important for me: improve correctness of emulation by handling several
   undocumented EFLAGS modifications. And finally pass

	UFLAGS - Undefined Flags Test v 3.0
	Copyright (C) Potemkin's Hackers Group (PHG) 1989,1995

   The test still fails on > 50% of its checks.
 2004-08-09 21:28:47 +00:00
Stanislav Shwartsman
789ed4da04 Removed debug print 2004-07-29 20:30:14 +00:00
Stanislav Shwartsman
f9bd2b74be 1. Fixed bug in FSUB instruction 
2. Fixed bug

[ 989478 ] I-Cache and undefined Instruktions

The L4 microkernel uses an undefined instruction to
trap for a special requests into the kernel (LOCK NOP).
The handler fixes this up and gives the user a special
code page with syscall stubs. If you're not using the
I-Cache optimization everthing works find on bochs. But
if you enable the I-Cache (--enable-icache), then the
undefined opcode exception is thrown only once for ever
virtual address it occurs. See the demodisk of the
L4KA::pistachio
(http://www.l4ka.org/projects/pistachio/download.php).
In this case the pingpong benchmark of this demo is of
interest. Everything runs fine until the program tries
to spawn a new task for its measurements. This new task
shares the code of the creating program. But the new
task stops executing at the undefined instruction
explained above and no exception is thrown.
 2004-07-29 20:15:19 +00:00
Stanislav Shwartsman
50aaf8ec6f Implemented FFREEP 287+ compatability instruction 2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
79b1cfdc1c removed unused code 2004-07-12 19:20:55 +00:00
Stanislav Shwartsman
ddc6c33887 BX_PANIC replaced by BX_INFO 2004-07-08 20:15:23 +00:00
Stanislav Shwartsman
02dec84af9 Fix FXSAVE/FXRSTOR instructions exceptions handling 2004-07-03 11:02:43 +00:00
Stanislav Shwartsman
cc61e5d5d5 Leave aligment in floatx80 reg to compiler. 
CPU code no longer assume that floatx80 register is 16-byte aligned
 2004-07-02 20:24:47 +00:00
Stanislav Shwartsman
2a0a361298 Implemented precision lost up indication in floating point status word 2004-06-25 18:51:28 +00:00
Stanislav Shwartsman
dfd17222b0 Changed MMX regs access macros to avoid code duplication in MMX register declaration 2004-06-23 21:59:24 +00:00
Christophe Bothamy
ba13a484b5 - replace ResetCpu and ResetSystem by Reset(BX_RESET_SOFTWARE) and Reset(BX_RESET_HARDWARE) 2004-06-21 10:39:24 +00:00
Stanislav Shwartsman
a7cad86666 clean code 2004-06-19 19:16:02 +00:00
Stanislav Shwartsman
5873b26a82 Speed up compilation process. 
bochs.h already not include iodev.h which reduces compilation dependences for almost all cpu and fpu files, now cpu files will not be recompiled if iodev includes was changed
 2004-06-19 15:20:15 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
e6991f043f pply patch 
[ 924428 ] ET bit mismatch between CR0 and MSW
 2004-06-03 17:57:29 +00:00
Volker Ruppert
25582ed29d - fixed cpu/Makefile.in after renaming file 
- reg_ld_str.c: fixed regparm argument (bugfix found in SuSE 9.1 sources of Bochs 2.1.1)
 2004-05-17 19:50:43 +00:00
Stanislav Shwartsman
14b70fa9ed rename fpu.cc in cpu folder 
this fixed bug
[954751] Two FPU.CPP in project
 2004-05-16 18:46:42 +00:00
Stanislav Shwartsman
4eea772270 LOADALL for cpu-level=2 in fetchdecode 2004-05-11 16:44:58 +00:00
Stanislav Shwartsman
3274e0dd12 Commit patch 
[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
 2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
279d207d45 Fix fetchdecode bugs reported by Gilbert Netzer 
(opcode patches for x86_64 cpu)
 2004-05-03 17:58:36 +00:00
Christophe Bothamy
f4dbefad66 - fix bug reported by Thomas Weidner [ 877510 ] amd64 fixes... 2004-04-28 19:57:37 +00:00
Stanislav Shwartsman
0c47a35c99 Change BX_PANIC to BX_INFO if the behaviour exactly matches Intel docs 2004-04-17 17:10:58 +00:00
Stanislav Shwartsman
c2c447d301 Change BX_PANIC to BX_INFO in BOUND instruction 2004-04-17 16:42:11 +00:00
Stanislav Shwartsman
cf6d1b8bd9 port some changes from spftfloat-fpu branch to the MT 2004-04-09 15:34:59 +00:00
Stanislav Shwartsman
6de2dbeb49 these files should not be in MT 2004-04-09 14:27:06 +00:00
Christophe Bothamy
17328faa03 - triple fault now call bx_pc_system.ResetCpus 2004-04-08 20:57:33 +00:00
Stanislav Shwartsman
33b50ec4c4 For spammers o 2004-04-08 17:17:47 +00:00
Stanislav Shwartsman
f2dc00dda3 merge patch 
[ 904549 ] imul gives incorrect result in long mode
 2004-04-07 19:46:13 +00:00
Stanislav Shwartsman
bb1271cab6 little bit clean 64b code 2004-04-07 19:23:06 +00:00
Stanislav Shwartsman
9c4fd5ff36 clean soft_int code 2004-03-26 18:41:12 +00:00
Stanislav Shwartsman
6441d290f8 speedup and fix BCD instructions 2004-03-26 12:43:19 +00:00
Stanislav Shwartsman
02d18a283f backport softfloat changes 2004-03-20 20:01:03 +00:00
Stanislav Shwartsman
78a2976b49 backport some softfloat changes to CVS 2004-03-19 18:11:10 +00:00
Stanislav Shwartsman
b7b0b604ef implement undocumented flags modifications for BCD instructions 2004-03-18 21:43:18 +00:00
Stanislav Shwartsman
cf1d0d0aaa add comments about undocumented flags modifications in BCD.CC 
we are still need to study the flags modifications
 2004-03-13 19:37:57 +00:00
Stanislav Shwartsman
967297b8a4 new version of softfloat-fpu branch 
currectly stable
 2004-03-12 20:08:50 +00:00
Stanislav Shwartsman
dfef46e311 removed unused variables 2004-03-10 20:39:47 +00:00
Stanislav Shwartsman
58a7652aea fixed problems in BCD instructions 2004-03-10 20:14:56 +00:00
Stanislav Shwartsman
8484a03394 Fixed BCD instructions to be suitable with Intel docs 2004-03-09 20:45:17 +00:00
Stanislav Shwartsman
f50f664b10 * fixed convert float2int SSE instructions (bugfix in softfloat lib) 
* set default .bochssrc IPS to 10M
 2004-03-08 05:29:14 +00:00
Stanislav Shwartsman
97135a723f floatx80 bugfixes 2004-03-05 11:39:10 +00:00
Stanislav Shwartsman
f5316dad70 fixed bug in HADDPD/HSUBPD instructions 2004-03-05 09:19:58 +00:00
Stanislav Shwartsman
652d4ca24f wouldn't elliminate aligment for now 2004-03-03 21:15:19 +00:00
Stanislav Shwartsman
1706beda30 fixed bug in floatx80_class function 
mmx code optimizations
 2004-03-03 21:09:08 +00:00
Stanislav Shwartsman
f552a1c861 Apply patches: 
907163 ctrl_xfer8 clean/speed up   2004-02-29 14:32 nobody psychosmurf
907161 clean/speed up of io.cc   2004-02-29 14:31 nobody psychosmurf
 2004-03-02 20:48:48 +00:00
Stanislav Shwartsman
6b565750b7 port changes in softfloat to main trunk 2004-02-28 09:46:46 +00:00
Stanislav Shwartsman
3f7c794b26 commit patch 
899972 data xfer performance patch V 2.0.4   2004-02-18 15:38 nobody psychosmur
 2004-02-26 19:17:40 +00:00
Stanislav Shwartsman
c2959f7685 added floatx80_compares for future use with FPU code 
fixed floatx80 prototypes
 2004-02-25 19:18:56 +00:00
Stanislav Shwartsman
9d7d634ebc add these files to main trunk later 2004-02-21 14:48:42 +00:00
Stanislav Shwartsman
adbdde37e9 merge with latest CVS 2004-02-21 14:40:39 +00:00
Stanislav Shwartsman
320ae34cb9 Fix compile error 2004-02-18 05:22:07 +00:00
Stanislav Shwartsman
c3066a44bb added functions to softfloat for future fpu implementation 2004-02-17 21:59:24 +00:00
Christophe Bothamy
e17995f5db - host asms in a specific file 
- add msvcc host asm instructions, patch by suzu
 2004-02-15 17:57:45 +00:00
Stanislav Shwartsman
cc7b85ae7e just update release dates 2004-02-13 21:27:45 +00:00
Stanislav Shwartsman
196aee98d7 Fix for FWAIT instruction 2004-02-12 21:34:28 +00:00
Christophe Bothamy
45bd1edfbf - apply patch #894595 MSR_APICBASE always returns APIC ADDRESS 0 
by Kangmo Kim
 2004-02-12 00:56:21 +00:00
Christophe Bothamy
82429b5ac5 - fixes for booting OS/2 by Dmitri Froloff 
- v8086 priveleged instruction processing bug (was also reported by
  LightCone Aug  7 2003)
  - exception process bug (was reported by Diego Henriquez Sat Nov 15
  01:16:51 CET 2003)
  - segment validation with IRET instruction
  - CS segment not present exception processing with IRET
 2004-02-11 23:47:55 +00:00
Stanislav Shwartsman
75bbf3bc5f remove duplicated include 2004-02-11 20:04:34 +00:00
Daniel Gimpelevich
5366cc369e Added Brian Huffman's Sound for OSX code with a couple of tweaks. 2004-02-09 22:23:53 +00:00
Daniel Gimpelevich
126971af49 Made to compile on MacOS9 2004-02-06 22:28:00 +00:00
Stanislav Shwartsman
c84deba786 * FNOP instruction checks for pending FPU exceptions 
* prepared softfloatx80 code for future use with FPU
 2004-02-06 12:45:43 +00:00
Christophe Bothamy
4a22763b3a - fix sign comparison whenchecking io address in the tss io bitmap 2004-02-03 02:03:24 +00:00
Stanislav Shwartsman
dd38f0b021 fixed performance bug 
aligment field changed from 32bit (unsigned) to 8bit (unsigned char) as it should be
 2004-02-01 20:19:52 +00:00
Stanislav Shwartsman
ecdbf40aac fixed compilation error for case when 3dnow! enabled and sse not 2004-01-31 17:13:05 +00:00
Stanislav Shwartsman
77cb1436fb fix bug 2004-01-31 15:11:41 +00:00
Stanislav Shwartsman
9120961241 update checking for pending FPU exceptions code 2004-01-31 13:43:26 +00:00
Michael Brown
d1922bc835 Changed #ifdef MAGIC_BREAKPOINT to #if BX_MAGIC_BREAKPOINT and added a 
configure script option --enable-magic-breakpoints (enabled by default).

Documented the instruction required to trigger the magic breakpoint
(xchgw %bx,%bx).
 2004-01-29 17:49:03 +00:00
Christophe Bothamy
be57f55969 - fix FWAIT instruction acording to intel specs 
NM exception is raised only when cr0.mp and cr0.ts are set
 2004-01-18 16:42:05 +00:00
Daniel Gimpelevich
ae66bb33c0 Applied Russ Cox's CPU panic debug patch from Oct 2003. 2004-01-17 08:36:29 +00:00
Stanislav Shwartsman
49c6fd55e4 Remove redundant ifdefs 2004-01-10 19:45:53 +00:00
Stanislav Shwartsman
f3730cd784 Implemented two last SSE instructions RSQRTSS and RSQRTPS 
MSDEV workspaces updated with new file
CPUID will detect and CPU will execute FXSAVE/FXRSTOR instructions when cpu-level-hacked=6 and not only when cpu-level=6
 2003-12-31 17:35:43 +00:00
Stanislav Shwartsman
2dae51fc3f Fixed compilation error 2003-12-30 23:14:47 +00:00
Stanislav Shwartsman
52d75d7aed Fast table-based implementation of reciprocal (RCPSS/RCPPS) 
This implemntation is much more clear than old one.
RSQRTSS/RSQRTPS coming soon.
 2003-12-30 23:06:59 +00:00
Christophe Bothamy
e7e0b40bd1 - remove calculation on cr3 in dtranslate_linear, one of the most called functions (patch by Conn Clark) 2003-12-30 22:12:45 +00:00
Christophe Bothamy
e3bec02532 - fix bug preventing x86-64 detection 2003-12-30 14:14:28 +00:00
Stanislav Shwartsman
6fe8e9260b remove redundant CPU LEVEL checks for x86-64 2003-12-29 21:47:36 +00:00
Daniel Gimpelevich
fb80d47dbf *** empty log message *** 2003-12-29 21:24:35 +00:00
Stanislav Shwartsman
be9c0aeeec Enable FXSAVE/FXRESTOR instructions for BX_HACKED_CPU_LEVEL=6 also 2003-12-29 21:23:46 +00:00
Stanislav Shwartsman
b770d809d3 Clearify disagnostic messages. 
Remove redundant cpu level checks for x86-64
 2003-12-29 21:20:58 +00:00
Stanislav Shwartsman
7deb9491da Fixed compilation error for FPU disabled case 2003-12-29 20:26:05 +00:00
Daniel Gimpelevich
68fd1dc95b cleanup optimizations & fix compile error 2003-12-29 07:28:28 +00:00
Stanislav Shwartsman
fd60a984a0 Instructions that should not check pending FPU exceptions 2003-12-28 18:58:15 +00:00
Stanislav Shwartsman
0eb71999db Added missed 287 opcodes which should be executed as NOP in 387+ 2003-12-28 18:19:41 +00:00
Stanislav Shwartsman
9ccb363ec3 bochs style decode/execute of FPU instructions. 
With this coding style each instruction could be implemented separatelly even not together with current Bochs FPU emulator.
Step-by-step I am going to transfer all FPU instructions from current Bochs FPU emulator to new style and remove an old bugged emulator.
Anyway, now I could implement all currently missed FPU instructions without hacking wm-fpu-emu.
 2003-12-27 13:50:06 +00:00
Stanislav Shwartsman
ab6b9c7dcb New table-based disassembler: 
* Fully supports
	* MMX/XMM/3DNOW instruction sets
	* FPU instruction
	* SSE3 extensions
 currently only 16/32 bit mode bug anyway, it is much better that old one ;)
 2003-12-24 20:32:59 +00:00
Daniel Gimpelevich
fff74a6f83 Fixed incompatibility with gcc3.3, I think. 2003-11-28 15:07:29 +00:00
Zwane Mwaikambo
b152c966fc remove 'const' from bx_local_apic_c::get_type declaration, fix for wrong 
class member being called in bx_generic_apic_c::deliver
 2003-11-23 02:44:15 +00:00