mirror of https://github.com/bochs-emu/Bochs
Fixed undocumented flags handling for some instructions.
Bugfix for CF flag handling for SHL64 instruction
This commit is contained in:
Stanislav Shwartsman
parent
a70ce6459f
commit
1732e54baa
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@ -19,6 +19,10 @@ Changes to next release:
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matches Intel docs
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- fixed using invalid segment register for MOV instruction (h.johansson)
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- fixed ET bit mismatch between CR0 and SMSW instruction
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- fixed undocumented flags handling for BTS, BTR and SHR instructions
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(Stanislav Shwartsman)
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- fixed CF flag handling for SHL instruction in x86-64 mode
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(Stanislav Shwartsman)
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- FPU
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- totally rewritten all FPU code based on softfloat library
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: bcd.cc,v 1.12 2004-03-26 12:43:19 sshwarts Exp $
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// $Id: bcd.cc,v 1.13 2004-08-14 19:34:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -36,7 +36,7 @@
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BX_CPU_C::AAA(bxInstruction_c *)
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{
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/*
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* Note: This istruction incorrectly documented in Intel's materials.
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* Note: This instruction incorrectly documented in Intel's materials.
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* The right description is:
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*
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* IF (((AL and 0FH) > 9) or (AF==1)
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: bit.cc,v 1.18 2004-08-13 20:00:03 sshwarts Exp $
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// $Id: bit.cc,v 1.19 2004-08-14 19:34:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -461,7 +461,8 @@ BX_CPU_C::BSF_GvEv(bxInstruction_c *i)
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op1_64++;
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op2_64 >>= 1;
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}
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set_ZF(0);
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SET_FLAGS_OSZAPC_RESULT_64(op1_64, BX_INSTR_BITSCAN64);
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/* now write result back to destination */
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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@ -491,7 +492,8 @@ BX_CPU_C::BSF_GvEv(bxInstruction_c *i)
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op1_32++;
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op2_32 >>= 1;
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}
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set_ZF(0);
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SET_FLAGS_OSZAPC_RESULT_32(op1_32, BX_INSTR_BITSCAN32);
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/* now write result back to destination */
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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@ -518,7 +520,8 @@ BX_CPU_C::BSF_GvEv(bxInstruction_c *i)
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op1_16++;
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op2_16 >>= 1;
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}
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set_ZF(0);
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SET_FLAGS_OSZAPC_RESULT_16(op1_16, BX_INSTR_BITSCAN16);
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/* now write result back to destination */
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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@ -558,7 +561,8 @@ BX_CPU_C::BSR_GvEv(bxInstruction_c *i)
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op1_64--;
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op2_64 <<= 1;
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}
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set_ZF(0);
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SET_FLAGS_OSZAPC_RESULT_64(op1_64, BX_INSTR_BITSCAN64);
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/* now write result back to destination */
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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@ -588,7 +592,8 @@ BX_CPU_C::BSR_GvEv(bxInstruction_c *i)
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op1_32--;
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op2_32 <<= 1;
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}
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set_ZF(0);
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SET_FLAGS_OSZAPC_RESULT_32(op1_32, BX_INSTR_BITSCAN32);
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/* now write result back to destination */
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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@ -615,7 +620,8 @@ BX_CPU_C::BSR_GvEv(bxInstruction_c *i)
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op1_16--;
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op2_16 <<= 1;
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}
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set_ZF(0);
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SET_FLAGS_OSZAPC_RESULT_16(op1_16, BX_INSTR_BITSCAN16);
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/* now write result back to destination */
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BX_WRITE_16BIT_REG(i->nnn(), op1_16);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.170 2004-08-13 20:00:03 sshwarts Exp $
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// $Id: cpu.h,v 1.171 2004-08-14 19:34:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1457,15 +1457,13 @@ union {
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#define ArithmeticalFlag(flag, lfMaskShift, eflagsBitShift) \
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BX_SMF bx_bool get_##flag##Lazy(void); \
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BX_SMF bx_bool getB_##flag(void) { \
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if ( (BX_CPU_THIS_PTR lf_flags_status & (0xf<<lfMaskShift)) == \
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((Bit32u) (BX_LF_INDEX_KNOWN<<lfMaskShift)) ) \
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if ( (BX_CPU_THIS_PTR lf_flags_status & (0xf<<lfMaskShift)) == 0) \
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return (BX_CPU_THIS_PTR eflags.val32 >> eflagsBitShift) & 1; \
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else \
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return get_##flag##Lazy(); \
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} \
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BX_SMF bx_bool get_##flag(void) { \
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if ( (BX_CPU_THIS_PTR lf_flags_status & (0xf<<lfMaskShift)) == \
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((Bit32u) (BX_LF_INDEX_KNOWN<<lfMaskShift)) ) \
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if ( (BX_CPU_THIS_PTR lf_flags_status & (0xf<<lfMaskShift)) == 0) \
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return BX_CPU_THIS_PTR eflags.val32 & (1<<eflagsBitShift); \
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else \
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return get_##flag##Lazy(); \
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@ -1691,7 +1689,6 @@ union {
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BX_SMF void CLD(bxInstruction_c *);
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BX_SMF void STD(bxInstruction_c *);
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BX_SMF void LAR_GvEw(bxInstruction_c *);
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BX_SMF void LSL_GvEw(bxInstruction_c *);
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BX_SMF void CLTS(bxInstruction_c *);
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@ -1734,7 +1731,6 @@ union {
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BX_SMF void SHLD_EdGd(bxInstruction_c *);
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BX_SMF void SHLD_EwGw(bxInstruction_c *);
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BX_SMF void BTS_EvGv(bxInstruction_c *);
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BX_SMF void SHRD_EwGw(bxInstruction_c *);
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@ -2645,7 +2641,6 @@ union {
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#if BX_SUPPORT_X86_64
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// 64 bit addressing
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BX_SMF void Resolve64Mod0Rm0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void Resolve64Mod0Rm1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void Resolve64Mod0Rm2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -2997,8 +2992,7 @@ BX_CPP_INLINE Bit32u bxICache_c::createFetchModeMask(BX_CPU_C *cpu) {
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#if BX_SUPPORT_X86_64
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| ((cpu->cpu_mode == BX_MODE_LONG_64)<<30)
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#endif
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| (1<<29) // iCache code.
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;
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| (1<<29); // iCache code.
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}
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#endif
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@ -3094,7 +3088,6 @@ BX_CPU_C::set_SF(bx_bool val) {
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BX_CPU_THIS_PTR eflags.val32 |= (!!val)<<7;
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}
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BX_CPP_INLINE void
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BX_CPU_C::set_OF(bx_bool val) {
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BX_CPU_THIS_PTR lf_flags_status &= 0x0fffff;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: lazy_flags.cc,v 1.13 2004-08-09 21:28:47 sshwarts Exp $
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// $Id: lazy_flags.cc,v 1.14 2004-08-14 19:34:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -172,8 +172,11 @@ bx_bool BX_CPU_C::get_CFLazy(void)
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case BX_INSTR_LOGIC8:
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case BX_INSTR_LOGIC16:
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case BX_INSTR_LOGIC32:
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case BX_INSTR_BITSCAN16:
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case BX_INSTR_BITSCAN32:
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#if BX_SUPPORT_X86_64
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case BX_INSTR_LOGIC64:
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case BX_INSTR_BITSCAN64:
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#endif
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cf = 0;
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break;
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@ -228,7 +231,7 @@ bx_bool BX_CPU_C::get_CFLazy(void)
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case BX_INSTR_SHL64:
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cf =
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(BX_CPU_THIS_PTR oszapc.op1_64 >>
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(32 - BX_CPU_THIS_PTR oszapc.op2_64)) & 0x01;
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(64 - BX_CPU_THIS_PTR oszapc.op2_64)) & 0x01;
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break;
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#endif
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default:
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@ -326,8 +329,11 @@ bx_bool BX_CPU_C::get_AFLazy(void)
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case BX_INSTR_LOGIC8:
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case BX_INSTR_LOGIC16:
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case BX_INSTR_LOGIC32:
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case BX_INSTR_BITSCAN16:
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case BX_INSTR_BITSCAN32:
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#if BX_SUPPORT_X86_64
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case BX_INSTR_LOGIC64:
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case BX_INSTR_BITSCAN64:
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case BX_INSTR_SHR64:
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case BX_INSTR_SHL64:
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#endif
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@ -338,7 +344,6 @@ bx_bool BX_CPU_C::get_AFLazy(void)
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case BX_INSTR_SHL16:
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case BX_INSTR_SHL32:
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af = 0;
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/* undefined */
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break;
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default:
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af = 0; // Keep compiler quiet.
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@ -462,6 +467,13 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
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zf = (BX_CPU_THIS_PTR oszapc.result_64 == 0);
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break;
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#endif
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case BX_INSTR_BITSCAN16:
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case BX_INSTR_BITSCAN32:
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#if BX_SUPPORT_X86_64
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case BX_INSTR_BITSCAN64:
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#endif
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zf = 0;
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break;
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default:
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zf = 0;
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BX_PANIC(("get_ZF: OSZAPC: unknown instr"));
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@ -540,6 +552,7 @@ bx_bool BX_CPU_C::get_SFLazy(void)
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case BX_INSTR_SCAS16:
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case BX_INSTR_SHR16:
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case BX_INSTR_SHL16:
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case BX_INSTR_BITSCAN16:
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sf = (BX_CPU_THIS_PTR oszapc.result_16 >= 0x8000);
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break;
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case BX_INSTR_LOGIC32:
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@ -554,6 +567,7 @@ bx_bool BX_CPU_C::get_SFLazy(void)
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case BX_INSTR_SCAS32:
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case BX_INSTR_SHR32:
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case BX_INSTR_SHL32:
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case BX_INSTR_BITSCAN32:
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sf = (BX_CPU_THIS_PTR oszapc.result_32 >= 0x80000000);
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break;
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#if BX_SUPPORT_X86_64
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@ -569,6 +583,7 @@ bx_bool BX_CPU_C::get_SFLazy(void)
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case BX_INSTR_SCAS64:
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case BX_INSTR_SHR64:
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case BX_INSTR_SHL64:
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case BX_INSTR_BITSCAN64:
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sf = (BX_CPU_THIS_PTR oszapc.result_64 >= BX_CONST64(0x8000000000000000));
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break;
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#endif
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@ -635,7 +650,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b7 = BX_CPU_THIS_PTR oszapc.op1_8 & 0x80;
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op2_b7 = BX_CPU_THIS_PTR oszapc.op2_8 & 0x80;
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result_b7 = BX_CPU_THIS_PTR oszapc.result_8 & 0x80;
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of = (op1_b7 == op2_b7) && (result_b7 ^ op2_b7);
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break;
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case BX_INSTR_ADD16:
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@ -644,7 +658,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b15 = BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000;
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op2_b15 = BX_CPU_THIS_PTR oszapc.op2_16 & 0x8000;
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result_b15 = BX_CPU_THIS_PTR oszapc.result_16 & 0x8000;
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of = (op1_b15 == op2_b15) && (result_b15 ^ op2_b15);
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break;
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case BX_INSTR_ADD32:
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@ -653,7 +666,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b31 = BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000;
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op2_b31 = BX_CPU_THIS_PTR oszapc.op2_32 & 0x80000000;
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result_b31 = BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000;
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of = (op1_b31 == op2_b31) && (result_b31 ^ op2_b31);
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break;
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#if BX_SUPPORT_X86_64
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@ -663,7 +675,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b63 = BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000);
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op2_b63 = BX_CPU_THIS_PTR oszapc.op2_64 & BX_CONST64(0x8000000000000000);
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result_b63 = BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000);
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of = (op1_b63 == op2_b63) && (result_b63 ^ op2_b63);
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break;
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#endif
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@ -675,7 +686,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b7 = BX_CPU_THIS_PTR oszapc.op1_8 & 0x80;
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op2_b7 = BX_CPU_THIS_PTR oszapc.op2_8 & 0x80;
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result_b7 = BX_CPU_THIS_PTR oszapc.result_8 & 0x80;
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of = (op1_b7 ^ op2_b7) && (op1_b7 ^ result_b7);
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break;
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case BX_INSTR_SUB16:
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@ -686,7 +696,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b15 = BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000;
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op2_b15 = BX_CPU_THIS_PTR oszapc.op2_16 & 0x8000;
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result_b15 = BX_CPU_THIS_PTR oszapc.result_16 & 0x8000;
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of = (op1_b15 ^ op2_b15) && (op1_b15 ^ result_b15);
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break;
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case BX_INSTR_SUB32:
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@ -697,7 +706,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b31 = BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000;
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op2_b31 = BX_CPU_THIS_PTR oszapc.op2_32 & 0x80000000;
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result_b31 = BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000;
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of = (op1_b31 ^ op2_b31) && (op1_b31 ^ result_b31);
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break;
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#if BX_SUPPORT_X86_64
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@ -709,7 +717,6 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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op1_b63 = BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000);
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op2_b63 = BX_CPU_THIS_PTR oszapc.op2_64 & BX_CONST64(0x8000000000000000);
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result_b63 = BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000);
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of = (op1_b63 ^ op2_b63) && (op1_b63 ^ result_b63);
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break;
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#endif
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@ -730,8 +737,11 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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case BX_INSTR_LOGIC8:
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case BX_INSTR_LOGIC16:
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case BX_INSTR_LOGIC32:
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case BX_INSTR_BITSCAN16:
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case BX_INSTR_BITSCAN32:
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#if BX_SUPPORT_X86_64
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case BX_INSTR_LOGIC64:
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case BX_INSTR_BITSCAN64:
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#endif
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of = 0;
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break;
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@ -739,26 +749,26 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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if (BX_CPU_THIS_PTR oszapc.op2_8 == 1)
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of = (BX_CPU_THIS_PTR oszapc.op1_8 >= 0x80);
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else
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of = (BX_CPU_THIS_PTR eflags.val32 >> 11) & 1; // Old val
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of = 0; /* undocumented, but hardware really does it */
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break;
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case BX_INSTR_SHR16:
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if (BX_CPU_THIS_PTR oszapc.op2_16 == 1)
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of = (BX_CPU_THIS_PTR oszapc.op1_16 >= 0x8000);
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else
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of = (BX_CPU_THIS_PTR eflags.val32 >> 11) & 1; // Old val
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of = 0; /* undocumented, but hardware really does it */
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break;
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case BX_INSTR_SHR32:
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if (BX_CPU_THIS_PTR oszapc.op2_32 == 1)
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of = (BX_CPU_THIS_PTR oszapc.op1_32 >= 0x80000000);
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else
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of = (BX_CPU_THIS_PTR eflags.val32 >> 11) & 1; // Old val
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of = 0; /* undocumented, but hardware really does it */
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break;
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#if BX_SUPPORT_X86_64
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case BX_INSTR_SHR64:
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if (BX_CPU_THIS_PTR oszapc.op2_64 == 1)
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of = (BX_CPU_THIS_PTR oszapc.op1_64 >= BX_CONST64(0x8000000000000000));
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else
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of = (BX_CPU_THIS_PTR eflags.val32 >> 11) & 1; // Old val
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of = 0; /* undocumented, but hardware really does it */
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break;
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#endif
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case BX_INSTR_SHL8:
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@ -878,6 +888,7 @@ bx_bool BX_CPU_C::get_PFLazy(void)
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case BX_INSTR_SCAS16:
|
||||
case BX_INSTR_SHR16:
|
||||
case BX_INSTR_SHL16:
|
||||
case BX_INSTR_BITSCAN16:
|
||||
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_16];
|
||||
break;
|
||||
case BX_INSTR_LOGIC32:
|
||||
|
|
@ -892,6 +903,7 @@ bx_bool BX_CPU_C::get_PFLazy(void)
|
|||
case BX_INSTR_SCAS32:
|
||||
case BX_INSTR_SHR32:
|
||||
case BX_INSTR_SHL32:
|
||||
case BX_INSTR_BITSCAN32:
|
||||
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_32];
|
||||
break;
|
||||
#if BX_SUPPORT_X86_64
|
||||
|
|
@ -907,6 +919,7 @@ bx_bool BX_CPU_C::get_PFLazy(void)
|
|||
case BX_INSTR_SCAS64:
|
||||
case BX_INSTR_SHR64:
|
||||
case BX_INSTR_SHL64:
|
||||
case BX_INSTR_BITSCAN64:
|
||||
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_64];
|
||||
break;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: lazy_flags.h,v 1.9 2004-08-13 20:00:03 sshwarts Exp $
|
||||
// $Id: lazy_flags.h,v 1.10 2004-08-14 19:34:02 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
|
|
@ -97,12 +97,11 @@
|
|||
#define BX_INSTR_LOGIC32 55
|
||||
#define BX_INSTR_LOGIC64 56
|
||||
|
||||
#define BX_INSTR_BITSCAN8 57
|
||||
// BX_INSTR_BITSCAN8 not exists, leave number for alignment
|
||||
#define BX_INSTR_BITSCAN16 58
|
||||
#define BX_INSTR_BITSCAN32 59
|
||||
#define BX_INSTR_BITSCAN64 60
|
||||
|
||||
#define BX_LF_INDEX_KNOWN 0
|
||||
#define BX_LF_INDEX_OSZAPC 1
|
||||
#define BX_LF_INDEX_OSZAP 2
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: mult16.cc,v 1.12 2004-08-13 20:00:03 sshwarts Exp $
|
||||
// $Id: mult16.cc,v 1.13 2004-08-14 19:34:02 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
|
|
@ -227,7 +227,7 @@ BX_CPU_C::IMUL_GwEwIw(bxInstruction_c *i)
|
|||
* result exactly fits within r16
|
||||
*/
|
||||
|
||||
if (product_32 > -32768 && product_32 < 32767) {
|
||||
if (product_32 > -32768 && product_32 < 32767) {
|
||||
SET_FLAGS_OxxxxC(0, 0);
|
||||
}
|
||||
else {
|
||||
|
|
@ -265,7 +265,7 @@ BX_CPU_C::IMUL_GwEw(bxInstruction_c *i)
|
|||
* result exactly fits within r16
|
||||
*/
|
||||
|
||||
if (product_32 > -32768 && product_32 < 32767) {
|
||||
if (product_32 > -32768 && product_32 < 32767) {
|
||||
SET_FLAGS_OxxxxC(0, 0);
|
||||
}
|
||||
else {
|
||||
|
|
|
|||
Loading…
Reference in New Issue