mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

pply patch

Browse Source 
[ 924428 ] ET bit mismatch between CR0 and MSW
This commit is contained in:
Stanislav Shwartsman 2004-06-03 17:57:29 +00:00
parent ea987f266c
commit e6991f043f
2 changed files with 18 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
bochs/CHANGES
View File

@ -18,6 +18,7 @@ Changes to next release:
- change BX_PANIC messages to BX_INFO when behaviour exactly
matches Intel docs
- fixed using invalid segment register for MOV instruction (h.johansson)
- fixed ET bit mismatch between CR0 and SMSW instruction
- FPU
- fixed #NM exception on when FPU is disabled for FPU opcodes
@ -75,8 +76,22 @@ Changes to next release:
[903465] SEGV in iodev/ne2k.cc line 1211 on Alpha architecture by Christian Lestrade
[903332] copy the bximage result to clipboard, etc by Lukewarm
[950905] Do not PANIC on rare, bad input from user-mode by h.johansson
[924428] ET bit mismatch between CR0 and MSW
- these S.F. bugs were closed
#716116 Direct floppy access
#962919 Mac: iodev/cdrom.cc disordered
#954751 Two FPU.CPP in project
#954359 Compile faile is 3dnow support is selected without SSE support
#906412 FreeSCO error
#942060 FDC Controller not conforming to specifications
#938522 Win XP installation fails
#923613 BOUND instruction exception handling is broken
#923223 memtest86 errors
#593342 autoconf script doesn't regenerate clean
#616116 Crash on exit...
#922042 shutdown through port 92 does not work
#891633 02839990390p[CPU0 ] >>PANIC<< RDMSR: Unknown register 0x17
#923653 DAA instruction is broken
#911225 obscure AAA / AAS bugs
#837206 Problems with numerical keys

12
bochs/cpu/proc_ctrl.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: proc_ctrl.cc,v 1.79 2004-05-10 21:05:50 sshwarts Exp $
// $Id: proc_ctrl.cc,v 1.80 2004-06-03 17:57:29 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -604,15 +604,9 @@ void BX_CPU_C::SMSW_Ew(bxInstruction_c *i)
msw |= (BX_CPU_THIS_PTR cr0.ts << 3) |
(BX_CPU_THIS_PTR cr0.em << 2) |
(BX_CPU_THIS_PTR cr0.mp << 1) |
BX_CPU_THIS_PTR cr0.pe;
(BX_CPU_THIS_PTR cr0.pe);
#else /* 386+ */
/* reserved bits 0 ??? */
/* should NE bit be included here ??? */
// should ET bit be included here (AW)
msw = (BX_CPU_THIS_PTR cr0.ts << 3) |
(BX_CPU_THIS_PTR cr0.em << 2) |
(BX_CPU_THIS_PTR cr0.mp << 1) |
BX_CPU_THIS_PTR cr0.pe;
msw = BX_CPU_THIS_PTR cr0.val32 & 0xffff;
#endif
if (i->modC0()) {