mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Speed-up BTC instruction

Browse Source 
Speed-up SAR instruction with implementing lazy-flags for it
This commit is contained in:
Stanislav Shwartsman 2004-08-15 20:12:05 +00:00
parent 98ef1412c3
commit eefdcece6f
7 changed files with 63 additions and 113 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

40
bochs/cpu/bit.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: bit.cc,v 1.19 2004-08-14 19:34:02 sshwarts Exp $
// $Id: bit.cc,v 1.20 2004-08-15 20:12:05 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1290,13 +1290,8 @@ BX_CPU_C::BTC_EvGv(bxInstruction_c *i)
}
temp_CF = (op1_64 >> index) & 0x01;
// old code not as efficient???
op1_64 &= ~(((Bit64u) 1) << index); /* clear out bit */
op1_64 |= (((Bit64u) !temp_CF) << index); /* set to complement */
//op1_64 ^= (((Bit64u) 1) << index); /* toggle bit wrong??? */
op1_64 ^= (((Bit64u) 1) << index); /* toggle bit */
set_CF(temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
@ -1305,7 +1300,6 @@ BX_CPU_C::BTC_EvGv(bxInstruction_c *i)
else {
Write_RMW_virtual_qword(op1_64);
}
set_CF(temp_CF);
}
else
#endif // #if BX_SUPPORT_X86_64
@ -1329,8 +1323,8 @@ BX_CPU_C::BTC_EvGv(bxInstruction_c *i)
}
temp_CF = (op1_32 >> index_32) & 0x01;
op1_32 &= ~(((Bit32u) 1) << index_32); /* clear out bit */
op1_32 |= (((Bit32u) !temp_CF) << index_32); /* set to complement */
op1_32 ^= (((Bit32u) 1) << index_32); /* toggle bit */
set_CF(temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
@ -1339,7 +1333,6 @@ BX_CPU_C::BTC_EvGv(bxInstruction_c *i)
else {
Write_RMW_virtual_dword(op1_32);
}
set_CF(temp_CF);
}
else { /* 16 bit operand size mode */
Bit16u op1_16, op2_16, index_16, temp_CF;
@ -1360,8 +1353,8 @@ BX_CPU_C::BTC_EvGv(bxInstruction_c *i)
}
temp_CF = (op1_16 >> index_16) & 0x01;
op1_16 &= ~(((Bit16u) 1) << index_16); /* clear out bit */
op1_16 |= (((Bit16u) !temp_CF) << index_16); /* set to complement */
op1_16 ^= (((Bit16u) 1) << index_16); /* toggle bit */
set_CF(temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
@ -1572,10 +1565,8 @@ BX_CPU_C::BTC_EvIb(bxInstruction_c *i)
}
temp_CF = (op1_64 >> op2_8) & 0x01;
op1_64 &= ~(((Bit64u) 1) << op2_8); /* clear out bit */
op1_64 |= (((Bit64u) !temp_CF) << op2_8); /* set to complement */
//op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
set_CF(temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
@ -1584,7 +1575,6 @@ BX_CPU_C::BTC_EvIb(bxInstruction_c *i)
else {
Write_RMW_virtual_qword(op1_64);
}
set_CF(temp_CF);
}
else
#endif // #if BX_SUPPORT_X86_64
@ -1606,9 +1596,8 @@ BX_CPU_C::BTC_EvIb(bxInstruction_c *i)
}
temp_CF = (op1_32 >> op2_8) & 0x01;
op1_32 &= ~(((Bit32u) 1) << op2_8); /* clear out bit */
op1_32 |= (((Bit32u) !temp_CF) << op2_8); /* set to complement */
op1_32 ^= (((Bit32u) 1) << op2_8); /* toggle bit */
set_CF(temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
@ -1617,7 +1606,6 @@ BX_CPU_C::BTC_EvIb(bxInstruction_c *i)
else {
Write_RMW_virtual_dword(op1_32);
}
set_CF(temp_CF);
}
else { /* 16 bit operand size mode */
Bit16u op1_16, temp_CF;
@ -1636,8 +1624,8 @@ BX_CPU_C::BTC_EvIb(bxInstruction_c *i)
}
temp_CF = (op1_16 >> op2_8) & 0x01;
op1_16 &= ~(((Bit16u) 1) << op2_8); /* clear out bit */
op1_16 |= (((Bit16u) !temp_CF) << op2_8); /* set to complement */
op1_16 ^= (((Bit16u) 1) << op2_8); /* toggle bit */
set_CF(temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
@ -1646,8 +1634,6 @@ BX_CPU_C::BTC_EvIb(bxInstruction_c *i)
else {
Write_RMW_virtual_word(op1_16);
}
set_CF(temp_CF);
}
#endif
}

42
bochs/cpu/lazy_flags.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: lazy_flags.cc,v 1.16 2004-08-14 20:44:48 sshwarts Exp $
// $Id: lazy_flags.cc,v 1.17 2004-08-15 20:12:05 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -176,26 +176,22 @@ bx_bool BX_CPU_C::get_CFLazy(void)
#endif
cf = 0;
break;
case BX_INSTR_SAR8:
case BX_INSTR_SHR8:
cf =
(BX_CPU_THIS_PTR oszapc.op1_8 >>
(BX_CPU_THIS_PTR oszapc.op2_8 - 1)) & 0x01;
cf = BX_CPU_THIS_PTR oszapc.result_8 & 0x01;
break;
case BX_INSTR_SAR16:
case BX_INSTR_SHR16:
cf =
(BX_CPU_THIS_PTR oszapc.op1_16 >>
(BX_CPU_THIS_PTR oszapc.op2_16 - 1)) & 0x01;
cf = BX_CPU_THIS_PTR oszapc.result_16 & 0x01;
break;
case BX_INSTR_SAR32:
case BX_INSTR_SHR32:
cf =
(BX_CPU_THIS_PTR oszapc.op1_32 >>
(BX_CPU_THIS_PTR oszapc.op2_32 - 1)) & 0x01;
cf = BX_CPU_THIS_PTR oszapc.result_32 & 0x01;
break;
#if BX_SUPPORT_X86_64
case BX_INSTR_SAR64:
case BX_INSTR_SHR64:
cf =
(BX_CPU_THIS_PTR oszapc.op1_64 >>
(BX_CPU_THIS_PTR oszapc.op2_64 - 1)) & 0x01;
cf = BX_CPU_THIS_PTR oszapc.result_64 & 0x01;
break;
#endif
case BX_INSTR_SHL8:
@ -325,9 +321,13 @@ bx_bool BX_CPU_C::get_AFLazy(void)
#if BX_SUPPORT_X86_64
case BX_INSTR_LOGIC64:
case BX_INSTR_BITSCAN64:
case BX_INSTR_SAR64:
case BX_INSTR_SHR64:
case BX_INSTR_SHL64:
#endif
case BX_INSTR_SAR8:
case BX_INSTR_SAR16:
case BX_INSTR_SAR32:
case BX_INSTR_SHR8:
case BX_INSTR_SHR16:
case BX_INSTR_SHR32:
@ -408,6 +408,7 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_NEG8:
case BX_INSTR_CMPS8:
case BX_INSTR_SCAS8:
case BX_INSTR_SAR8:
case BX_INSTR_SHR8:
case BX_INSTR_SHL8:
zf = (BX_CPU_THIS_PTR oszapc.result_8 == 0);
@ -421,6 +422,7 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_NEG16:
case BX_INSTR_CMPS16:
case BX_INSTR_SCAS16:
case BX_INSTR_SAR16:
case BX_INSTR_SHR16:
case BX_INSTR_SHL16:
zf = (BX_CPU_THIS_PTR oszapc.result_16 == 0);
@ -434,6 +436,7 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_NEG32:
case BX_INSTR_CMPS32:
case BX_INSTR_SCAS32:
case BX_INSTR_SAR32:
case BX_INSTR_SHR32:
case BX_INSTR_SHL32:
zf = (BX_CPU_THIS_PTR oszapc.result_32 == 0);
@ -448,6 +451,7 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_NEG64:
case BX_INSTR_CMPS64:
case BX_INSTR_SCAS64:
case BX_INSTR_SAR64:
case BX_INSTR_SHR64:
case BX_INSTR_SHL64:
zf = (BX_CPU_THIS_PTR oszapc.result_64 == 0);
@ -520,6 +524,7 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_NEG8:
case BX_INSTR_CMPS8:
case BX_INSTR_SCAS8:
case BX_INSTR_SAR8:
case BX_INSTR_SHR8:
case BX_INSTR_SHL8:
sf = (BX_CPU_THIS_PTR oszapc.result_8 >= 0x80);
@ -533,6 +538,7 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_NEG16:
case BX_INSTR_CMPS16:
case BX_INSTR_SCAS16:
case BX_INSTR_SAR16:
case BX_INSTR_SHR16:
case BX_INSTR_SHL16:
case BX_INSTR_BITSCAN16:
@ -547,6 +553,7 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_NEG32:
case BX_INSTR_CMPS32:
case BX_INSTR_SCAS32:
case BX_INSTR_SAR32:
case BX_INSTR_SHR32:
case BX_INSTR_SHL32:
case BX_INSTR_BITSCAN32:
@ -562,6 +569,7 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_NEG64:
case BX_INSTR_CMPS64:
case BX_INSTR_SCAS64:
case BX_INSTR_SAR64:
case BX_INSTR_SHR64:
case BX_INSTR_SHL64:
case BX_INSTR_BITSCAN64:
@ -716,9 +724,13 @@ bx_bool BX_CPU_C::get_OFLazy(void)
case BX_INSTR_LOGIC32:
case BX_INSTR_BITSCAN16:
case BX_INSTR_BITSCAN32:
case BX_INSTR_SAR8:
case BX_INSTR_SAR16:
case BX_INSTR_SAR32:
#if BX_SUPPORT_X86_64
case BX_INSTR_LOGIC64:
case BX_INSTR_BITSCAN64:
case BX_INSTR_SAR64:
#endif
of = 0;
break;
@ -848,6 +860,7 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_NEG8:
case BX_INSTR_CMPS8:
case BX_INSTR_SCAS8:
case BX_INSTR_SAR8:
case BX_INSTR_SHR8:
case BX_INSTR_SHL8:
pf = bx_parity_lookup[BX_CPU_THIS_PTR oszapc.result_8];
@ -861,6 +874,7 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_NEG16:
case BX_INSTR_CMPS16:
case BX_INSTR_SCAS16:
case BX_INSTR_SAR16:
case BX_INSTR_SHR16:
case BX_INSTR_SHL16:
case BX_INSTR_BITSCAN16:
@ -875,6 +889,7 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_NEG32:
case BX_INSTR_CMPS32:
case BX_INSTR_SCAS32:
case BX_INSTR_SAR32:
case BX_INSTR_SHR32:
case BX_INSTR_SHL32:
case BX_INSTR_BITSCAN32:
@ -890,6 +905,7 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_NEG64:
case BX_INSTR_CMPS64:
case BX_INSTR_SCAS64:
case BX_INSTR_SAR64:
case BX_INSTR_SHR64:
case BX_INSTR_SHL64:
case BX_INSTR_BITSCAN64:

21
bochs/cpu/lazy_flags.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: lazy_flags.h,v 1.11 2004-08-14 20:44:48 sshwarts Exp $
// $Id: lazy_flags.h,v 1.12 2004-08-15 20:12:05 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -87,15 +87,20 @@
#define BX_INSTR_SHR32 47
#define BX_INSTR_SHR64 48
#define BX_INSTR_SHL8 49
#define BX_INSTR_SHL16 50
#define BX_INSTR_SHL32 51
#define BX_INSTR_SHL64 52
#define BX_INSTR_SAR8 49
#define BX_INSTR_SAR16 50
#define BX_INSTR_SAR32 51
#define BX_INSTR_SAR64 52
#define BX_INSTR_SHL8 53
#define BX_INSTR_SHL16 54
#define BX_INSTR_SHL32 55
#define BX_INSTR_SHL64 56
// BX_INSTR_BITSCAN8 not exists, leave number for alignment
#define BX_INSTR_BITSCAN16 54
#define BX_INSTR_BITSCAN32 55
#define BX_INSTR_BITSCAN64 56
#define BX_INSTR_BITSCAN16 58
#define BX_INSTR_BITSCAN32 59
#define BX_INSTR_BITSCAN64 60
#define BX_LF_INDEX_OSZAPC 1
#define BX_LF_INDEX_OSZAP 2

23
bochs/cpu/shift16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift16.cc,v 1.20 2004-08-13 20:00:03 sshwarts Exp $
// $Id: shift16.cc,v 1.21 2004-08-15 20:12:05 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -484,24 +484,5 @@ BX_CPU_C::SAR_Ew(bxInstruction_c *i)
Write_RMW_virtual_word(result_16);
}
/* set eflags:
* SAR count affects the following flags: S,Z,P,C
*/
if (count < 16) {
set_CF((op1_16 >> (count - 1)) & 0x01);
}
else {
if (op1_16 & 0x8000) {
set_CF(1);
}
else {
set_CF(0);
}
}
set_ZF(result_16 == 0);
set_SF(result_16 >> 15);
if (count == 1)
set_OF(0);
set_PF_base((Bit8u) result_16);
SET_FLAGS_OSZAPC_RESULT_16(result_16, BX_INSTR_SAR16);
}

13
bochs/cpu/shift32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift32.cc,v 1.21 2004-08-13 20:00:03 sshwarts Exp $
// $Id: shift32.cc,v 1.22 2004-08-15 20:12:05 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -435,14 +435,5 @@ BX_CPU_C::SAR_Ed(bxInstruction_c *i)
Write_RMW_virtual_dword(result_32);
}
/* set eflags:
* SAR count affects the following flags: S,Z,P,C
*/
set_CF((op1_32 >> (count - 1)) & 0x01);
set_ZF(result_32 == 0);
set_SF(result_32 >> 31);
if (count == 1)
set_OF(0);
set_PF_base(result_32);
SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_SAR32);
}

13
bochs/cpu/shift64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift64.cc,v 1.12 2004-08-09 21:28:47 sshwarts Exp $
// $Id: shift64.cc,v 1.13 2004-08-15 20:12:05 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -424,16 +424,7 @@ BX_CPU_C::SAR_Eq(bxInstruction_c *i)
Write_RMW_virtual_qword(result_64);
}
/* set eflags:
* SAR count affects the following flags: S,Z,P,C
*/
set_CF((op1_64 >> (count - 1)) & 0x01);
set_ZF(result_64 == 0);
set_SF(result_64 >> 63);
if (count == 1)
set_OF(0);
set_PF_base(result_64);
SET_FLAGS_OSZAPC_RESULT_64(result_64, BX_INSTR_SAR64);
}
#endif /* if BX_SUPPORT_X86_64 */

24
bochs/cpu/shift8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift8.cc,v 1.15 2004-08-09 21:28:47 sshwarts Exp $
// $Id: shift8.cc,v 1.16 2004-08-15 20:12:05 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -350,25 +350,5 @@ BX_CPU_C::SAR_Eb(bxInstruction_c *i)
Write_RMW_virtual_byte(result_8);
}
/* set eflags:
* SAR count affects the following flags: S,Z,P,C
*/
if (count < 8) {
set_CF((op1_8 >> (count - 1)) & 0x01);
}
else {
if (op1_8 & 0x80) {
set_CF(1);
}
else {
set_CF(0);
}
}
set_ZF(result_8 == 0);
set_SF(result_8 >> 7);
if (count == 1)
set_OF(0);
set_PF_base(result_8);
SET_FLAGS_OSZAPC_RESULT_8(result_8, BX_INSTR_SAR8);
}