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@ -241,11 +241,16 @@ void BX_CPU_C::CPUID(bxInstruction_c *i)
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// [13:13] PGE/PTE Global Bit
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// [14:14] MCA: Machine Check Architecture
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// [15:15] CMOV: Cond Mov/Cmp Instructions
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// [22:16] Reserved
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// [16:16] PAT: Page Attribute Table
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// [17:17] PSE: Page-Size Extensions
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// [18:18] Reserved
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// [19:19] CLFLUSH: CLFLUSH Instruction support
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// [22:20] Reserved
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// [23:23] MMX Technology
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// [24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
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// [25] SSE: SSE Extensions
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// [26] SSE2: SSE2 Extensions
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// [27] Reserved
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// [28] Hyper Threading Technology
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// [29] TM: Thermal Monitor
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// [31:30] Reserved
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@ -283,12 +288,11 @@ void BX_CPU_C::CPUID(bxInstruction_c *i)
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features = get_std_cpuid_features ();
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RAX = features;
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// Many of the bits in EDX are the same as EAX
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// [10:10] Reserved
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// [11:11] SYSCALL and SYSRET instructions
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// [18:19] Reserved
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// [20:20] No-Execute page protection
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// [21:21] Reserved
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// [22:22] AMD MMX Extensions
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// [25:25] Fast FXSAVE/FXRSTOR mode support
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// [25:28] Reserved
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// [29:29] Long Mode
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// [30:30] AMD 3DNow! Extensions
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