LAZY-FLAGS for MUL instructions
undocumented flags handling for MUL instructions
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986f879a85
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f2294e7c29
@ -20,8 +20,8 @@ Changes to next release:
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- fixed using invalid segment register for MOV instruction (h.johansson)
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- fixed ET bit mismatch between CR0 and SMSW instruction
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- fixed possible simulator #DIVZERO fault when executing IDIV instruction
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- fixed undocumented flags handling for BTS, BTR and SHR instructions
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(Stanislav Shwartsman)
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- fixed undocumented flags handling for BTS, BTR, SHR and MUL
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instructions (Stanislav Shwartsman)
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- fixed CF flag handling for SHL instruction in x86-64 mode
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(Stanislav Shwartsman)
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: lazy_flags.cc,v 1.22 2004-08-18 20:49:31 sshwarts Exp $
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// $Id: lazy_flags.cc,v 1.23 2004-08-26 20:37:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -227,6 +227,20 @@ bx_bool BX_CPU_C::get_CFLazy(void)
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(BX_CPU_THIS_PTR oszapc.op1_64 >>
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(64 - BX_CPU_THIS_PTR oszapc.op2_64)) & 0x01;
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break;
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#endif
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case BX_INSTR_MUL8:
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cf = (BX_CPU_THIS_PTR oszapc.op2_8 != 0);
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break;
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case BX_INSTR_MUL16:
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cf = (BX_CPU_THIS_PTR oszapc.op2_16 != 0);
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break;
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case BX_INSTR_MUL32:
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cf = (BX_CPU_THIS_PTR oszapc.op2_32 != 0);
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break;
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#if BX_SUPPORT_X86_64
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case BX_INSTR_MUL64:
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cf = (BX_CPU_THIS_PTR oszapc.op2_64 != 0);
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break;
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#endif
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default:
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cf = 0; // Keep compiler quiet.
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@ -318,6 +332,7 @@ bx_bool BX_CPU_C::get_AFLazy(void)
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case BX_INSTR_SAR64:
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case BX_INSTR_SHR64:
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case BX_INSTR_SHL64:
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case BX_INSTR_MUL64:
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#endif
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case BX_INSTR_SAR8:
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case BX_INSTR_SAR16:
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@ -328,6 +343,9 @@ bx_bool BX_CPU_C::get_AFLazy(void)
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case BX_INSTR_SHL8:
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case BX_INSTR_SHL16:
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case BX_INSTR_SHL32:
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case BX_INSTR_MUL8:
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case BX_INSTR_MUL16:
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case BX_INSTR_MUL32:
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af = 0;
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break;
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default:
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@ -442,6 +460,24 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
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case BX_INSTR_SHL64:
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zf = (BX_CPU_THIS_PTR oszapc.result_64 == 0);
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break;
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#endif
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case BX_INSTR_MUL8:
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zf = (BX_CPU_THIS_PTR oszapc.op1_8 |
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BX_CPU_THIS_PTR oszapc.op2_8) == 0;
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break;
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case BX_INSTR_MUL16:
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zf = (BX_CPU_THIS_PTR oszapc.op1_16 |
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BX_CPU_THIS_PTR oszapc.op2_16) == 0;
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break;
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case BX_INSTR_MUL32:
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zf = (BX_CPU_THIS_PTR oszapc.op1_32 |
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BX_CPU_THIS_PTR oszapc.op2_32) == 0;
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break;
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#if BX_SUPPORT_X86_64
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case BX_INSTR_MUL64:
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zf = (BX_CPU_THIS_PTR oszapc.op1_64 |
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BX_CPU_THIS_PTR oszapc.op2_64) == 0;
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break;
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#endif
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case BX_INSTR_BITSCAN16:
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case BX_INSTR_BITSCAN32:
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@ -553,6 +589,20 @@ bx_bool BX_CPU_C::get_SFLazy(void)
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case BX_INSTR_BITSCAN64:
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sf = (BX_CPU_THIS_PTR oszapc.result_64 >= BX_CONST64(0x8000000000000000));
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break;
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#endif
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case BX_INSTR_MUL8:
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sf = (BX_CPU_THIS_PTR oszapc.op2_8 >= 0x80);
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break;
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case BX_INSTR_MUL16:
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sf = (BX_CPU_THIS_PTR oszapc.op2_16 >= 0x8000);
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break;
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case BX_INSTR_MUL32:
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sf = (BX_CPU_THIS_PTR oszapc.op2_32 >= 0x80000000);
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break;
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#if BX_SUPPORT_X86_64
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case BX_INSTR_MUL64:
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sf = (BX_CPU_THIS_PTR oszapc.op2_64 >= BX_CONST64(0x8000000000000000));
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break;
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#endif
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default:
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sf = 0; // Keep compiler quiet.
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@ -759,6 +809,20 @@ bx_bool BX_CPU_C::get_OFLazy(void)
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else
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of = (BX_CPU_THIS_PTR eflags.val32 >> 11) & 1; // Old val
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break;
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#endif
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case BX_INSTR_MUL8:
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of = (BX_CPU_THIS_PTR oszapc.op2_8 != 0);
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break;
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case BX_INSTR_MUL16:
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of = (BX_CPU_THIS_PTR oszapc.op2_16 != 0);
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break;
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case BX_INSTR_MUL32:
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of = (BX_CPU_THIS_PTR oszapc.op2_32 != 0);
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break;
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#if BX_SUPPORT_X86_64
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case BX_INSTR_MUL64:
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of = (BX_CPU_THIS_PTR oszapc.op2_64 != 0);
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break;
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#endif
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default:
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of = 0; // Keep compiler happy.
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@ -873,6 +937,20 @@ bx_bool BX_CPU_C::get_PFLazy(void)
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case BX_INSTR_BITSCAN64:
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pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_64];
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break;
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#endif
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case BX_INSTR_MUL8:
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pf = bx_parity_lookup[BX_CPU_THIS_PTR oszapc.op1_8];
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break;
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case BX_INSTR_MUL16:
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pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.op1_16];
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break;
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case BX_INSTR_MUL32:
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pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.op1_16];
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break;
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#if BX_SUPPORT_X86_64
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case BX_INSTR_MUL64:
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pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.op1_64];
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break;
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#endif
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default:
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pf = 0; // Keep compiler quiet.
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: lazy_flags.h,v 1.15 2004-08-18 20:49:31 sshwarts Exp $
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// $Id: lazy_flags.h,v 1.16 2004-08-26 20:37:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -94,6 +94,11 @@
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#define BX_INSTR_SAR32 51
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#define BX_INSTR_SAR64 52
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#define BX_INSTR_MUL8 53
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#define BX_INSTR_MUL16 54
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#define BX_INSTR_MUL32 55
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#define BX_INSTR_MUL64 56
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#define BX_LF_INDEX_OSZAPC 1
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#define BX_LF_INDEX_OSZAP 2
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/////////////////////////////////////////////////////////////////////////
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// $Id: mult16.cc,v 1.14 2004-08-18 19:27:52 sshwarts Exp $
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// $Id: mult16.cc,v 1.15 2004-08-26 20:37:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -33,8 +33,7 @@
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void
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BX_CPU_C::MUL_AXEw(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16, product_16h, product_16l;
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Bit32u product_32;
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Bit16u op1_16, op2_16;
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op1_16 = AX;
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@ -47,20 +46,16 @@ BX_CPU_C::MUL_AXEw(bxInstruction_c *i)
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read_virtual_word(i->seg(), RMAddr(i), &op2_16);
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}
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product_32 = ((Bit32u) op1_16) * ((Bit32u) op2_16);
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product_16l = (product_32 & 0xFFFF);
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product_16h = product_32 >> 16;
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Bit32u product_32 = ((Bit32u) op1_16) * ((Bit32u) op2_16);
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Bit16u product_16l = (product_32 & 0xFFFF);
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Bit16u product_16h = product_32 >> 16;
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/* set EFLAGS */
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SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, BX_INSTR_MUL16);
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/* now write product back to destination */
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AX = product_16l;
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DX = product_16h;
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/* set eflags:
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* MUL affects the following flags: C,O
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*/
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bx_bool temp_flag = (product_16h != 0);
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SET_FLAGS_OxxxxC(temp_flag, temp_flag);
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}
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void
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/////////////////////////////////////////////////////////////////////////
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// $Id: mult32.cc,v 1.14 2004-08-18 19:27:52 sshwarts Exp $
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// $Id: mult32.cc,v 1.15 2004-08-26 20:37:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -58,16 +58,12 @@ BX_CPU_C::MUL_EAXEd(bxInstruction_c *i)
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product_32l = (Bit32u) (product_64 & 0xFFFFFFFF);
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product_32h = (Bit32u) (product_64 >> 32);
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/* set EFLAGS */
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SET_FLAGS_OSZAPC_S1S2_32(product_32l, product_32h, BX_INSTR_MUL32);
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/* now write product back to destination */
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RAX = product_32l;
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RDX = product_32h;
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/* set eflags:
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* MUL affects the following flags: C,O
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*/
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bx_bool temp_flag = (product_32h != 0);
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SET_FLAGS_OxxxxC(temp_flag, temp_flag);
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}
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void
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/////////////////////////////////////////////////////////////////////////
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// $Id: mult64.cc,v 1.11 2004-08-18 21:29:07 sshwarts Exp $
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// $Id: mult64.cc,v 1.12 2004-08-26 20:37:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -228,16 +228,12 @@ BX_CPU_C::MUL_RAXEq(bxInstruction_c *i)
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long_mul(&product_128,op1_64,op2_64);
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/* set EFLAGS */
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SET_FLAGS_OSZAPC_S1S2_64(product_128.lo, product_128.hi, BX_INSTR_MUL64);
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/* now write product back to destination */
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RAX = product_128.lo;
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RDX = product_128.hi;
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/* set eflags:
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* MUL affects the following flags: C,O
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*/
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bx_bool temp_flag = (product_128.hi != 0);
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SET_FLAGS_OxxxxC(temp_flag, temp_flag);
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}
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void
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/////////////////////////////////////////////////////////////////////////
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// $Id: mult8.cc,v 1.14 2004-08-18 19:27:52 sshwarts Exp $
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// $Id: mult8.cc,v 1.15 2004-08-26 20:37:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -46,14 +46,13 @@ BX_CPU_C::MUL_ALEb(bxInstruction_c *i)
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read_virtual_byte(i->seg(), RMAddr(i), &op2);
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}
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Bit16u product_16 = op1 * op2;
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Bit32u product_16 = ((Bit16u) op1) * ((Bit16u) op2);
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/* set EFLAGS:
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* MUL affects the following flags: C,O
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*/
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Bit8u product_8l = (product_16 & 0xFF);
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Bit8u product_8h = product_16 >> 8;
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bx_bool temp_flag = ((product_16 & 0xFF00) != 0);
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SET_FLAGS_OxxxxC(temp_flag, temp_flag);
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/* set EFLAGS */
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SET_FLAGS_OSZAPC_S1S2_8(product_8l, product_8h, BX_INSTR_MUL8);
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/* now write product back to destination */
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AX = product_16;
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