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Fixed typo in apic.cc

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Small speedup for arith64.cc (redundant modC0() call ellimination)
Cleanup
This commit is contained in:
Stanislav Shwartsman 2005-04-02 18:49:44 +00:00
parent a5fb44c340
commit 6fd9f82c35
5 changed files with 77 additions and 143 deletions
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4
bochs/cpu/apic.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: apic.cc,v 1.45 2005-03-20 18:33:02 sshwarts Exp $
// $Id: apic.cc,v 1.46 2005-04-02 18:49:42 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
#define NEED_CPU_REG_SHORTCUTS 1
@ -457,7 +457,7 @@ void bx_local_apic_c::write (Bit32u addr, Bit32u *data, unsigned len)
break;
case 0xd0: // logical destination
log_dest = (value >> 24) & APIC_ID_MASK;
BX_DEBUG (("set logical destiation to %02x", log_dest));
BX_DEBUG (("set logical destination to %02x", log_dest));
break;
case 0xe0: // destination format
dest_format = (value >> 28) & 0xf;

6
bochs/cpu/arith16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith16.cc,v 1.38 2004-08-18 21:29:06 sshwarts Exp $
// $Id: arith16.cc,v 1.39 2005-04-02 18:49:43 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -622,12 +622,12 @@ BX_CPU_C::NEG_Ew(bxInstruction_c *i)
if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm());
diff_16 = 0 - op1_16;
diff_16 = -op1_16;
BX_WRITE_16BIT_REG(i->rm(), diff_16);
}
else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
diff_16 = 0 - op1_16;
diff_16 = -op1_16;
Write_RMW_virtual_word(diff_16);
}

26
bochs/cpu/arith32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith32.cc,v 1.43 2004-09-26 20:29:04 sshwarts Exp $
// $Id: arith32.cc,v 1.44 2005-04-02 18:49:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -41,35 +41,35 @@
void
BX_CPU_C::INC_ERX(bxInstruction_c *i)
{
unsigned opcodeReg = i->opcodeReg();
#if defined(BX_HostAsm_Inc32)
Bit32u flags32;
asmInc32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32);
asmInc32(BX_CPU_THIS_PTR gen_reg[opcodeReg].dword.erx, flags32);
setEFlagsOSZAP(flags32);
#else
Bit32u erx = ++ BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx;
Bit32u erx = ++ BX_CPU_THIS_PTR gen_reg[opcodeReg].dword.erx;
SET_FLAGS_OSZAP_RESULT_32(erx, BX_INSTR_INC32);
#endif
#if BX_SUPPORT_X86_64
BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.hrx = 0;
#endif
BX_CLEAR_64BIT_HIGH(opcodeReg);
}
void
BX_CPU_C::DEC_ERX(bxInstruction_c *i)
{
unsigned opcodeReg = i->opcodeReg();
#if defined(BX_HostAsm_Dec32)
Bit32u flags32;
asmDec32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32);
asmDec32(BX_CPU_THIS_PTR gen_reg[opcodeReg].dword.erx, flags32);
setEFlagsOSZAP(flags32);
#else
Bit32u erx = -- BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx;
Bit32u erx = -- BX_CPU_THIS_PTR gen_reg[opcodeReg].dword.erx;
SET_FLAGS_OSZAP_RESULT_32(erx, BX_INSTR_DEC32);
#endif
#if BX_SUPPORT_X86_64
BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.hrx = 0;
#endif
BX_CLEAR_64BIT_HIGH(opcodeReg);
}
void
@ -637,12 +637,12 @@ BX_CPU_C::NEG_Ed(bxInstruction_c *i)
if (i->modC0()) {
op1_32 = BX_READ_32BIT_REG(i->rm());
diff_32 = 0 - op1_32;
diff_32 = -op1_32;
BX_WRITE_32BIT_REGZ(i->rm(), diff_32);
}
else {
read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
diff_32 = 0 - op1_32;
diff_32 = -op1_32;
Write_RMW_virtual_dword(diff_32);
}

178
bochs/cpu/arith64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith64.cc,v 1.24 2004-08-18 21:29:07 sshwarts Exp $
// $Id: arith64.cc,v 1.25 2005-04-02 18:49:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -45,21 +45,15 @@ BX_CPU_C::ADD_EqGq(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
sum_64 = op1_64 + op2_64;
Write_RMW_virtual_qword(sum_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
}
@ -120,21 +114,15 @@ BX_CPU_C::ADC_EqGq(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
sum_64 = op1_64 + op2_64 + temp_CF;
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64 + temp_CF;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
sum_64 = op1_64 + op2_64 + temp_CF;
Write_RMW_virtual_qword(sum_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64,
(temp_CF) ? BX_INSTR_ADC64 : BX_INSTR_ADD64);
@ -202,21 +190,15 @@ BX_CPU_C::SBB_EqGq(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
diff_64 = op1_64 - (op2_64 + temp_CF);
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - (op2_64 + temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
diff_64 = op1_64 - (op2_64 + temp_CF);
Write_RMW_virtual_qword(diff_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64,
(temp_CF) ? BX_INSTR_SBB64 : BX_INSTR_SUB64);
@ -283,21 +265,15 @@ BX_CPU_C::SBB_EqId(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
diff_64 = op1_64 - (op2_64 + temp_CF);
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - (op2_64 + temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
diff_64 = op1_64 - (op2_64 + temp_CF);
Write_RMW_virtual_qword(diff_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64,
(temp_CF) ? BX_INSTR_SBB64 : BX_INSTR_SUB64);
@ -315,21 +291,15 @@ BX_CPU_C::SUB_EqGq(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
diff_64 = op1_64 - op2_64;
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - op2_64;
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
diff_64 = op1_64 - op2_64;
Write_RMW_virtual_qword(diff_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB64);
}
@ -507,21 +477,15 @@ BX_CPU_C::ADD_EqId(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
sum_64 = op1_64 + op2_64;
Write_RMW_virtual_qword(sum_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
}
@ -539,21 +503,15 @@ BX_CPU_C::ADC_EqId(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
sum_64 = op1_64 + op2_64 + temp_CF;
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64 + temp_CF;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
sum_64 = op1_64 + op2_64 + temp_CF;
Write_RMW_virtual_qword(sum_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64,
(temp_CF) ? BX_INSTR_ADC64 : BX_INSTR_ADD64);
@ -570,21 +528,15 @@ BX_CPU_C::SUB_EqId(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
diff_64 = op1_64 - op2_64;
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - op2_64;
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
diff_64 = op1_64 - op2_64;
Write_RMW_virtual_qword(diff_64);
}
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB64);
}
@ -620,21 +572,15 @@ BX_CPU_C::NEG_Eq(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
diff_64 = -op1_64;
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = 0 - op1_64;
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
diff_64 = -op1_64;
Write_RMW_virtual_qword(diff_64);
}
}
SET_FLAGS_OSZAPC_RESULT_64(diff_64, BX_INSTR_NEG64);
}
@ -647,21 +593,15 @@ BX_CPU_C::INC_Eq(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
op1_64++;
BX_WRITE_64BIT_REG(i->rm(), op1_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
op1_64++;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), op1_64);
}
else {
op1_64++;
Write_RMW_virtual_qword(op1_64);
}
}
SET_FLAGS_OSZAP_RESULT_64(op1_64, BX_INSTR_INC64);
}
@ -674,21 +614,15 @@ BX_CPU_C::DEC_Eq(bxInstruction_c *i)
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
op1_64--;
BX_WRITE_64BIT_REG(i->rm(), op1_64);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
op1_64--;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), op1_64);
}
else {
op1_64--;
Write_RMW_virtual_qword(op1_64);
}
}
SET_FLAGS_OSZAP_RESULT_64(op1_64, BX_INSTR_DEC64);
}

6
bochs/cpu/arith8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith8.cc,v 1.34 2004-08-18 21:29:07 sshwarts Exp $
// $Id: arith8.cc,v 1.35 2005-04-02 18:49:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -486,12 +486,12 @@ BX_CPU_C::NEG_Eb(bxInstruction_c *i)
if (i->modC0()) {
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
diff_8 = 0 - op1_8;
diff_8 = -op1_8;
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), diff_8);
}
else {
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
diff_8 = 0 - op1_8;
diff_8 = -op1_8;
Write_RMW_virtual_byte(diff_8);
}