Stanislav Shwartsman
54e3422e1b
bugfix
2009-08-15 15:36:35 +00:00
Stanislav Shwartsman
8a95120e12
deprecate --enable-vme option, now it will be supported iff CPU_LEVEL >= 5 (like in real life)
2009-08-10 15:44:50 +00:00
Stanislav Shwartsman
cd445195dd
cleanup configure options. All paging related stuff is now automatically set/unset according to cpu-level option.
...
Related configure options (--enable-pae, --enable-mtrr, --enable-global-pages, --enable-large-pages) are deprecated.
Less configure options - less configure problems :)
2009-06-15 09:30:56 +00:00
Stanislav Shwartsman
f59f067368
compilation err fixed
2009-06-12 11:45:05 +00:00
Stanislav Shwartsman
03ba2ec988
implement pdptr checks in legacy PAE mode
2009-05-31 07:49:04 +00:00
Stanislav Shwartsman
222129db4b
Rewritten long mode page walk - large code cleanup and few bugfixes
2009-05-30 15:09:38 +00:00
Stanislav Shwartsman
6fe6da5f25
small fixes
2009-05-07 12:00:02 +00:00
Stanislav Shwartsman
4fc66aab31
Fixes for compilation by Visual Studio 2008
2009-04-07 16:12:19 +00:00
Stanislav Shwartsman
9e092a86c3
merge "system" and "segment" blocks of descriptor
2009-04-05 19:09:44 +00:00
Stanislav Shwartsman
c9383813f0
don't have to keep both limit and limit_scale
2009-04-05 18:16:29 +00:00
Stanislav Shwartsman
c9d63a4e53
redo x86 hw i/o breakpoint stuff
2009-03-28 08:27:01 +00:00
Stanislav Shwartsman
4470c6a1c8
make ICACHE always enabled option and deprecate it in the configure script
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Trace cache still can be turned off
2009-03-13 18:48:08 +00:00
Stanislav Shwartsman
2bdc6ff231
insert updateFetchModeMask into handleCpuModeChange - avoid bugs in future
2009-03-10 22:28:08 +00:00
Stanislav Shwartsman
bc8be4ed06
Fixed CR8 read
2009-02-27 20:00:02 +00:00
Stanislav Shwartsman
3564ef3162
small fixes
2009-02-18 22:33:06 +00:00
Stanislav Shwartsman
3a1852ea23
take local APIC read/write access into CPU class from BX_MEM (needed for APIC virtualization later)
2009-02-17 19:20:47 +00:00
Stanislav Shwartsman
a5badd3b83
- bugfixes
2009-02-13 09:51:57 +00:00
Stanislav Shwartsman
6003f52704
Fixed compilation error + x86-64 correctness fix
2009-02-09 19:46:34 +00:00
Stanislav Shwartsman
aeaf51d33a
FIxed #DB exception in 64-bit mode
2009-02-06 15:25:57 +00:00
Stanislav Shwartsman
7c0582e4ea
Some fixes for X86-64 OFF mode
2009-02-04 16:05:47 +00:00
Stanislav Shwartsman
26fda0626d
Added missed CR0 reserved bits #GP in long mode
2009-02-03 21:11:31 +00:00
Stanislav Shwartsman
f6cb9e529f
Fixes for VMX emulation
2009-02-02 18:59:44 +00:00
Stanislav Shwartsman
2378d31998
Fixes for DR6 handling
2009-02-01 20:47:06 +00:00
Stanislav Shwartsman
f8185a6bc6
Added Intel VMX emulation to Bochs CPU
2009-01-31 10:43:24 +00:00
Stanislav Shwartsman
a1c11c788b
sepatate activity state from debug trap
2009-01-29 20:27:57 +00:00
Stanislav Shwartsman
0325c120b2
Separate PAUSE instruction from regular NOP
2009-01-27 20:29:05 +00:00
Stanislav Shwartsman
62005d4fd9
Minimize diff with VMX support branch
2009-01-23 09:26:24 +00:00
Stanislav Shwartsman
29a252b26e
final version of exceptions cleanups/interface changes
2009-01-21 22:09:59 +00:00
Stanislav Shwartsman
cc60240dc1
cleanup RDMSR
2009-01-19 17:43:54 +00:00
Stanislav Shwartsman
eaa00237c1
Notify debugger about MWAIT executed
2009-01-17 16:55:13 +00:00
Stanislav Shwartsman
9929e6ed78
- updated FSF address
2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
aee488ea3a
Fixed dbg print
2009-01-13 22:54:49 +00:00
Stanislav Shwartsman
6451356d2b
make function to calculate allowed bits in cr4
2009-01-10 10:37:23 +00:00
Stanislav Shwartsman
836e9649d8
modify set cr0 functionality
2009-01-10 10:07:57 +00:00
Stanislav Shwartsman
4369152c70
- Make CS segment always writeable in real mode
2009-01-10 09:36:44 +00:00
Stanislav Shwartsman
7f65e6b9ed
change PANIC to ERROR
2008-12-13 18:40:39 +00:00
Stanislav Shwartsman
5174f9fe82
Fixed debian i386 image freeze
2008-12-08 20:01:26 +00:00
Stanislav Shwartsman
f9ce1171fe
rename crreg accessors
2008-12-06 10:21:55 +00:00
Stanislav Shwartsman
70e9f4c161
preparing to different way of handling MSR registers
2008-12-05 12:48:36 +00:00
Stanislav Shwartsman
fe0456d519
Remove extra ;;
2008-10-03 17:00:46 +00:00
Stanislav Shwartsman
fb71c07b15
Fixes for MONITOR/MWAIT - the feature is still EXPERIMENTAL ONLY !
2008-10-03 16:53:08 +00:00
Stanislav Shwartsman
bc381e51da
very small cleanups
2008-09-19 19:18:57 +00:00
Stanislav Shwartsman
a9c77eb75d
Try to optimize individual instructions after fetchdecode
2008-09-16 19:20:03 +00:00
Stanislav Shwartsman
23933d731c
Remove 4G limit optimization that didn't work quite well
2008-09-08 20:47:33 +00:00
Stanislav Shwartsman
f5ba90da55
Misaligned check small optimization
2008-09-08 15:45:57 +00:00
Stanislav Shwartsman
79eb5efffa
- Preliminary implementation of X86 IO breakpoints
2008-08-30 08:14:46 +00:00
Stanislav Shwartsman
db8445abde
Allow 8b BP in 32bit mode as well
2008-08-29 22:14:02 +00:00
Stanislav Shwartsman
991ae348cb
Clean invalidate_prefetch_q when not needed
2008-08-23 13:55:37 +00:00
Stanislav Shwartsman
460d91fc8c
Added missed #GP fault when writing invalid memtype to MTRR/PAT
2008-08-15 10:59:31 +00:00
Stanislav Shwartsman
dcb82ec4bf
Optimize TLB flush methods
2008-08-13 21:51:54 +00:00
Stanislav Shwartsman
24e0b53720
This more ellegant way to have debug info for BxError and not lose any performace
2008-08-09 19:18:09 +00:00
Stanislav Shwartsman
5dd02b26e3
Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before
2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
6398ebb1d4
First step of access bits cleanup and optimization - no perf gain yet
2008-08-03 19:53:09 +00:00
Stanislav Shwartsman
924c87e451
Delete unused code
2008-07-13 15:36:57 +00:00
Stanislav Shwartsman
709d74728d
Call #UD exception directly instead of UndefinedOpcode function - for future use
2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
e9ec4fda48
Some chnages for future use
2008-07-13 10:44:34 +00:00
Stanislav Shwartsman
65275ffc02
Remove repeat speedups from 16-bit address size methods - they not gonna speed up anyway because of segment limit issue
2008-06-25 10:34:21 +00:00
Stanislav Shwartsman
c1f308d80d
Push error code if segment violation occurs when pushing arguments into a new stack
2008-06-25 02:28:31 +00:00
Stanislav Shwartsman
b65816a92d
Fixed problem in my morning checkin + some more changes
2008-06-23 15:58:22 +00:00
Stanislav Shwartsman
a6fda9a971
Instrumentation code updated, some PANIC messages fixed
2008-06-23 02:56:31 +00:00
Stanislav Shwartsman
fc6671a67b
Commented out assertion which doesn't work
2008-06-16 04:49:19 +00:00
Stanislav Shwartsman
9d1bc903d8
Fixed typo in MTRR, added assertions
2008-06-15 20:41:34 +00:00
Stanislav Shwartsman
a0e66d0e4c
fixed variable name
2008-06-14 16:55:45 +00:00
Stanislav Shwartsman
92568f7525
Faster 32-bit emulation wwith 64-bit enabled mode.
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~10% speedup byu optimization of 32-bit mem access
2008-06-12 19:14:40 +00:00
Stanislav Shwartsman
3d3dba7804
- Implemented GD bit in DR7 register
2008-06-02 19:50:40 +00:00
Stanislav Shwartsman
b7480b3e6f
- Fixed x86 data breakpoint match when breakpoint length is 8 bytes
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- FIxed x86 data breakpoint in paging disabled mode
2008-06-02 18:41:08 +00:00
Stanislav Shwartsman
d2ba79abdd
Removed PANIC in DqRq function
2008-05-31 21:17:02 +00:00
Stanislav Shwartsman
764756d74a
Handle reserved bits of CR8
2008-05-31 09:26:28 +00:00
Stanislav Shwartsman
d295371450
- Correctly handle segment a byte in BIG real mode
2008-05-26 21:46:39 +00:00
Stanislav Shwartsman
3619c0f6b4
Some changes to make x86-debugger feature working back
2008-05-23 17:49:46 +00:00
Stanislav Shwartsman
8118ba1a67
Fixed debug extensions exception priority
2008-05-19 19:59:29 +00:00
Stanislav Shwartsman
bef3450baa
Fixes to 64-bit mode
2008-05-11 20:46:11 +00:00
Stanislav Shwartsman
4a76bd2169
Fixed setting of reserved bits in CR3 register
2008-05-11 19:36:06 +00:00
Stanislav Shwartsman
ec1ff39a5f
Splitted memory access methods for 32 and 64-bit code.
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The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
3634c6f892
Compress FPU tag word
2008-05-10 13:34:47 +00:00
Stanislav Shwartsman
6ebae41ad7
print physcial address with special format - preparations for 64-bit physical address emu
2008-05-09 22:33:37 +00:00
Stanislav Shwartsman
80c9b5fcbe
Compilation error fixed
2008-05-09 08:28:00 +00:00
Stanislav Shwartsman
eedf26627f
Fixes in CMPXHG8B instruction - slight speedup and correct #AC check
2008-05-05 21:48:07 +00:00
Stanislav Shwartsman
64a80c8a2d
- Added canonical check for SYSENTER MSRs in WRMSR
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- Fixed LLDT and LTR instructions in 64-bit mode
- Fixed error code for not 64-bit CS in interrupt from long mode
2008-05-04 21:25:16 +00:00
Stanislav Shwartsman
50c9674d2e
Small optimization in memory access functions
2008-05-03 17:33:30 +00:00
Stanislav Shwartsman
06c6ac0060
- Fixed effective address wrap in 64-bit mode with 32-bit address size
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- Fixed SMSW instruction in 32-bit and 64-bit modes
2008-04-28 18:18:08 +00:00
Stanislav Shwartsman
67e534832b
Remove from CPU reference to MEM object - it is only one and could be static
2008-04-27 19:49:02 +00:00
Stanislav Shwartsman
9047c9be96
Support for reserved bits checking in paging
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Check for page is in DTLB before invalidating by INVLPG
2008-04-25 20:08:23 +00:00
Stanislav Shwartsman
a647c7e551
Check for old TSS limits in task switching logic
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MSR_GSKERNELBASE should be canonical - added WRMSR check
2008-04-25 11:39:51 +00:00
Stanislav Shwartsman
24f1507fa9
- sysenter/exit should be supported in v8086 mode as well
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- fixed missed CS.LIMIT check in all far calls/jmps in real/v8086 mode
2008-04-20 21:44:13 +00:00
Stanislav Shwartsman
280617288c
Mode change in SYSENTER/EXIT/CALL/RET could happen only when already in long mode
2008-04-20 18:17:14 +00:00
Stanislav Shwartsman
a91ef4e31b
Ignore CS.L bit when EFER.LMA is not set
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Add potentially missed CPU mode change in SYSCALL/RET/ENTER/EXIT
2008-04-20 18:10:32 +00:00
Stanislav Shwartsman
d9bf2b8453
Small emulation speed optimization
2008-04-19 22:29:44 +00:00
Stanislav Shwartsman
15e9dca062
- support 64-bit write to MSR_TSC using WRMSR instruction
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- fixed save/restore param type for async_event
- fixed setting of reserved bits in upper part of CR4 in 64-bit mode
2008-04-18 18:32:40 +00:00
Stanislav Shwartsman
892fa99c6f
- prefetch hint should be NOP when use in register mode
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- #GP when trying to set reserved bits of CR4_HI in 64-bit mode
- #GP when trying to set reserved bits of EFER MSR
- clear upper part of RSI/RDI when executing rep instructions with 32-bit asize
even if no repeat iterations were executed (because of RCX=0 for example)
- write SYSENTER_EIP_MSR and SYSENTER_ESP_MSR as 64-bit when x86_64 supported
- set MSR_FMASK reset value
- MSR_FMASK should be 32-bit only
- check for fetch permissions when doing ITLB lookup
- #GP when trying to write non-canonical address to MSR_CSTAR or MSR_LSTAR
- correct repeat instructions timing
- mark TSS busy in TR after it is loaded
2008-04-16 16:44:06 +00:00
Stanislav Shwartsman
67f02bfa12
Add debugger callback
2008-04-15 21:29:18 +00:00
Stanislav Shwartsman
fab4042cad
SYSENTER/SYSEXIT in long mode
2008-04-15 14:41:50 +00:00
Stanislav Shwartsman
a851cfd8f0
Re-implemented modebp debugger function in simple and more clean way
2008-04-07 19:59:53 +00:00
Stanislav Shwartsman
fea49bb270
Fixed linear address wrap in legacy (not long64) mode
2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
5826e2843a
Inline pop/push functions
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Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
41fe0b3ebb
Fix code duplication
2008-04-03 18:59:10 +00:00
Stanislav Shwartsman
e91409704f
Convert EFER to val32 register, similar to other control registers
2008-03-31 20:56:27 +00:00
Stanislav Shwartsman
a22160959b
HLT callback to Bochs internal debugger
2008-03-23 21:39:01 +00:00
Stanislav Shwartsman
167c7075fb
Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code
2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
a459a64f3e
whispace, tab2space, indent, dos2unix and other cleanups
2008-02-15 22:05:43 +00:00
Stanislav Shwartsman
cdcd7522aa
Added RIP to the GPR register file as lst register
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This allowed to optimize (read - remove) two more BxResolve methods in 64-bit mode
+ Some white space cleanup
2008-02-15 19:03:54 +00:00
Stanislav Shwartsman
8615022962
Added first stubs for XSAVE/XRESTOR implementation
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Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
8d7410a852
Canonical check have higher priority than #AC check
2008-02-11 20:52:10 +00:00
Stanislav Shwartsman
965568ea88
cleanups
2008-02-07 18:28:50 +00:00
Stanislav Shwartsman
a2897933a3
white space cleanup
2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
032b13047c
Minor fix in cpu reset, bug sometimes caused to run on garbage memory after software reset. Some small debug messages fixes
2008-02-01 13:25:23 +00:00
Stanislav Shwartsman
d18b90484f
Added instr callbacks for sysenter/sysexit/syscall/sysret
2008-01-18 08:57:35 +00:00
Stanislav Shwartsman
e287dcd91a
correctly implement CLFLUSH protection/paging checks + add instrumentation callback
2008-01-16 22:56:17 +00:00
Stanislav Shwartsman
d9984bb3a1
Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup !
2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
838fb2a048
Fixing V2008 warnings - they found a bug in sse_pfp.cc !
2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
5d4e32b8da
Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads
2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e
Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer
2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
46366b5064
Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions
2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
d9a59c7a1f
Added ability to merge traces cross JCC branch instructions
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Makes traces longer -> emulation faster in average
2007-12-14 20:41:09 +00:00
Stanislav Shwartsman
db69a25c36
Trace cache instrumentation methods
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Next step will be tracing cross non-taken branches
2007-12-14 11:27:44 +00:00
Stanislav Shwartsman
48d815427c
According to AMD docs INVLD/WBINVLD instructions not required to flush TLBs
2007-12-14 10:15:12 +00:00
Stanislav Shwartsman
85d10e4f72
Added MWAIT callback
2007-12-13 21:41:32 +00:00
Stanislav Shwartsman
91e0db63c4
no need to invalidate prefetch queue for RDMSR/WRMSR
2007-12-03 21:43:14 +00:00
Stanislav Shwartsman
c58e95f611
Make hw breakpoint match check a function - normally it should be called from read/write_virtual as well
2007-12-03 20:49:24 +00:00
Stanislav Shwartsman
8cfd17202a
some simple SSE code optimizations
2007-11-27 22:12:45 +00:00
Stanislav Shwartsman
48650a70b4
Optimized alignment check
2007-11-20 21:22:03 +00:00
Stanislav Shwartsman
e1496bb9e0
Small optimization
2007-11-18 18:40:38 +00:00
Stanislav Shwartsman
d9e58bd598
split11b on opcode tables level - split almost eevery splittable instruction
...
will be continued
2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
24e1936fbb
Fixed compilation warning when compiling with no x86-64
2007-11-09 12:06:34 +00:00
Stanislav Shwartsman
5a172541e2
Small cleanup
2007-11-01 20:43:53 +00:00
Stanislav Shwartsman
e137560b14
Complete MONITOR/MWAIT implemntation (including monitoring of memory range)
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Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
4ec7f5df39
Optimize access to IP (16 bit) - made IP register similar to GPR
2007-10-18 22:44:39 +00:00
Stanislav Shwartsman
082eb05b6b
First step to fully configurable CPUID
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- put CPUID functions data into array, in future we could load this array from configure file
- cpuid initialize function is more flexible now but still reuire some work
2007-10-12 19:30:51 +00:00
Stanislav Shwartsman
8adbbcf17c
Started first implementation of MONITOR/MWAIT
2007-10-11 21:29:01 +00:00
Stanislav Shwartsman
f6ed95785f
added cpu state param - for future use and for dbg info
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started to move debugger to info bx_param interface -> info sse and info mmx commands modified
2007-10-11 18:12:00 +00:00
Stanislav Shwartsman
82b7eaabd5
CLFLUSH do not fault when checking execute only segment
2007-10-10 21:48:46 +00:00
Stanislav Shwartsman
071c5c1a26
A lot of changes but everything is really trivial.
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Make save/restore default feature, the configure option for save/restore removed from configure script and save/restore made available forever. All code now assume it is exists. Bochs save/restore tree previosly called "save_restore" renamed to "bochs" tree and it will be havily used everywhere, starting from save/restore and ending by various bochs debugger functions. I am going to rework debugger code to get rid of debug CPU access functions and use this "bochs" param tree instead
2007-09-28 19:52:08 +00:00
Stanislav Shwartsman
e812f81e7b
Fixes in zero upper ECX
2007-09-25 16:11:32 +00:00
Stanislav Shwartsman
91e6ca8d5c
Implemented MTRR support
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Fixes in #PF exception priority
2007-09-20 17:33:35 +00:00
Stanislav Shwartsman
70f513b07b
Make efer control MSR separate register
2007-09-10 20:47:08 +00:00
Stanislav Shwartsman
895891b673
Implemented #AC check under configure option
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Fixes in misaligned SSE support
2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
38d1f39c77
Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation
2007-07-09 15:16:14 +00:00
Stanislav Shwartsman
7c6c2bb520
Removed PANIC message
2007-06-08 09:25:30 +00:00
Stanislav Shwartsman
65a99eb736
Change BX_ERROR to BX_DEBUG
2007-04-25 20:14:15 +00:00
Stanislav Shwartsman
6c139a9c8c
Define LIN and PHY address size in config.h
2007-04-14 10:05:30 +00:00
Stanislav Shwartsman
d3252fbc1c
Removed unneeded invalidate_prefetch_q from RDMSR instruction
2007-02-23 22:08:43 +00:00
Stanislav Shwartsman
c24627c00f
Implemented CLFLUSH instruction
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Set of minor fixes for correctness
2007-01-28 21:27:31 +00:00
Stanislav Shwartsman
6c63e84d23
Fixed CR3 masking in long mode
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Added PANIC assertion of 32-bit physical address in PAE mode
cleanup
2006-10-04 19:08:40 +00:00
Stanislav Shwartsman
02c2fc9e89
Fixed priveledge level checks
2006-09-10 16:56:55 +00:00
Stanislav Shwartsman
fdac9efa9b
Fixed ton of code duplication.
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Do not save/restore XMM8-XMM15 not in 64-bit mode
2006-08-31 18:18:17 +00:00
Stanislav Shwartsman
65082e4a4f
Handle granularity field for LDT
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Next step - fix code duplication with TSS
2006-08-25 19:56:03 +00:00
Stanislav Shwartsman
3ce7764fce
Fixes in 64-bit decoding
2006-08-11 17:23:36 +00:00
Stanislav Shwartsman
45353d5e6f
Fixed DR registers handling in x86-64 mode
2006-06-26 21:07:44 +00:00
Stanislav Shwartsman
9269288319
Fix SR macros mis-use. Need to add assertion into bxlist_c and check that it has no 2 params with same name inside !
2006-06-14 16:44:33 +00:00
Stanislav Shwartsman
49d7b4614f
Fixed another bug generator - duplication between descriptor type field and four descriptor cache bits
2006-06-12 16:58:27 +00:00