Clean invalidate_prefetch_q when not needed

This commit is contained in:
Stanislav Shwartsman 2008-08-23 13:55:37 +00:00
parent 9e9bc9aeeb
commit 991ae348cb
4 changed files with 37 additions and 39 deletions

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode.cc,v 1.202 2008-08-11 21:06:27 sshwarts Exp $
// $Id: fetchdecode.cc,v 1.203 2008-08-23 13:55:36 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -2865,6 +2865,24 @@ modrm_done:
return(0);
}
break;
case BxImmediate_BrOff8:
if (ilen < remain) {
i->modRMForm.Id = (Bit8s) (*iptr);
ilen++;
}
else {
return(0);
}
break;
case BxImmediate_BrOff16:
if ((ilen+1) < remain) {
i->modRMForm.Id = (Bit16s) FetchWORD(iptr);
ilen += 2;
}
else {
return(0);
}
break;
case BxImmediate_IbIb:
if (ilen < remain) {
i->IxIxForm.Ib = *iptr++;
@ -2939,24 +2957,6 @@ modrm_done:
else return(0);
}
break;
case BxImmediate_BrOff8:
if (ilen < remain) {
i->modRMForm.Id = (Bit8s) (*iptr);
ilen++;
}
else {
return(0);
}
break;
case BxImmediate_BrOff16:
if ((ilen+1) < remain) {
i->modRMForm.Id = (Bit16s) FetchWORD(iptr);
ilen += 2;
}
else {
return(0);
}
break;
default:
BX_INFO(("b1 was %x", b1));
BX_PANIC(("fetchdecode: imm_mode = %u", imm_mode));

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode64.cc,v 1.209 2008-08-11 18:53:23 sshwarts Exp $
// $Id: fetchdecode64.cc,v 1.210 2008-08-23 13:55:37 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -3788,6 +3788,15 @@ modrm_done:
return(0);
}
break;
case BxImmediate_BrOff8:
if (ilen < remain) {
i->modRMForm.Id = (Bit8s) (*iptr);
ilen++;
}
else {
return(0);
}
break;
case BxImmediate_IbIb:
if (ilen < remain) {
i->IxIxForm.Ib = *iptr++;
@ -3835,15 +3844,6 @@ modrm_done:
else return(0);
}
break;
case BxImmediate_BrOff8:
if (ilen < remain) {
i->modRMForm.Id = (Bit8s) (*iptr);
ilen++;
}
else {
return(0);
}
break;
default:
BX_INFO(("b1 was %x", b1));
BX_PANIC(("fetchdecode: imm_mode = %u", imm_mode));

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: paging.cc,v 1.155 2008-08-18 05:20:23 sshwarts Exp $
// $Id: paging.cc,v 1.156 2008-08-23 13:55:37 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -504,6 +504,8 @@ void BX_CPU_C::TLB_flush(void)
InstrTLB_Increment(tlbGlobalFlushes);
#endif
invalidate_prefetch_q();
for (unsigned n=0; n<BX_TLB_SIZE; n++) {
BX_CPU_THIS_PTR TLB.entry[n].lpf = BX_INVALID_TLB_ENTRY;
}
@ -527,6 +529,8 @@ void BX_CPU_C::TLB_flushNonGlobal(void)
InstrTLB_Increment(tlbNonGlobalFlushes);
#endif
invalidate_prefetch_q();
for (unsigned n=0; n<BX_TLB_SIZE; n++) {
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[n];
if (!(tlbEntry->accessBits & TLB_GlobalPage))
@ -548,6 +552,8 @@ void BX_CPU_C::TLB_flushNonGlobal(void)
void BX_CPU_C::TLB_invlpg(bx_address laddr)
{
invalidate_prefetch_q();
BX_DEBUG(("TLB_invlpg(0x"FMT_ADDRX"): invalidate TLB entry", laddr));
unsigned TLB_index = BX_TLB_INDEX_OF(laddr, 0);
@ -571,8 +577,6 @@ void BX_CPU_C::TLB_invlpg(bx_address laddr)
void BX_CPP_AttrRegparmN(1) BX_CPU_C::INVLPG(bxInstruction_c* i)
{
#if BX_CPU_LEVEL >= 4
invalidate_prefetch_q();
if (!real_mode() && CPL!=0) {
BX_ERROR(("INVLPG: priveledge check failed, generate #GP(0)"));
exception(BX_GP_EXCEPTION, 0, 0);

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: proc_ctrl.cc,v 1.254 2008-08-15 10:59:31 sshwarts Exp $
// $Id: proc_ctrl.cc,v 1.255 2008-08-23 13:55:37 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -573,8 +573,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CdRd(bxInstruction_c *i)
* reg field specifies which special register
*/
invalidate_prefetch_q();
/* This instruction is always treated as a register-to-register,
* regardless of the encoding of the MOD field in the MODRM byte.
*/
@ -682,8 +680,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CqRq(bxInstruction_c *i)
if (!i->modC0())
BX_PANIC(("MOV_CqRq(): rm field not a register!"));
invalidate_prefetch_q();
Bit64u val_64 = BX_READ_64BIT_REG(i->rm());
switch (i->nnn()) {
@ -799,8 +795,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LMSW_Ew(bxInstruction_c *i)
exception(BX_GP_EXCEPTION, 0, 0);
}
invalidate_prefetch_q();
if (i->modC0()) {
msw = BX_READ_16BIT_REG(i->rm());
}