- Fixed x86 data breakpoint match when breakpoint length is 8 bytes
- FIxed x86 data breakpoint in paging disabled mode
This commit is contained in:
Stanislav Shwartsman
parent
40bbae9b84
commit
b7480b3e6f
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: paging.cc,v 1.139 2008-05-30 16:58:47 sshwarts Exp $
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// $Id: paging.cc,v 1.140 2008-06-02 18:41:08 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1278,24 +1278,31 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr
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curr_pl, BX_WRITE, (Bit8u*) data);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
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bx_address lpf = LPFOf(laddr);
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// do not replace to the TLB if there is a breakpoint defined
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// in the same page
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#if BX_X86_DEBUGGER
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if (! hwbreakpoint_check(laddr))
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#endif
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{
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
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bx_address lpf = LPFOf(laddr);
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if (tlbEntry->lpf != lpf) {
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// We haven't seen this page, or it's been bumped before.
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if (tlbEntry->lpf != lpf) {
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// We haven't seen this page, or it's been bumped before.
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// Request a direct write pointer so we can do either R or W.
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bx_hostpageaddr_t hostPageAddr = (bx_hostpageaddr_t)
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BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_WRITE, DATA_ACCESS);
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// Request a direct write pointer so we can do either R or W.
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bx_hostpageaddr_t hostPageAddr = (bx_hostpageaddr_t)
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BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_WRITE, DATA_ACCESS);
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if (hostPageAddr) {
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tlbEntry->lpf = lpf;
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tlbEntry->ppf = (bx_phy_address) lpf;
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tlbEntry->hostPageAddr = hostPageAddr;
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// Got direct write pointer OK. Mark for any operation to succeed.
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tlbEntry->accessBits = (TLB_ReadSysOK | TLB_ReadUserOK | TLB_WriteSysOK | TLB_WriteUserOK |
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if (hostPageAddr) {
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tlbEntry->lpf = lpf;
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tlbEntry->ppf = (bx_phy_address) lpf;
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tlbEntry->hostPageAddr = hostPageAddr;
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// Got direct write pointer OK. Mark for any operation to succeed.
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tlbEntry->accessBits = (TLB_ReadSysOK | TLB_ReadUserOK | TLB_WriteSysOK | TLB_WriteUserOK |
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TLB_ReadSysPtrOK | TLB_ReadUserPtrOK | TLB_WriteSysPtrOK | TLB_WriteUserPtrOK);
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}
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}
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}
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#endif
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@ -1442,36 +1449,43 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, (bx_phy_address) laddr, len, xlate_rw);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
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bx_address lpf = LPFOf(laddr);
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// do not replace to the TLB if there is a breakpoint defined
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// in the same page
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#if BX_X86_DEBUGGER
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if (! hwbreakpoint_check(laddr))
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#endif
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{
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
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bx_address lpf = LPFOf(laddr);
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if (tlbEntry->lpf != lpf) {
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// We haven't seen this page, or it's been bumped before.
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if (tlbEntry->lpf != lpf) {
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// We haven't seen this page, or it's been bumped before.
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// Request a direct write pointer so we can do either R or W.
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bx_hostpageaddr_t hostPageAddr = (bx_hostpageaddr_t)
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BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_WRITE, DATA_ACCESS);
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if (hostPageAddr) {
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tlbEntry->lpf = lpf;
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tlbEntry->ppf = (bx_phy_address) lpf;
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tlbEntry->hostPageAddr = hostPageAddr;
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// Got direct write pointer OK. Mark for any operation to succeed.
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tlbEntry->accessBits = (TLB_ReadSysOK | TLB_ReadUserOK | TLB_WriteSysOK | TLB_WriteUserOK |
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TLB_ReadSysPtrOK | TLB_ReadUserPtrOK | TLB_WriteSysPtrOK | TLB_WriteUserPtrOK);
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}
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else {
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// Direct write vetoed. Try requesting only direct reads.
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hostPageAddr = (bx_hostpageaddr_t) BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
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A20ADDR(lpf), BX_READ, DATA_ACCESS);
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// Request a direct write pointer so we can do either R or W.
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bx_hostpageaddr_t hostPageAddr = (bx_hostpageaddr_t)
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BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_WRITE, DATA_ACCESS);
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if (hostPageAddr) {
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tlbEntry->lpf = lpf;
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tlbEntry->ppf = (bx_phy_address) lpf;
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tlbEntry->hostPageAddr = hostPageAddr;
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// Got direct write pointer OK. Mark for any operation to succeed.
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tlbEntry->accessBits = (TLB_ReadSysOK | TLB_ReadUserOK | TLB_ReadSysPtrOK | TLB_ReadUserPtrOK);
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tlbEntry->accessBits = (TLB_ReadSysOK | TLB_ReadUserOK | TLB_WriteSysOK | TLB_WriteUserOK |
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TLB_ReadSysPtrOK | TLB_ReadUserPtrOK | TLB_WriteSysPtrOK | TLB_WriteUserPtrOK);
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}
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else {
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// Direct write vetoed. Try requesting only direct reads.
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hostPageAddr = (bx_hostpageaddr_t) BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
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A20ADDR(lpf), BX_READ, DATA_ACCESS);
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if (hostPageAddr) {
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tlbEntry->lpf = lpf;
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tlbEntry->ppf = (bx_phy_address) lpf;
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tlbEntry->hostPageAddr = hostPageAddr;
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// Got direct write pointer OK. Mark for any operation to succeed.
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tlbEntry->accessBits = (TLB_ReadSysOK | TLB_ReadUserOK | TLB_ReadSysPtrOK | TLB_ReadUserPtrOK);
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}
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}
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}
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}
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: proc_ctrl.cc,v 1.236 2008-05-31 21:17:02 sshwarts Exp $
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// $Id: proc_ctrl.cc,v 1.237 2008-06-02 18:41:08 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -2524,88 +2524,56 @@ Bit32u BX_CPU_C::hwdebug_compare(bx_address laddr_0, unsigned size,
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// Support x86 hardware debug facilities (DR0..DR7)
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Bit32u dr7 = BX_CPU_THIS_PTR dr7;
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bx_bool ibpoint_found = 0;
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bx_address laddr_n = laddr_0 + (size - 1);
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static bx_address alignment_mask[4] =
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// 00b=1 01b=2 10b=undef(8) 11b=4
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{ 0x0, 0x1, 0x7, 0x3 };
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Bit32u len0 = (dr7>>18) & 3;
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Bit32u len1 = (dr7>>22) & 3;
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Bit32u len2 = (dr7>>26) & 3;
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Bit32u len3 = (dr7>>30) & 3;
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bx_address laddr_n = laddr_0 + (size - 1);
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bx_address dr[4], dr_n[4];
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Bit32u dr_op[4], len[4];
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bx_bool ibpoint_found_n[4], ibpoint_found = 0;
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bx_address dr0 = (BX_CPU_THIS_PTR dr[0]) & ~(alignment_mask[len0]);
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bx_address dr1 = (BX_CPU_THIS_PTR dr[1]) & ~(alignment_mask[len1]);
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bx_address dr2 = (BX_CPU_THIS_PTR dr[2]) & ~(alignment_mask[len2]);
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bx_address dr3 = (BX_CPU_THIS_PTR dr[3]) & ~(alignment_mask[len3]);
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len[0] = (dr7>>18) & 3;
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len[1] = (dr7>>22) & 3;
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len[2] = (dr7>>26) & 3;
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len[3] = (dr7>>30) & 3;
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bx_address dr0_n = dr0 + len0;
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bx_address dr1_n = dr1 + len1;
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bx_address dr2_n = dr2 + len2;
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bx_address dr3_n = dr3 + len3;
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dr_op[0] = (dr7>>16) & 3;
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dr_op[1] = (dr7>>20) & 3;
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dr_op[2] = (dr7>>24) & 3;
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dr_op[3] = (dr7>>28) & 3;
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Bit32u dr0_op = (dr7>>16) & 3;
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Bit32u dr1_op = (dr7>>20) & 3;
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Bit32u dr2_op = (dr7>>24) & 3;
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Bit32u dr3_op = (dr7>>28) & 3;
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for (unsigned i=0;i<4;i++) {
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dr[i] = BX_CPU_THIS_PTR dr[i] & ~alignment_mask[len[i]];
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dr_n[i] = dr[i] + alignment_mask[len[i]];
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ibpoint_found_n[i] = 0;
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// See if this instruction address matches any breakpoints
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if ((dr7 & 0x00000003)) {
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if ((dr0_op==opa || dr0_op==opb) &&
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(laddr_0 <= dr0_n) &&
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(laddr_n >= dr0))
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ibpoint_found = 1;
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}
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if ((dr7 & 0x0000000c)) {
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if ((dr1_op==opa || dr1_op==opb) &&
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(laddr_0 <= dr1_n) &&
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(laddr_n >= dr1))
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ibpoint_found = 1;
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}
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if ((dr7 & 0x00000030)) {
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if ((dr2_op==opa || dr2_op==opb) &&
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(laddr_0 <= dr2_n) &&
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(laddr_n >= dr2))
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ibpoint_found = 1;
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}
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if ((dr7 & 0x000000c0)) {
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if ((dr3_op==opa || dr3_op==opb) &&
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(laddr_0 <= dr3_n) &&
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(laddr_n >= dr3))
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ibpoint_found = 1;
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// See if this instruction address matches any breakpoints
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if (dr7 & (3 << i*2)) {
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if ((dr_op[i]==opa || dr_op[i]==opb) &&
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(laddr_0 <= dr_n[i]) &&
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(laddr_n >= dr[i])) {
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ibpoint_found_n[i] = 1;
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ibpoint_found = 1;
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}
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}
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}
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// If *any* enabled breakpoints matched, then we need to
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// set status bits for *all* breakpoints, even disabled ones,
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// as long as they meet the other breakpoint criteria.
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// This code is similar to that above, only without the
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// breakpoint enabled check. Seems weird to duplicate effort,
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// but its more efficient to do it this way.
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// dr6_mask is the return value. These bits represent the bits
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// to be OR'd into DR6 as a result of the debug event.
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Bit32u dr6_mask = 0;
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if (ibpoint_found) {
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// dr6_mask is the return value. These bits represent the bits to
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// be OR'd into DR6 as a result of the debug event.
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Bit32u dr6_mask=0;
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if ((dr0_op==opa || dr0_op==opb) &&
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(laddr_0 <= dr0_n) &&
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(laddr_n >= dr0))
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dr6_mask |= 0x01;
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if ((dr1_op==opa || dr1_op==opb) &&
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(laddr_0 <= dr1_n) &&
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(laddr_n >= dr1))
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dr6_mask |= 0x02;
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if ((dr2_op==opa || dr2_op==opb) &&
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(laddr_0 <= dr2_n) &&
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(laddr_n >= dr2))
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dr6_mask |= 0x04;
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if ((dr3_op==opa || dr3_op==opb) &&
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(laddr_0 <= dr3_n) &&
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(laddr_n >= dr3))
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dr6_mask |= 0x08;
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return(dr6_mask);
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if (ibpoint_found_n[0]) dr6_mask |= 0x1;
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if (ibpoint_found_n[1]) dr6_mask |= 0x2;
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if (ibpoint_found_n[2]) dr6_mask |= 0x4;
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if (ibpoint_found_n[3]) dr6_mask |= 0x8;
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}
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return(0);
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return dr6_mask;
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}
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#endif
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