Small cleanup
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: arith16.cc,v 1.45 2007-10-21 22:07:32 sshwarts Exp $
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// $Id: arith16.cc,v 1.46 2007-11-01 20:43:52 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -480,20 +480,20 @@ void BX_CPU_C::CMP_EwIw(bxInstruction_c *i)
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void BX_CPU_C::NEG_Ew(bxInstruction_c *i)
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{
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Bit16u op1_16, diff_16;
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Bit16u op1_16;
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if (i->modC0()) {
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op1_16 = BX_READ_16BIT_REG(i->rm());
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diff_16 = -op1_16;
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BX_WRITE_16BIT_REG(i->rm(), diff_16);
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op1_16 = -op1_16;
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BX_WRITE_16BIT_REG(i->rm(), op1_16);
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}
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else {
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read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
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diff_16 = -op1_16;
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write_RMW_virtual_word(diff_16);
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op1_16 = -op1_16;
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write_RMW_virtual_word(op1_16);
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}
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SET_FLAGS_OSZAPC_RESULT_16(diff_16, BX_INSTR_NEG16);
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SET_FLAGS_OSZAPC_RESULT_16(op1_16, BX_INSTR_NEG16);
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}
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void BX_CPU_C::INC_Ew(bxInstruction_c *i)
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: arith32.cc,v 1.52 2007-10-21 23:35:11 sshwarts Exp $
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// $Id: arith32.cc,v 1.53 2007-11-01 20:43:52 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -571,12 +571,12 @@ void BX_CPU_C::DEC_Ed(bxInstruction_c *i)
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op1_32 = BX_READ_32BIT_REG(i->rm());
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op1_32--;
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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}
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}
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else {
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read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
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op1_32--;
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write_RMW_virtual_dword(op1_32);
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}
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}
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SET_FLAGS_OSZAP_RESULT_32(op1_32, BX_INSTR_DEC32);
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}
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.cc,v 1.178 2007-11-01 18:03:48 sshwarts Exp $
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// $Id: cpu.cc,v 1.179 2007-11-01 20:43:52 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -452,7 +452,7 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
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// interrupt ends the HALT condition
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#if BX_SUPPORT_MONITOR_MWAIT
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if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT)
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BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
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BX_CPU_THIS_PTR mem->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
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#endif
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BX_CPU_THIS_PTR debug_trap = 0; // clear traps for after resume
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BX_CPU_THIS_PTR inhibit_mask = 0; // clear inhibits for after resume
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@ -475,7 +475,7 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
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// interrupt ends the HALT condition
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#if BX_SUPPORT_MONITOR_MWAIT
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if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT)
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BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
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BX_CPU_THIS_PTR mem->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
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#endif
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BX_CPU_THIS_PTR debug_trap = 0; // clear traps for after resume
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BX_CPU_THIS_PTR inhibit_mask = 0; // clear inhibits for after resume
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: proc_ctrl.cc,v 1.177 2007-11-01 18:03:48 sshwarts Exp $
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// $Id: proc_ctrl.cc,v 1.178 2007-11-01 20:43:53 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1904,7 +1904,7 @@ void BX_CPU_C::check_monitor(bx_phy_address begin_addr, unsigned len)
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BX_ASSERT(BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT);
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BX_CPU_THIS_PTR debug_trap &= ~BX_DEBUG_TRAP_SPECIAL;
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// clear monitor
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BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
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BX_CPU_THIS_PTR mem->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
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}
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}
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#endif
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@ -1985,7 +1985,7 @@ void BX_CPU_C::MWAIT(bxInstruction_c *i)
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if ((BX_CPU_THIS_PTR monitor.monitor_end & ~0xfff) != (BX_CPU_THIS_PTR monitor.monitor_begin & ~0xfff))
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bx_pc_system.invlpg(BX_CPU_THIS_PTR monitor.monitor_end);
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BX_DEBUG(("MWAIT for phys_addr=%08x", BX_CPU_THIS_PTR monitor.monitor_begin));
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BX_MEM(0)->set_monitor(BX_CPU_THIS_PTR bx_cpuid);
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BX_CPU_THIS_PTR mem->set_monitor(BX_CPU_THIS_PTR bx_cpuid);
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// stops instruction execution and places the processor in a optimized
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// state. Events that cause exit from MWAIT state are:
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