diff --git a/bochs/cpu/arith16.cc b/bochs/cpu/arith16.cc
index 016eb2d1f..265082aaf 100644
--- a/bochs/cpu/arith16.cc
+++ b/bochs/cpu/arith16.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: arith16.cc,v 1.45 2007-10-21 22:07:32 sshwarts Exp $
+// $Id: arith16.cc,v 1.46 2007-11-01 20:43:52 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -480,20 +480,20 @@ void BX_CPU_C::CMP_EwIw(bxInstruction_c *i)
 
 void BX_CPU_C::NEG_Ew(bxInstruction_c *i)
 {
-  Bit16u op1_16, diff_16;
+  Bit16u op1_16;
 
   if (i->modC0()) {
     op1_16 = BX_READ_16BIT_REG(i->rm());
-    diff_16 = -op1_16;
-    BX_WRITE_16BIT_REG(i->rm(), diff_16);
+    op1_16 = -op1_16;
+    BX_WRITE_16BIT_REG(i->rm(), op1_16);
   }
   else {
     read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
-    diff_16 = -op1_16;
-    write_RMW_virtual_word(diff_16);
+    op1_16 = -op1_16;
+    write_RMW_virtual_word(op1_16);
   }
 
-  SET_FLAGS_OSZAPC_RESULT_16(diff_16, BX_INSTR_NEG16);
+  SET_FLAGS_OSZAPC_RESULT_16(op1_16, BX_INSTR_NEG16);
 }
 
 void BX_CPU_C::INC_Ew(bxInstruction_c *i)
diff --git a/bochs/cpu/arith32.cc b/bochs/cpu/arith32.cc
index aff58fdc5..0cd81f8b1 100644
--- a/bochs/cpu/arith32.cc
+++ b/bochs/cpu/arith32.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: arith32.cc,v 1.52 2007-10-21 23:35:11 sshwarts Exp $
+// $Id: arith32.cc,v 1.53 2007-11-01 20:43:52 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -571,12 +571,12 @@ void BX_CPU_C::DEC_Ed(bxInstruction_c *i)
     op1_32 = BX_READ_32BIT_REG(i->rm());
     op1_32--;
     BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
-    }
+  }
   else {
     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
     op1_32--;
     write_RMW_virtual_dword(op1_32);
-    }
+  }
 
   SET_FLAGS_OSZAP_RESULT_32(op1_32, BX_INSTR_DEC32);
 }
diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc
index 4f3ba2155..a51526513 100644
--- a/bochs/cpu/cpu.cc
+++ b/bochs/cpu/cpu.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.cc,v 1.178 2007-11-01 18:03:48 sshwarts Exp $
+// $Id: cpu.cc,v 1.179 2007-11-01 20:43:52 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -452,7 +452,7 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
         // interrupt ends the HALT condition
 #if BX_SUPPORT_MONITOR_MWAIT
         if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT)
-          BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
+          BX_CPU_THIS_PTR mem->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
 #endif
         BX_CPU_THIS_PTR debug_trap = 0; // clear traps for after resume
         BX_CPU_THIS_PTR inhibit_mask = 0; // clear inhibits for after resume
@@ -475,7 +475,7 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
       // interrupt ends the HALT condition
 #if BX_SUPPORT_MONITOR_MWAIT
       if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT)
-        BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
+        BX_CPU_THIS_PTR mem->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
 #endif
       BX_CPU_THIS_PTR debug_trap = 0; // clear traps for after resume
       BX_CPU_THIS_PTR inhibit_mask = 0; // clear inhibits for after resume
diff --git a/bochs/cpu/proc_ctrl.cc b/bochs/cpu/proc_ctrl.cc
index 53b4ee2eb..4174aac34 100644
--- a/bochs/cpu/proc_ctrl.cc
+++ b/bochs/cpu/proc_ctrl.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: proc_ctrl.cc,v 1.177 2007-11-01 18:03:48 sshwarts Exp $
+// $Id: proc_ctrl.cc,v 1.178 2007-11-01 20:43:53 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -1904,7 +1904,7 @@ void BX_CPU_C::check_monitor(bx_phy_address begin_addr, unsigned len)
     BX_ASSERT(BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT);
     BX_CPU_THIS_PTR debug_trap &= ~BX_DEBUG_TRAP_SPECIAL;
     // clear monitor
-    BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
+    BX_CPU_THIS_PTR mem->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
  }
 }
 #endif
@@ -1985,7 +1985,7 @@ void BX_CPU_C::MWAIT(bxInstruction_c *i)
   if ((BX_CPU_THIS_PTR monitor.monitor_end & ~0xfff) != (BX_CPU_THIS_PTR monitor.monitor_begin & ~0xfff))
     bx_pc_system.invlpg(BX_CPU_THIS_PTR monitor.monitor_end);
   BX_DEBUG(("MWAIT for phys_addr=%08x", BX_CPU_THIS_PTR monitor.monitor_begin));
-  BX_MEM(0)->set_monitor(BX_CPU_THIS_PTR bx_cpuid);
+  BX_CPU_THIS_PTR mem->set_monitor(BX_CPU_THIS_PTR bx_cpuid);
 
   // stops instruction execution and places the processor in a optimized
   // state.  Events that cause exit from MWAIT state are: