Small optimization in memory access functions

This commit is contained in:
Stanislav Shwartsman 2008-05-03 17:33:30 +00:00
parent 001ad1c736
commit 50c9674d2e
5 changed files with 46 additions and 48 deletions

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: access.cc,v 1.102 2008-05-01 05:11:19 sshwarts Exp $
// $Id: access.cc,v 1.103 2008-05-03 17:33:30 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -55,7 +55,7 @@ BX_CPU_C::write_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigne
exception(int_number(seg), 0, 0);
}
// Mark cache as being OK type for succeeding reads/writes
seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccess4G;
seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccessROK4G | SegAccessWOK4G;
return;
}
#endif
@ -98,7 +98,7 @@ BX_CPU_C::write_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigne
seg->cache.valid |= SegAccessROK | SegAccessWOK;
if (seg->cache.u.segment.limit_scaled == 0xffffffff)
seg->cache.valid |= SegAccess4G;
seg->cache.valid |= SegAccessROK4G | SegAccessWOK4G;;
}
break;
@ -114,7 +114,7 @@ BX_CPU_C::write_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigne
exception(int_number(seg), 0, 0);
}
if (seg->cache.u.segment.limit_scaled == 0)
seg->cache.valid |= SegAccess4G | SegAccessROK | SegAccessWOK;
seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccessROK4G | SegAccessWOK4G;
break;
}
@ -138,7 +138,7 @@ BX_CPU_C::write_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigne
seg->cache.valid |= SegAccessROK | SegAccessWOK;
if (seg->cache.u.segment.limit_scaled == 0xffffffff)
seg->cache.valid |= SegAccess4G;
seg->cache.valid |= SegAccessROK4G | SegAccessWOK4G;
}
}
}
@ -156,7 +156,7 @@ BX_CPU_C::read_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned
exception(int_number(seg), 0, 0);
}
// Mark cache as being OK type for succeeding reads/writes
seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccess4G;
seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccessROK4G | SegAccessWOK4G;
return;
}
#endif
@ -187,7 +187,7 @@ BX_CPU_C::read_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned
// write checks; similar code.
seg->cache.valid |= SegAccessROK;
if (seg->cache.u.segment.limit_scaled == 0xffffffff)
seg->cache.valid |= SegAccess4G;
seg->cache.valid |= SegAccessROK4G;
}
break;
@ -204,7 +204,7 @@ BX_CPU_C::read_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned
exception(int_number(seg), 0, 0);
}
if (seg->cache.u.segment.limit_scaled == 0)
seg->cache.valid |= SegAccess4G | SegAccessROK;
seg->cache.valid |= SegAccessROK | SegAccessROK4G;
break;
case 8: case 9: /* execute only */
@ -233,7 +233,7 @@ BX_CPU_C::read_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned
seg->cache.valid |= SegAccessROK | SegAccessWOK;
if (seg->cache.u.segment.limit_scaled == 0xffffffff)
seg->cache.valid |= SegAccess4G;
seg->cache.valid |= SegAccessROK4G | SegAccessWOK4G;
}
}
}
@ -251,7 +251,7 @@ BX_CPU_C::execute_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsig
exception(int_number(seg), 0, 0);
}
// Mark cache as being OK type for succeeding reads/writes
seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccess4G;
seg->cache.valid |= SegAccessROK | SegAccessWOK | SegAccessROK4G | SegAccessWOK4G;
return;
}
#endif
@ -282,7 +282,7 @@ BX_CPU_C::execute_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsig
// write checks; similar code.
seg->cache.valid |= SegAccessROK;
if (seg->cache.u.segment.limit_scaled == 0xffffffff)
seg->cache.valid |= SegAccess4G;
seg->cache.valid |= SegAccessROK4G;
}
break;
@ -309,7 +309,7 @@ BX_CPU_C::execute_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsig
exception(int_number(seg), 0, 0);
}
if (seg->cache.u.segment.limit_scaled == 0)
seg->cache.valid |= SegAccess4G | SegAccessROK;
seg->cache.valid |= SegAccessROK | SegAccessROK4G;
break;
}
return;
@ -332,7 +332,7 @@ BX_CPU_C::execute_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsig
seg->cache.valid |= SegAccessROK | SegAccessWOK;
if (seg->cache.u.segment.limit_scaled == 0xffffffff)
seg->cache.valid |= SegAccess4G;
seg->cache.valid |= SegAccessROK4G | SegAccessWOK4G;
}
}
}
@ -471,7 +471,7 @@ BX_CPU_C::write_virtual_byte(unsigned s, bx_address offset, Bit8u data)
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_WRITE);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -521,7 +521,7 @@ BX_CPU_C::write_virtual_word(unsigned s, bx_address offset, Bit16u data)
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_WRITE);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -579,7 +579,7 @@ BX_CPU_C::write_virtual_dword(unsigned s, bx_address offset, Bit32u data)
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_WRITE);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -637,7 +637,7 @@ BX_CPU_C::write_virtual_qword(unsigned s, bx_address offset, Bit64u data)
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_WRITE);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -696,7 +696,7 @@ BX_CPU_C::read_virtual_byte(unsigned s, bx_address offset)
Bit8u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_READ);
if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
if (seg->cache.valid & SegAccessROK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -744,7 +744,7 @@ BX_CPU_C::read_virtual_word(unsigned s, bx_address offset)
Bit16u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_READ);
if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
if (seg->cache.valid & SegAccessROK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -800,7 +800,7 @@ BX_CPU_C::read_virtual_dword(unsigned s, bx_address offset)
Bit32u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_READ);
if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
if (seg->cache.valid & SegAccessROK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -856,7 +856,7 @@ BX_CPU_C::read_virtual_qword(unsigned s, bx_address offset)
Bit64u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_READ);
if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
if (seg->cache.valid & SegAccessROK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -917,7 +917,7 @@ BX_CPU_C::read_RMW_virtual_byte(unsigned s, bx_address offset)
Bit8u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_RW);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -971,7 +971,7 @@ BX_CPU_C::read_RMW_virtual_word(unsigned s, bx_address offset)
Bit16u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_RW);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -1031,7 +1031,7 @@ BX_CPU_C::read_RMW_virtual_dword(unsigned s, bx_address offset)
Bit32u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_RW);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -1091,7 +1091,7 @@ BX_CPU_C::read_RMW_virtual_qword(unsigned s, bx_address offset)
Bit64u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_RW);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
#if BX_SupportGuest2HostTLB
@ -1411,7 +1411,7 @@ void BX_CPU_C::write_new_stack_word(bx_segment_reg_t *seg, bx_address offset, un
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = (Bit32u)(seg->cache.u.segment.base + offset);
#if BX_SupportGuest2HostTLB
@ -1463,7 +1463,7 @@ void BX_CPU_C::write_new_stack_dword(bx_segment_reg_t *seg, bx_address offset, u
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
if (seg->cache.valid & SegAccessWOK4G) {
accessOK:
laddr = (Bit32u)(seg->cache.u.segment.base + offset);
#if BX_SupportGuest2HostTLB

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: descriptor.h,v 1.21 2007-12-10 19:08:13 sshwarts Exp $
// $Id: descriptor.h,v 1.22 2008-05-03 17:33:30 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2007 Stanislav Shwartsman
@ -40,13 +40,11 @@ typedef struct { /* bx_selector_t */
typedef struct
{
#define SegValidCache (0x1)
#define SegAccessROK (0x2)
#define SegAccessWOK (0x4)
#define SegAccess4G (0x8)
#define SegAccessROK4G (SegAccessROK|SegAccess4G)
#define SegAccessWOK4G (SegAccessWOK|SegAccess4G)
#define SegValidCache (0x01)
#define SegAccessROK (0x02)
#define SegAccessWOK (0x04)
#define SegAccessROK4G (0x08)
#define SegAccessWOK4G (0x10)
unsigned valid; // Holds above values, Or'd together. Used to
// hold only 0 or 1.

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: io.cc,v 1.58 2008-04-27 19:49:02 sshwarts Exp $
// $Id: io.cc,v 1.59 2008-05-03 17:33:30 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -54,7 +54,7 @@ Bit32u BX_CPU_C::FastRepINSW(bxInstruction_c *i, bx_address dstOff, Bit16u port,
unsigned count;
bx_segment_reg_t *dstSegPtr = &BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES];
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
if (!(dstSegPtr->cache.valid & SegAccessWOK4G))
return 0;
bx_address laddrDst = BX_CPU_THIS_PTR get_laddr(BX_SEG_REG_ES, dstOff);
@ -138,7 +138,7 @@ Bit32u BX_CPU_C::FastRepOUTSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
unsigned count;
bx_segment_reg_t *srcSegPtr = &BX_CPU_THIS_PTR sregs[srcSeg];
if ((srcSegPtr->cache.valid & SegAccessROK4G) != SegAccessROK4G)
if (!(srcSegPtr->cache.valid & SegAccessROK4G))
return 0;
bx_address laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: proc_ctrl.cc,v 1.222 2008-04-28 18:18:08 sshwarts Exp $
// $Id: proc_ctrl.cc,v 1.223 2008-05-03 17:33:30 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -191,7 +191,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CLFLUSH(bxInstruction_c *i)
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
// check if we could access the memory segment
if ((seg->cache.valid & SegAccessROK4G) != SegAccessROK4G)
if (!(seg->cache.valid & SegAccessROK4G))
{
execute_virtual_checks(seg, RMAddr(i), 1);
}

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: string.cc,v 1.58 2008-04-27 19:49:02 sshwarts Exp $
// $Id: string.cc,v 1.59 2008-05-03 17:33:30 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -50,11 +50,11 @@ Bit32u BX_CPU_C::FastRepMOVSB(bxInstruction_c *i, unsigned srcSeg, bx_address sr
Bit8u *hostAddrSrc, *hostAddrDst;
bx_segment_reg_t *srcSegPtr = &BX_CPU_THIS_PTR sregs[srcSeg];
if ((srcSegPtr->cache.valid & SegAccessROK4G) != SegAccessROK4G)
if (!(srcSegPtr->cache.valid & SegAccessROK4G))
return 0;
bx_segment_reg_t *dstSegPtr = &BX_CPU_THIS_PTR sregs[dstSeg];
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
if (!(dstSegPtr->cache.valid & SegAccessWOK4G))
return 0;
laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);
@ -145,11 +145,11 @@ Bit32u BX_CPU_C::FastRepMOVSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
Bit8u *hostAddrSrc, *hostAddrDst;
bx_segment_reg_t *srcSegPtr = &BX_CPU_THIS_PTR sregs[srcSeg];
if ((srcSegPtr->cache.valid & SegAccessROK4G) != SegAccessROK4G)
if (!(srcSegPtr->cache.valid & SegAccessROK4G))
return 0;
bx_segment_reg_t *dstSegPtr = &BX_CPU_THIS_PTR sregs[dstSeg];
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
if (!(dstSegPtr->cache.valid & SegAccessWOK4G))
return 0;
laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);
@ -243,11 +243,11 @@ Bit32u BX_CPU_C::FastRepMOVSD(bxInstruction_c *i, unsigned srcSeg, bx_address sr
Bit8u *hostAddrSrc, *hostAddrDst;
bx_segment_reg_t *srcSegPtr = &BX_CPU_THIS_PTR sregs[srcSeg];
if ((srcSegPtr->cache.valid & SegAccessROK4G) != SegAccessROK4G)
if (!(srcSegPtr->cache.valid & SegAccessROK4G))
return 0;
bx_segment_reg_t *dstSegPtr = &BX_CPU_THIS_PTR sregs[dstSeg];
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
if (!(dstSegPtr->cache.valid & SegAccessWOK4G))
return 0;
laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);
@ -473,7 +473,7 @@ Bit32u BX_CPU_C::FastRepSTOSD(bxInstruction_c *i, unsigned dstSeg, bx_address ds
Bit8u *hostAddrDst;
bx_segment_reg_t *dstSegPtr = &BX_CPU_THIS_PTR sregs[dstSeg];
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
if (!(dstSegPtr->cache.valid & SegAccessWOK4G))
return 0;
laddrDst = BX_CPU_THIS_PTR get_laddr(dstSeg, dstOff);