Fixed linear address wrap in legacy (not long64) mode
This commit is contained in:
parent
fe59e0ae6a
commit
fea49bb270
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: dbg_main.cc,v 1.122 2008-04-05 21:41:31 sshwarts Exp $
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// $Id: dbg_main.cc,v 1.123 2008-04-07 18:39:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -206,7 +206,7 @@ int bx_dbg_main(void)
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BX_CPU(i)->guard_found.cs = BX_CPU(i)->sregs[BX_SEG_REG_CS].selector.value;
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BX_CPU(i)->guard_found.eip = BX_CPU(i)->prev_rip;
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BX_CPU(i)->guard_found.laddr =
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(BX_CPU(i)->get_segment_base(BX_SEG_REG_CS) + BX_CPU(i)->prev_rip);
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BX_CPU(i)->get_laddr(BX_SEG_REG_CS, BX_CPU(i)->prev_rip);
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BX_CPU(i)->guard_found.is_32bit_code =
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(BX_CPU(i)->sregs[BX_SEG_REG_CS].cache.u.segment.d_b);
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BX_CPU(i)->guard_found.is_64bit_code =
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@ -3320,6 +3320,8 @@ bx_address bx_dbg_get_instruction_pointer(void)
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Bit32u bx_dbg_get_laddr(Bit16u sel, Bit32u ofs)
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{
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Bit32u laddr;
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if (BX_CPU(dbg_cpu)->protected_mode()) {
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bx_descriptor_t descriptor;
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bx_selector_t selector;
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@ -3386,11 +3388,13 @@ Bit32u bx_dbg_get_laddr(Bit16u sel, Bit32u ofs)
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ofs, sel, lowaddr, highaddr);
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}
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return descriptor.u.segment.base + ofs;
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laddr = descriptor.u.segment.base + ofs;
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}
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else {
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return sel * 16 + ofs;
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laddr = sel * 16 + ofs;
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}
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return laddr;
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}
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void bx_dbg_step_over_command()
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: access.cc,v 1.95 2008-04-05 17:51:53 sshwarts Exp $
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// $Id: access.cc,v 1.96 2008-04-07 18:39:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -451,7 +451,7 @@ BX_CPU_C::write_virtual_byte(unsigned s, bx_address offset, Bit8u data)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_WRITE);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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@ -499,7 +499,7 @@ BX_CPU_C::write_virtual_word(unsigned s, bx_address offset, Bit16u data)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 2, BX_WRITE);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
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@ -555,7 +555,7 @@ BX_CPU_C::write_virtual_dword(unsigned s, bx_address offset, Bit32u data)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 4, BX_WRITE);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
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@ -611,7 +611,7 @@ BX_CPU_C::write_virtual_qword(unsigned s, bx_address offset, Bit64u data)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 8, BX_WRITE);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
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@ -668,7 +668,7 @@ BX_CPU_C::read_virtual_byte(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_READ);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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@ -714,7 +714,7 @@ BX_CPU_C::read_virtual_word(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 2, BX_READ);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
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@ -768,7 +768,7 @@ BX_CPU_C::read_virtual_dword(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 4, BX_READ);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
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@ -822,7 +822,7 @@ BX_CPU_C::read_virtual_qword(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessROK4G) == SegAccessROK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 8, BX_READ);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
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@ -881,7 +881,7 @@ BX_CPU_C::read_RMW_virtual_byte(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_RW);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
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@ -933,7 +933,7 @@ BX_CPU_C::read_RMW_virtual_word(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 2, BX_RW);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
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@ -991,7 +991,7 @@ BX_CPU_C::read_RMW_virtual_dword(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 4, BX_RW);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
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@ -1049,7 +1049,7 @@ BX_CPU_C::read_RMW_virtual_qword(unsigned s, bx_address offset)
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 8, BX_RW);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
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@ -1251,7 +1251,7 @@ BX_CPU_C::read_virtual_dqword(unsigned s, bx_address offset, Bit8u *data)
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BX_CPU_C::read_virtual_dqword_aligned(unsigned s, bx_address offset, Bit8u *data)
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{
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// If double quadword access is unaligned, #GP(0).
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bx_address laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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bx_address laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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if (laddr & 0xf) {
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BX_DEBUG(("read_virtual_dqword_aligned: access not aligned to 16-byte"));
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exception(BX_GP_EXCEPTION, 0, 0);
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@ -1274,7 +1274,7 @@ BX_CPU_C::write_virtual_dqword(unsigned s, bx_address offset, Bit8u *data)
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BX_CPU_C::write_virtual_dqword_aligned(unsigned s, bx_address offset, Bit8u *data)
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{
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// If double quadword access is unaligned, #GP(0).
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bx_address laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
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bx_address laddr = BX_CPU_THIS_PTR get_laddr(s, offset);
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if (laddr & 0xf) {
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BX_DEBUG(("write_virtual_dqword_aligned: access not aligned to 16-byte"));
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exception(BX_GP_EXCEPTION, 0, 0);
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@ -1311,13 +1311,13 @@ BX_CPU_C::write_virtual_tword(unsigned s, bx_address offset, floatx80 *data)
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// assuming the write happens in legacy mode
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void BX_CPU_C::write_new_stack_word(bx_segment_reg_t *seg, bx_address offset, unsigned curr_pl, Bit16u data)
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{
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bx_address laddr;
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Bit32u laddr;
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BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = seg->cache.u.segment.base + offset;
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laddr = (Bit32u)(seg->cache.u.segment.base + offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 2, BX_WRITE);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
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@ -1362,13 +1362,13 @@ accessOK:
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// assuming the write happens in legacy mode
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void BX_CPU_C::write_new_stack_dword(bx_segment_reg_t *seg, bx_address offset, unsigned curr_pl, Bit32u data)
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{
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bx_address laddr;
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Bit32u laddr;
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BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
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if ((seg->cache.valid & SegAccessWOK4G) == SegAccessWOK4G) {
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accessOK:
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laddr = seg->cache.u.segment.base + offset;
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laddr = (Bit32u)(seg->cache.u.segment.base + offset);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 4, BX_WRITE);
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#if BX_SupportGuest2HostTLB
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unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.cc,v 1.217 2008-04-05 20:49:21 sshwarts Exp $
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// $Id: cpu.cc,v 1.218 2008-04-07 18:39:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -109,14 +109,11 @@ void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
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#endif
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}
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#if BX_DEBUGGER
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// If the exception() routine has encountered a nasty fault scenario,
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// the debugger may request that control is returned to it so that
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// the situation may be examined.
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if (bx_guard.interrupt_requested) {
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BX_ERROR(("CPU_LOOP bx_guard.interrupt_requested=%d", bx_guard.interrupt_requested));
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return;
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}
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#if BX_DEBUGGER
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if (bx_guard.interrupt_requested) return;
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#endif
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// We get here either by a normal function call, or by a longjmp
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@ -567,7 +564,7 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
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else {
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// only bother comparing if any breakpoints enabled
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if (BX_CPU_THIS_PTR dr7 & 0x000000ff) {
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bx_address iaddr = BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_CS) + BX_CPU_THIS_PTR prev_rip;
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bx_address iaddr = get_laddr(BX_SEG_REG_CS, BX_CPU_THIS_PTR prev_rip);
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Bit32u dr6_bits = hwdebug_compare(iaddr, 1, BX_HWDebugInstruction, BX_HWDebugInstruction);
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if (dr6_bits)
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{
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@ -617,7 +614,7 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
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void BX_CPU_C::prefetch(void)
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{
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bx_address temp_rip = RIP;
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bx_address laddr = BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_CS) + temp_rip;
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bx_address laddr = BX_CPU_THIS_PTR get_laddr(BX_SEG_REG_CS, temp_rip);
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bx_phy_address pAddr;
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unsigned pageOffset = PAGE_OFFSET(laddr);
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@ -808,8 +805,7 @@ bx_bool BX_CPU_C::dbg_check_begin_instr_bpoint(void)
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BX_CPU_THIS_PTR guard_found.cs = cs;
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BX_CPU_THIS_PTR guard_found.eip = debug_eip;
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BX_CPU_THIS_PTR guard_found.laddr =
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BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_CS) + debug_eip;
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BX_CPU_THIS_PTR guard_found.laddr = get_laddr(BX_SEG_REG_CS, debug_eip);
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BX_CPU_THIS_PTR guard_found.is_32bit_code =
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b;
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BX_CPU_THIS_PTR guard_found.is_64bit_code = Is64BitMode();
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@ -909,8 +905,7 @@ bx_bool BX_CPU_C::dbg_check_end_instr_bpoint(void)
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BX_CPU_THIS_PTR guard_found.cs =
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
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BX_CPU_THIS_PTR guard_found.eip = RIP;
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BX_CPU_THIS_PTR guard_found.laddr =
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BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_CS) + RIP;
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BX_CPU_THIS_PTR guard_found.laddr = get_laddr(BX_SEG_REG_CS, RIP);
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BX_CPU_THIS_PTR guard_found.is_32bit_code =
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b;
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BX_CPU_THIS_PTR guard_found.is_64bit_code = Is64BitMode();
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.449 2008-04-06 18:00:20 sshwarts Exp $
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// $Id: cpu.h,v 1.450 2008-04-07 18:39:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -891,6 +891,9 @@ public: // for now...
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unsigned cpu_mode;
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bx_bool in_smm;
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bx_bool nmi_disable;
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#if BX_SUPPORT_X86_64
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bx_address laddr32b_mask;
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#endif
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#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
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bx_address alignment_check_mask;
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#endif
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@ -3080,6 +3083,13 @@ public: // for now...
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BX_CPP_INLINE bx_address get_segment_base(unsigned seg);
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// The linear address must be truncated to the 32-bit when CPU is not
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// executing in long64 mode. The function must be used to compute
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// linear address everywhere when a code is shared between long64 and
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// legacy mode. For legacy mode only just use Bit32u to store linear
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// address value.
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BX_CPP_INLINE bx_address get_laddr(unsigned seg, bx_address offset);
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DECLARE_EFLAG_ACCESSOR (ID, 21)
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DECLARE_EFLAG_ACCESSOR (VIP, 20)
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DECLARE_EFLAG_ACCESSOR (VIF, 19)
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@ -3198,14 +3208,20 @@ BX_CPP_INLINE void BX_CPU_C::updateFetchModeMask(void)
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BX_CPP_INLINE bx_address BX_CPU_C::get_segment_base(unsigned seg)
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{
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#if BX_SUPPORT_X86_64
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
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if (seg < BX_SEG_REG_FS)
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return 0;
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else
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return BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base;
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64 && seg < BX_SEG_REG_FS) {
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return 0;
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}
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#endif
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return (Bit32u)(BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base);
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return BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base;
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}
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BX_CPP_INLINE bx_address BX_CPU_C::get_laddr(unsigned seg, bx_address offset)
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{
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#if BX_SUPPORT_X86_64
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return (get_segment_base(seg) + offset) & BX_CPU_THIS_PTR laddr32b_mask;
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#else
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return (get_segment_base(seg) + offset);
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#endif
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}
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BX_CPP_INLINE Bit8u BX_CPU_C::get_reg8l(unsigned reg)
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: debugstuff.cc,v 1.94 2008-03-31 20:56:27 sshwarts Exp $
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// $Id: debugstuff.cc,v 1.95 2008-04-07 18:39:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -47,7 +47,7 @@ void BX_CPU_C::debug_disasm_instruction(bx_address offset)
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static disassembler bx_disassemble;
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unsigned remainsInPage = 0x1000 - PAGE_OFFSET(offset);
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|
||||
bx_bool valid = dbg_xlate_linear2phy(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_CS) + offset, &phy_addr);
|
||||
bx_bool valid = dbg_xlate_linear2phy(BX_CPU_THIS_PTR get_laddr(BX_SEG_REG_CS, offset), &phy_addr);
|
||||
if (valid && BX_CPU_THIS_PTR mem!=NULL) {
|
||||
BX_CPU_THIS_PTR mem->dbg_fetch_mem(BX_CPU_THIS, phy_addr, 16, instr_buf);
|
||||
unsigned isize = bx_disassemble.disasm(
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: init.cc,v 1.162 2008-04-05 20:41:00 sshwarts Exp $
|
||||
// $Id: init.cc,v 1.163 2008-04-07 18:39:16 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -856,8 +856,6 @@ void BX_CPU_C::reset(unsigned source)
|
||||
# error "DR6: CPU > 6"
|
||||
#endif
|
||||
|
||||
BX_CPU_THIS_PTR cpu_mode = BX_MODE_IA32_REAL;
|
||||
|
||||
BX_CPU_THIS_PTR smi_pending = 0;
|
||||
BX_CPU_THIS_PTR nmi_pending = 0;
|
||||
BX_CPU_THIS_PTR in_smm = 0;
|
||||
@ -944,6 +942,8 @@ void BX_CPU_C::reset(unsigned source)
|
||||
BX_CPU_THIS_PTR eipPageWindowSize = 0;
|
||||
BX_CPU_THIS_PTR eipFetchPtr = NULL;
|
||||
|
||||
handleCpuModeChange();
|
||||
|
||||
#if BX_DEBUGGER
|
||||
BX_CPU_THIS_PTR stop_reason = STOP_NO_REASON;
|
||||
BX_CPU_THIS_PTR magic_break = 0;
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: io.cc,v 1.55 2008-03-22 21:29:40 sshwarts Exp $
|
||||
// $Id: io.cc,v 1.56 2008-04-07 18:39:16 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -57,7 +57,7 @@ Bit32u BX_CPU_C::FastRepINSW(bxInstruction_c *i, bx_address dstOff, Bit16u port,
|
||||
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
|
||||
return 0;
|
||||
|
||||
bx_address laddrDst = BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_ES) + dstOff;
|
||||
bx_address laddrDst = BX_CPU_THIS_PTR get_laddr(BX_SEG_REG_ES, dstOff);
|
||||
// check that the address is word aligned
|
||||
if (laddrDst & 1) return 0;
|
||||
|
||||
@ -141,7 +141,7 @@ Bit32u BX_CPU_C::FastRepOUTSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
|
||||
if ((srcSegPtr->cache.valid & SegAccessROK4G) != SegAccessROK4G)
|
||||
return 0;
|
||||
|
||||
bx_address laddrSrc = BX_CPU_THIS_PTR get_segment_base(srcSeg) + srcOff;
|
||||
bx_address laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);
|
||||
// check that the address is word aligned
|
||||
if (laddrSrc & 1) return 0;
|
||||
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: paging.cc,v 1.116 2008-04-05 20:41:00 sshwarts Exp $
|
||||
// $Id: paging.cc,v 1.117 2008-04-07 18:39:16 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -551,7 +551,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INVLPG(bxInstruction_c* i)
|
||||
}
|
||||
|
||||
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
bx_address laddr = BX_CPU_THIS_PTR get_segment_base(i->seg()) + RMAddr(i);
|
||||
bx_address laddr = BX_CPU_THIS_PTR get_laddr(i->seg(), RMAddr(i));
|
||||
BX_INSTR_TLB_CNTRL(BX_CPU_ID, BX_INSTR_INVLPG, laddr);
|
||||
TLB_invlpg(laddr);
|
||||
InstrTLB_Increment(tlbEntryInvlpg);
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: proc_ctrl.cc,v 1.208 2008-04-05 17:51:55 sshwarts Exp $
|
||||
// $Id: proc_ctrl.cc,v 1.209 2008-04-07 18:39:17 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -202,7 +202,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CLFLUSH(bxInstruction_c *i)
|
||||
execute_virtual_checks(seg, RMAddr(i), 1);
|
||||
}
|
||||
|
||||
bx_address laddr = BX_CPU_THIS_PTR get_segment_base(i->seg()) + RMAddr(i);
|
||||
bx_address laddr = BX_CPU_THIS_PTR get_laddr(i->seg(), RMAddr(i));
|
||||
bx_phy_address paddr;
|
||||
|
||||
if (BX_CPU_THIS_PTR cr0.get_PG()) {
|
||||
@ -1118,6 +1118,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOADALL(bxInstruction_c *i)
|
||||
BX_CPU_THIS_PTR updateFetchModeMask();
|
||||
#endif
|
||||
|
||||
handleCpuModeChange();
|
||||
|
||||
/* ES */
|
||||
BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, 0x824, 2, &es_raw);
|
||||
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value = es_raw;
|
||||
@ -1145,18 +1147,18 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOADALL(bxInstruction_c *i)
|
||||
}
|
||||
|
||||
#if 0
|
||||
BX_INFO(("cs.dpl = %02x", (unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.dpl));
|
||||
BX_INFO(("ss.dpl = %02x", (unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl));
|
||||
BX_INFO(("BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].dpl = 0x%02x", (unsigned) BX_CPU_THIS_PTR ds.cache.dpl));
|
||||
BX_INFO(("BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].dpl = 0x%02x", (unsigned) BX_CPU_THIS_PTR es.cache.dpl));
|
||||
BX_INFO(("LOADALL: setting cs.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl));
|
||||
BX_INFO(("LOADALL: setting ss.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.rpl));
|
||||
BX_INFO(("LOADALL: setting ds.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.rpl));
|
||||
BX_INFO(("LOADALL: setting es.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.rpl));
|
||||
BX_INFO(("cs.dpl = %02x", (unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.dpl));
|
||||
BX_INFO(("ss.dpl = %02x", (unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl));
|
||||
BX_INFO(("BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].dpl = 0x%02x", (unsigned) BX_CPU_THIS_PTR ds.cache.dpl));
|
||||
BX_INFO(("BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].dpl = 0x%02x", (unsigned) BX_CPU_THIS_PTR es.cache.dpl));
|
||||
BX_INFO(("LOADALL: setting cs.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl));
|
||||
BX_INFO(("LOADALL: setting ss.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.rpl));
|
||||
BX_INFO(("LOADALL: setting ds.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.rpl));
|
||||
BX_INFO(("LOADALL: setting es.selector.rpl to %u",
|
||||
(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.rpl));
|
||||
#endif
|
||||
|
||||
BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, 0x826, 2, &DI);
|
||||
@ -1219,6 +1221,13 @@ void BX_CPU_C::handleCpuModeChange(void)
|
||||
}
|
||||
}
|
||||
|
||||
#if BX_SUPPORT_X86_64
|
||||
if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)
|
||||
BX_CPU_THIS_PTR laddr32b_mask = BX_CONST64(0xffffffffffffffff);
|
||||
else
|
||||
BX_CPU_THIS_PTR laddr32b_mask = BX_CONST64(0xffffffff);
|
||||
#endif
|
||||
|
||||
if (mode != BX_CPU_THIS_PTR cpu_mode)
|
||||
BX_DEBUG(("%s activated", cpu_mode_string(BX_CPU_THIS_PTR cpu_mode)));
|
||||
}
|
||||
@ -1228,9 +1237,9 @@ void BX_CPU_C::handleAlignmentCheck(void)
|
||||
{
|
||||
if (CPL == 3 && BX_CPU_THIS_PTR cr0.get_AM() && BX_CPU_THIS_PTR get_AC()) {
|
||||
#if BX_SUPPORT_X86_64
|
||||
BX_CPU_THIS_PTR alignment_check_mask = BX_CONST64(0xFFFFFFFFFFFFFFFF);
|
||||
BX_CPU_THIS_PTR alignment_check_mask = BX_CONST64(0xffffffffffffffff);
|
||||
#else
|
||||
BX_CPU_THIS_PTR alignment_check_mask = 0xFFFFFFFF;
|
||||
BX_CPU_THIS_PTR alignment_check_mask = 0xffffffff;
|
||||
#endif
|
||||
BX_INFO(("Enable alignment check (#AC exception)"));
|
||||
}
|
||||
@ -1922,26 +1931,26 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MONITOR(bxInstruction_c *i)
|
||||
exception(BX_GP_EXCEPTION, 0, 0);
|
||||
}
|
||||
|
||||
bx_address addr, laddr;
|
||||
bx_address offset, laddr;
|
||||
bx_phy_address paddr;
|
||||
|
||||
#if BX_SUPPORT_X86_64
|
||||
if (i->as64L()) {
|
||||
addr = RAX;
|
||||
offset = RAX;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
if (i->as32L()) {
|
||||
laddr = EAX;
|
||||
offset = EAX;
|
||||
}
|
||||
else {
|
||||
addr = AX;
|
||||
offset = AX;
|
||||
}
|
||||
|
||||
read_virtual_checks(&BX_CPU_THIS_PTR sregs[i->seg()], addr, 1);
|
||||
read_virtual_checks(&BX_CPU_THIS_PTR sregs[i->seg()], offset, 1);
|
||||
|
||||
// set MONITOR
|
||||
laddr = BX_CPU_THIS_PTR get_segment_base(i->seg()) + addr;
|
||||
laddr = BX_CPU_THIS_PTR get_laddr(i->seg(), offset);
|
||||
|
||||
if (BX_CPU_THIS_PTR cr0.get_PG()) {
|
||||
paddr = dtranslate_linear(laddr, CPL, BX_READ);
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: smm.cc,v 1.35 2008-03-31 20:56:27 sshwarts Exp $
|
||||
// $Id: smm.cc,v 1.36 2008-04-07 18:39:17 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2006 Stanislav Shwartsman
|
||||
@ -132,8 +132,6 @@ void BX_CPU_C::enter_system_management_mode(void)
|
||||
BX_CPU_THIS_PTR cr0.set_TS(0); // no task switch (bit 3)
|
||||
BX_CPU_THIS_PTR cr0.set_PG(0); // paging disabled (bit 31)
|
||||
|
||||
BX_CPU_THIS_PTR cpu_mode = BX_MODE_IA32_REAL;
|
||||
|
||||
// paging mode was changed - flush TLB
|
||||
TLB_flush(1); // 1 = Flush Global entries also
|
||||
|
||||
@ -168,8 +166,10 @@ void BX_CPU_C::enter_system_management_mode(void)
|
||||
BX_CPU_THIS_PTR updateFetchModeMask();
|
||||
#endif
|
||||
|
||||
handleCpuModeChange();
|
||||
|
||||
#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
|
||||
BX_CPU_THIS_PTR alignment_check_mask = LPF_MASK;
|
||||
handleAlignmentCheck();
|
||||
#endif
|
||||
|
||||
/* DS (Data Segment) and descriptor cache */
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: string.cc,v 1.55 2008-03-22 21:29:41 sshwarts Exp $
|
||||
// $Id: string.cc,v 1.56 2008-04-07 18:39:17 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -57,7 +57,7 @@ Bit32u BX_CPU_C::FastRepMOVSB(bxInstruction_c *i, unsigned srcSeg, bx_address sr
|
||||
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
|
||||
return 0;
|
||||
|
||||
laddrSrc = BX_CPU_THIS_PTR get_segment_base(srcSeg) + srcOff;
|
||||
laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrSrc = v2h_read_byte(laddrSrc, CPL);
|
||||
@ -78,7 +78,7 @@ Bit32u BX_CPU_C::FastRepMOVSB(bxInstruction_c *i, unsigned srcSeg, bx_address sr
|
||||
#endif
|
||||
if (! hostAddrSrc) return 0;
|
||||
|
||||
laddrDst = BX_CPU_THIS_PTR get_segment_base(dstSeg) + dstOff;
|
||||
laddrDst = BX_CPU_THIS_PTR get_laddr(dstSeg, dstOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrDst = v2h_write_byte(laddrDst, CPL);
|
||||
@ -152,7 +152,7 @@ Bit32u BX_CPU_C::FastRepMOVSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
|
||||
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
|
||||
return 0;
|
||||
|
||||
laddrSrc = BX_CPU_THIS_PTR get_segment_base(srcSeg) + srcOff;
|
||||
laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrSrc = v2h_read_byte(laddrSrc, CPL);
|
||||
@ -173,7 +173,7 @@ Bit32u BX_CPU_C::FastRepMOVSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
|
||||
#endif
|
||||
if (! hostAddrSrc) return 0;
|
||||
|
||||
laddrDst = BX_CPU_THIS_PTR get_segment_base(dstSeg) + dstOff;
|
||||
laddrDst = BX_CPU_THIS_PTR get_laddr(dstSeg, dstOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrDst = v2h_write_byte(laddrDst, CPL);
|
||||
@ -250,7 +250,7 @@ Bit32u BX_CPU_C::FastRepMOVSD(bxInstruction_c *i, unsigned srcSeg, bx_address sr
|
||||
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
|
||||
return 0;
|
||||
|
||||
laddrSrc = BX_CPU_THIS_PTR get_segment_base(srcSeg) + srcOff;
|
||||
laddrSrc = BX_CPU_THIS_PTR get_laddr(srcSeg, srcOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrSrc = v2h_read_byte(laddrSrc, CPL);
|
||||
@ -271,7 +271,7 @@ Bit32u BX_CPU_C::FastRepMOVSD(bxInstruction_c *i, unsigned srcSeg, bx_address sr
|
||||
#endif
|
||||
if (! hostAddrSrc) return 0;
|
||||
|
||||
laddrDst = BX_CPU_THIS_PTR get_segment_base(dstSeg) + dstOff;
|
||||
laddrDst = BX_CPU_THIS_PTR get_laddr(dstSeg, dstOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrDst = v2h_write_byte(laddrDst, CPL);
|
||||
@ -344,7 +344,7 @@ Bit32u BX_CPU_C::FastRepSTOSB(bxInstruction_c *i, unsigned dstSeg, bx_address ds
|
||||
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
|
||||
return 0;
|
||||
|
||||
laddrDst = BX_CPU_THIS_PTR get_segment_base(dstSeg) + dstOff;
|
||||
laddrDst = BX_CPU_THIS_PTR get_laddr(dstSeg, dstOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrDst = v2h_write_byte(laddrDst, CPL);
|
||||
@ -409,7 +409,7 @@ Bit32u BX_CPU_C::FastRepSTOSW(bxInstruction_c *i, unsigned dstSeg, bx_address ds
|
||||
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
|
||||
return 0;
|
||||
|
||||
laddrDst = BX_CPU_THIS_PTR get_segment_base(dstSeg) + dstOff;
|
||||
laddrDst = BX_CPU_THIS_PTR get_laddr(dstSeg, dstOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrDst = v2h_write_byte(laddrDst, CPL);
|
||||
@ -476,7 +476,7 @@ Bit32u BX_CPU_C::FastRepSTOSD(bxInstruction_c *i, unsigned dstSeg, bx_address ds
|
||||
if ((dstSegPtr->cache.valid & SegAccessWOK4G) != SegAccessWOK4G)
|
||||
return 0;
|
||||
|
||||
laddrDst = BX_CPU_THIS_PTR get_segment_base(dstSeg) + dstOff;
|
||||
laddrDst = BX_CPU_THIS_PTR get_laddr(dstSeg, dstOff);
|
||||
|
||||
#if BX_SupportGuest2HostTLB
|
||||
hostAddrDst = v2h_write_byte(laddrDst, CPL);
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: xsave.cc,v 1.7 2008-04-06 18:00:20 sshwarts Exp $
|
||||
// $Id: xsave.cc,v 1.8 2008-04-07 18:39:17 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2008 Stanislav Shwartsman
|
||||
@ -45,7 +45,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::XSAVE(bxInstruction_c *i)
|
||||
|
||||
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
bx_address laddr = BX_CPU_THIS_PTR get_segment_base(i->seg()) + RMAddr(i);
|
||||
bx_address laddr = get_linear(i->seg(), RMAddr(i));
|
||||
|
||||
if (laddr & 0x3f) {
|
||||
BX_ERROR(("XSAVE: access not aligned to 64-byte"));
|
||||
@ -176,7 +176,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::XRSTOR(bxInstruction_c *i)
|
||||
|
||||
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
bx_address laddr = BX_CPU_THIS_PTR get_segment_base(i->seg()) + RMAddr(i);
|
||||
bx_address laddr = get_linear(i->seg(), RMAddr(i));
|
||||
|
||||
if (laddr & 0x3f) {
|
||||
BX_ERROR(("XRSTOR: access not aligned to 64-byte"));
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: memory.cc,v 1.63 2008-02-03 20:27:05 sshwarts Exp $
|
||||
// $Id: memory.cc,v 1.64 2008-04-07 18:39:17 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -43,8 +43,7 @@
|
||||
// 0xf0000 - 0xfffff Upper BIOS Area (64K)
|
||||
//
|
||||
|
||||
void BX_CPP_AttrRegparmN(3)
|
||||
BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
|
||||
void BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
|
||||
{
|
||||
Bit8u *data_ptr;
|
||||
bx_phy_address a20addr = A20ADDR(addr);
|
||||
@ -204,8 +203,7 @@ inc_one:
|
||||
}
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(3)
|
||||
BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
|
||||
void BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
|
||||
{
|
||||
Bit8u *data_ptr;
|
||||
bx_phy_address a20addr = A20ADDR(addr);
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: memory.h,v 1.45 2008-02-03 20:27:06 sshwarts Exp $
|
||||
// $Id: memory.h,v 1.46 2008-04-07 18:39:17 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -95,9 +95,9 @@ public:
|
||||
BX_MEM_SMF void disable_smram(void);
|
||||
BX_MEM_SMF bx_bool is_smram_accessible(void);
|
||||
BX_MEM_SMF void readPhysicalPage(BX_CPU_C *cpu, bx_phy_address addr,
|
||||
unsigned len, void *data) BX_CPP_AttrRegparmN(3);
|
||||
unsigned len, void *data);
|
||||
BX_MEM_SMF void writePhysicalPage(BX_CPU_C *cpu, bx_phy_address addr,
|
||||
unsigned len, void *data) BX_CPP_AttrRegparmN(3);
|
||||
unsigned len, void *data);
|
||||
BX_MEM_SMF void load_ROM(const char *path, bx_phy_address romaddress, Bit8u type);
|
||||
BX_MEM_SMF void load_RAM(const char *path, bx_phy_address romaddress, Bit8u type);
|
||||
BX_MEM_SMF Bit32u get_memory_in_k(void);
|
||||
|
Loading…
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Reference in New Issue
Block a user