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Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer

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This commit is contained in:
Stanislav Shwartsman 2007-12-20 18:29:42 +00:00
parent 46b3ec2397
commit b516589e4e
26 changed files with 325 additions and 369 deletions
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34
bochs/cpu/access.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: access.cc,v 1.83 2007-12-16 21:03:45 sshwarts Exp $
// $Id: access.cc,v 1.84 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -524,7 +524,7 @@ BX_CPU_C::v2h_write_qword(bx_address laddr, unsigned curr_pl)
#endif // BX_SupportGuest2HostTLB
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_byte(unsigned s, bx_address offset, Bit8u *data)
BX_CPU_C::write_virtual_byte(unsigned s, bx_address offset, Bit8u data)
{
bx_address laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
@ -548,7 +548,7 @@ accessOK:
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
#endif
*hostAddr = *data;
*hostAddr = data;
return;
}
}
@ -559,7 +559,7 @@ accessOK:
exception(int_number(seg), 0, 0);
}
#endif
access_linear(laddr, 1, CPL, BX_WRITE, (void *) data);
access_linear(laddr, 1, CPL, BX_WRITE, (void *) &data);
return;
}
@ -572,7 +572,7 @@ accessOK:
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_word(unsigned s, bx_address offset, Bit16u *data)
BX_CPU_C::write_virtual_word(unsigned s, bx_address offset, Bit16u data)
{
bx_address laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
@ -605,7 +605,7 @@ accessOK:
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
#endif
WriteHostWordToLittleEndian(hostAddr, *data);
WriteHostWordToLittleEndian(hostAddr, data);
return;
}
}
@ -617,7 +617,7 @@ accessOK:
exception(int_number(seg), 0, 0);
}
#endif
access_linear(laddr, 2, CPL, BX_WRITE, (void *) data);
access_linear(laddr, 2, CPL, BX_WRITE, (void *) &data);
return;
}
@ -630,7 +630,7 @@ accessOK:
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_dword(unsigned s, bx_address offset, Bit32u *data)
BX_CPU_C::write_virtual_dword(unsigned s, bx_address offset, Bit32u data)
{
bx_address laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
@ -663,7 +663,7 @@ accessOK:
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
#endif
WriteHostDWordToLittleEndian(hostAddr, *data);
WriteHostDWordToLittleEndian(hostAddr, data);
return;
}
}
@ -675,7 +675,7 @@ accessOK:
exception(int_number(seg), 0, 0);
}
#endif
access_linear(laddr, 4, CPL, BX_WRITE, (void *) data);
access_linear(laddr, 4, CPL, BX_WRITE, (void *) &data);
return;
}
@ -688,7 +688,7 @@ accessOK:
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_qword(unsigned s, bx_address offset, Bit64u *data)
BX_CPU_C::write_virtual_qword(unsigned s, bx_address offset, Bit64u data)
{
bx_address laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
@ -721,7 +721,7 @@ accessOK:
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
#endif
WriteHostQWordToLittleEndian(hostAddr, *data);
WriteHostQWordToLittleEndian(hostAddr, data);
return;
}
}
@ -733,7 +733,7 @@ accessOK:
exception(int_number(seg), 0, 0);
}
#endif
access_linear(laddr, 8, CPL, BX_WRITE, (void *) data);
access_linear(laddr, 8, CPL, BX_WRITE, (void *) &data);
return;
}
@ -1356,8 +1356,8 @@ BX_CPU_C::write_virtual_dqword(unsigned s, bx_address offset, Bit8u *data)
// Write Double Quadword.
Bit64u *qwords = (Bit64u*) data;
write_virtual_qword(s, offset+Host1stDWordOffset, &qwords[0]);
write_virtual_qword(s, offset+Host2ndDWordOffset, &qwords[1]);
write_virtual_qword(s, offset+Host1stDWordOffset, qwords[0]);
write_virtual_qword(s, offset+Host2ndDWordOffset, qwords[1]);
}
void BX_CPP_AttrRegparmN(3)
@ -1387,8 +1387,8 @@ BX_CPU_C::read_virtual_tword(unsigned s, bx_address offset, floatx80 *data)
BX_CPU_C::write_virtual_tword(unsigned s, bx_address offset, floatx80 *data)
{
// store floating point register
write_virtual_qword(s, offset+0, &data->fraction);
write_virtual_word (s, offset+8, &data->exp);
write_virtual_qword(s, offset+0, data->fraction);
write_virtual_word (s, offset+8, data->exp);
}
#endif

4
bochs/cpu/arith32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith32.cc,v 1.67 2007-12-19 23:21:11 sshwarts Exp $
// $Id: arith32.cc,v 1.68 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -710,7 +710,7 @@ void BX_CPU_C::CMPXCHG8B(bxInstruction_c *i)
// dest <-- src
write_RMW_virtual_dword(ECX);
// write permissions already checked by read_RMW_virtual_dword
write_virtual_dword(i->seg(), RMAddr(i), &EBX);
write_virtual_dword(i->seg(), RMAddr(i), EBX);
assert_ZF();
}
else {

4
bochs/cpu/arith64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith64.cc,v 1.43 2007-12-19 23:21:11 sshwarts Exp $
// $Id: arith64.cc,v 1.44 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -688,7 +688,7 @@ void BX_CPU_C::CMPXCHG16B(bxInstruction_c *i)
// dest <-- src
write_RMW_virtual_qword(RCX);
// write permissions already checked by read_RMW_virtual_qword
write_virtual_qword(i->seg(), RMAddr(i), &RBX);
write_virtual_qword(i->seg(), RMAddr(i), RBX);
assert_ZF();
}
else {

34
bochs/cpu/bit.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: bit.cc,v 1.46 2007-12-14 21:29:36 sshwarts Exp $
// $Id: bit.cc,v 1.47 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -37,7 +37,7 @@
void BX_CPU_C::SETO_EbM(bxInstruction_c *i)
{
Bit8u result_8 = getB_OF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETO_EbR(bxInstruction_c *i)
@ -48,7 +48,7 @@ void BX_CPU_C::SETO_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNO_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !getB_OF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNO_EbR(bxInstruction_c *i)
@ -59,7 +59,7 @@ void BX_CPU_C::SETNO_EbR(bxInstruction_c *i)
void BX_CPU_C::SETB_EbM(bxInstruction_c *i)
{
Bit8u result_8 = getB_CF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETB_EbR(bxInstruction_c *i)
@ -70,7 +70,7 @@ void BX_CPU_C::SETB_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNB_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !getB_CF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNB_EbR(bxInstruction_c *i)
@ -81,7 +81,7 @@ void BX_CPU_C::SETNB_EbR(bxInstruction_c *i)
void BX_CPU_C::SETZ_EbM(bxInstruction_c *i)
{
Bit8u result_8 = getB_ZF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETZ_EbR(bxInstruction_c *i)
@ -92,7 +92,7 @@ void BX_CPU_C::SETZ_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNZ_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !getB_ZF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNZ_EbR(bxInstruction_c *i)
@ -103,7 +103,7 @@ void BX_CPU_C::SETNZ_EbR(bxInstruction_c *i)
void BX_CPU_C::SETBE_EbM(bxInstruction_c *i)
{
Bit8u result_8 = (getB_CF() | getB_ZF());
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETBE_EbR(bxInstruction_c *i)
@ -114,7 +114,7 @@ void BX_CPU_C::SETBE_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNBE_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !(getB_CF() | getB_ZF());
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNBE_EbR(bxInstruction_c *i)
@ -125,7 +125,7 @@ void BX_CPU_C::SETNBE_EbR(bxInstruction_c *i)
void BX_CPU_C::SETS_EbM(bxInstruction_c *i)
{
Bit8u result_8 = getB_SF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETS_EbR(bxInstruction_c *i)
@ -136,7 +136,7 @@ void BX_CPU_C::SETS_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNS_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !getB_SF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNS_EbR(bxInstruction_c *i)
@ -147,7 +147,7 @@ void BX_CPU_C::SETNS_EbR(bxInstruction_c *i)
void BX_CPU_C::SETP_EbM(bxInstruction_c *i)
{
Bit8u result_8 = getB_PF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETP_EbR(bxInstruction_c *i)
@ -158,7 +158,7 @@ void BX_CPU_C::SETP_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNP_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !getB_PF();
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNP_EbR(bxInstruction_c *i)
@ -169,7 +169,7 @@ void BX_CPU_C::SETNP_EbR(bxInstruction_c *i)
void BX_CPU_C::SETL_EbM(bxInstruction_c *i)
{
Bit8u result_8 = (getB_SF() ^ getB_OF());
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETL_EbR(bxInstruction_c *i)
@ -180,7 +180,7 @@ void BX_CPU_C::SETL_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNL_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !(getB_SF() ^ getB_OF());
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNL_EbR(bxInstruction_c *i)
@ -191,7 +191,7 @@ void BX_CPU_C::SETNL_EbR(bxInstruction_c *i)
void BX_CPU_C::SETLE_EbM(bxInstruction_c *i)
{
Bit8u result_8 = getB_ZF() | (getB_SF() ^ getB_OF());
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETLE_EbR(bxInstruction_c *i)
@ -203,7 +203,7 @@ void BX_CPU_C::SETLE_EbR(bxInstruction_c *i)
void BX_CPU_C::SETNLE_EbM(bxInstruction_c *i)
{
Bit8u result_8 = !(getB_ZF() | (getB_SF() ^ getB_OF()));
write_virtual_byte(i->seg(), RMAddr(i), &result_8);
write_virtual_byte(i->seg(), RMAddr(i), result_8);
}
void BX_CPU_C::SETNLE_EbR(bxInstruction_c *i)

22
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.398 2007-12-18 21:41:41 sshwarts Exp $
// $Id: cpu.h,v 1.399 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -3122,13 +3122,13 @@ public: // for now...
BX_CPU_THIS_PTR eipPageWindowSize = 0;
}
BX_SMF void write_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned length) BX_CPP_AttrRegparmN(3);
BX_SMF void read_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned length) BX_CPP_AttrRegparmN(3);
BX_SMF void execute_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned length) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_byte(unsigned seg, bx_address offset, Bit8u *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_word(unsigned seg, bx_address offset, Bit16u *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_dword(unsigned seg, bx_address offset, Bit32u *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_qword(unsigned seg, bx_address offset, Bit64u *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned len) BX_CPP_AttrRegparmN(3);
BX_SMF void read_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned len) BX_CPP_AttrRegparmN(3);
BX_SMF void execute_virtual_checks(bx_segment_reg_t *seg, bx_address offset, unsigned len) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_byte(unsigned seg, bx_address offset, Bit8u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_word(unsigned seg, bx_address offset, Bit16u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_dword(unsigned seg, bx_address offset, Bit32u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_qword(unsigned seg, bx_address offset, Bit64u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_dqword(unsigned s, bx_address off, Bit8u *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_dqword_aligned(unsigned s, bx_address off, Bit8u *data) BX_CPP_AttrRegparmN(3);
#if BX_SUPPORT_FPU
@ -3347,11 +3347,11 @@ public: // for now...
#endif
BX_SMF void push_16(Bit16u value16);
BX_SMF void push_32(Bit32u value32);
BX_SMF void pop_16(Bit16u *value16_ptr);
BX_SMF void pop_32(Bit32u *value32_ptr);
BX_SMF Bit16u pop_16(void);
BX_SMF Bit32u pop_32(void);
#if BX_SUPPORT_X86_64
BX_SMF void push_64(Bit64u value64);
BX_SMF void pop_64(Bit64u *value64_ptr);
BX_SMF Bit64u pop_64(void);
#endif
BX_SMF bx_bool can_push(bx_descriptor_t *descriptor, Bit32u esp, Bit32u bytes) BX_CPP_AttrRegparmN(3);
BX_SMF bx_bool can_pop(Bit32u bytes);

24
bochs/cpu/ctrl_xfer16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: ctrl_xfer16.cc,v 1.47 2007-12-18 21:41:41 sshwarts Exp $
// $Id: ctrl_xfer16.cc,v 1.48 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -39,8 +39,6 @@
void BX_CPU_C::RETnear16_Iw(bxInstruction_c *i)
{
Bit16u return_IP;
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
@ -48,7 +46,7 @@ void BX_CPU_C::RETnear16_Iw(bxInstruction_c *i)
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&return_IP);
Bit16u return_IP = pop_16();
if (return_IP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled)
{
@ -72,8 +70,6 @@ void BX_CPU_C::RETnear16_Iw(bxInstruction_c *i)
void BX_CPU_C::RETnear16(bxInstruction_c *i)
{
Bit16u return_IP;
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
@ -81,7 +77,7 @@ void BX_CPU_C::RETnear16(bxInstruction_c *i)
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&return_IP);
Bit16u return_IP = pop_16();
if (return_IP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled)
{
@ -117,8 +113,8 @@ void BX_CPU_C::RETfar16_Iw(bxInstruction_c *i)
goto done;
}
pop_16(&ip);
pop_16(&cs_raw);
ip = pop_16();
cs_raw = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
EIP = (Bit32u) ip;
@ -154,8 +150,8 @@ void BX_CPU_C::RETfar16(bxInstruction_c *i)
goto done;
}
pop_16(&ip);
pop_16(&cs_raw);
ip = pop_16();
cs_raw = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
EIP = (Bit32u) ip;
@ -576,9 +572,9 @@ void BX_CPU_C::IRET16(bxInstruction_c *i)
goto done;
}
pop_16(&ip);
pop_16(&cs_raw);
pop_16(&flags);
ip = pop_16();
cs_raw = pop_16();
flags = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
EIP = (Bit32u) ip;

37
bochs/cpu/ctrl_xfer32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: ctrl_xfer32.cc,v 1.59 2007-12-18 21:41:41 sshwarts Exp $
// $Id: ctrl_xfer32.cc,v 1.60 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -40,8 +40,6 @@
void BX_CPU_C::RETnear32_Iw(bxInstruction_c *i)
{
Bit32u return_EIP;
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
@ -50,7 +48,7 @@ void BX_CPU_C::RETnear32_Iw(bxInstruction_c *i)
BX_CPU_THIS_PTR prev_rsp = RSP;
Bit16u imm16 = i->Iw();
pop_32(&return_EIP);
Bit32u return_EIP = pop_32();
branch_near32(return_EIP);
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
ESP += imm16;
@ -64,8 +62,6 @@ void BX_CPU_C::RETnear32_Iw(bxInstruction_c *i)
void BX_CPU_C::RETnear32(bxInstruction_c *i)
{
Bit32u return_EIP;
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
@ -73,7 +69,7 @@ void BX_CPU_C::RETnear32(bxInstruction_c *i)
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_32(&return_EIP);
Bit32u return_EIP = pop_32();
branch_near32(return_EIP);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -83,7 +79,7 @@ void BX_CPU_C::RETnear32(bxInstruction_c *i)
void BX_CPU_C::RETfar32_Iw(bxInstruction_c *i)
{
Bit32u eip, ecs_raw;
Bit32u eip, cs_raw;
invalidate_prefetch_q();
@ -101,10 +97,10 @@ void BX_CPU_C::RETfar32_Iw(bxInstruction_c *i)
goto done;
}
pop_32(&eip);
pop_32(&ecs_raw);
eip = pop_32();
cs_raw = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) ecs_raw);
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) cs_raw);
EIP = eip;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
@ -121,7 +117,7 @@ done:
void BX_CPU_C::RETfar32(bxInstruction_c *i)
{
Bit32u eip, ecs_raw;
Bit32u eip, cs_raw;
invalidate_prefetch_q();
@ -137,10 +133,10 @@ void BX_CPU_C::RETfar32(bxInstruction_c *i)
goto done;
}
pop_32(&eip);
pop_32(&ecs_raw); /* 32bit pop, MSW discarded */
eip = pop_32();
cs_raw = pop_32(); /* 32bit pop, MSW discarded */
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) ecs_raw);
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) cs_raw);
EIP = eip;
done:
@ -565,9 +561,7 @@ void BX_CPU_C::IRET32(bxInstruction_c *i)
goto done;
}
Bit32u eip, ecs, eflags;
pop_32(&eip);
Bit32u eip = pop_32();
// CS.LIMIT in real mode is 0xffff
if (eip > 0xffff) {
@ -575,11 +569,10 @@ void BX_CPU_C::IRET32(bxInstruction_c *i)
exception(BX_GP_EXCEPTION, 0, 0);
}
pop_32(&ecs);
pop_32(&eflags);
ecs &= 0xffff;
Bit16u cs = pop_32() & 0xffff;
Bit32u eflags = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u)ecs);
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u)cs);
EIP = eip;
writeEFlags(eflags, 0x00257fd5); // VIF, VIP, VM unchanged

11
bochs/cpu/data_xfer16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer16.cc,v 1.48 2007-12-01 16:45:16 sshwarts Exp $
// $Id: data_xfer16.cc,v 1.49 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -46,7 +46,7 @@ void BX_CPU_C::XCHG_RXAX(bxInstruction_c *i)
void BX_CPU_C::MOV_EwGwM(bxInstruction_c *i)
{
write_virtual_word(i->seg(), RMAddr(i), &BX_READ_16BIT_REG(i->nnn()));
write_virtual_word(i->seg(), RMAddr(i), BX_READ_16BIT_REG(i->nnn()));
}
void BX_CPU_C::MOV_EwGwR(bxInstruction_c *i)
@ -87,7 +87,7 @@ void BX_CPU_C::MOV_EwSw(bxInstruction_c *i)
}
}
else {
write_virtual_word(i->seg(), RMAddr(i), &seg_reg);
write_virtual_word(i->seg(), RMAddr(i), seg_reg);
}
}
@ -132,13 +132,12 @@ void BX_CPU_C::MOV_AXOd(bxInstruction_c *i)
void BX_CPU_C::MOV_OdAX(bxInstruction_c *i)
{
write_virtual_word(i->seg(), i->Id(), &AX);
write_virtual_word(i->seg(), i->Id(), AX);
}
void BX_CPU_C::MOV_EwIwM(bxInstruction_c *i)
{
Bit16u op_16 = i->Iw();
write_virtual_word(i->seg(), RMAddr(i), &op_16);
write_virtual_word(i->seg(), RMAddr(i), i->Iw());
}
void BX_CPU_C::MOV_EwIwR(bxInstruction_c *i)

9
bochs/cpu/data_xfer32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer32.cc,v 1.47 2007-12-01 16:45:16 sshwarts Exp $
// $Id: data_xfer32.cc,v 1.48 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -54,7 +54,7 @@ void BX_CPU_C::MOV_ERXId(bxInstruction_c *i)
void BX_CPU_C::MOV_EdGdM(bxInstruction_c *i)
{
write_virtual_dword(i->seg(), RMAddr(i), &BX_READ_32BIT_REG(i->nnn()));
write_virtual_dword(i->seg(), RMAddr(i), BX_READ_32BIT_REG(i->nnn()));
}
void BX_CPU_C::MOV_EdGdR(bxInstruction_c *i)
@ -90,13 +90,12 @@ void BX_CPU_C::MOV_EAXOd(bxInstruction_c *i)
void BX_CPU_C::MOV_OdEAX(bxInstruction_c *i)
{
write_virtual_dword(i->seg(), i->Id(), &EAX);
write_virtual_dword(i->seg(), i->Id(), EAX);
}
void BX_CPU_C::MOV_EdIdM(bxInstruction_c *i)
{
Bit32u op_32 = i->Id();
write_virtual_dword(i->seg(), RMAddr(i), &op_32);
write_virtual_dword(i->seg(), RMAddr(i), i->Id());
}
void BX_CPU_C::MOV_EdIdR(bxInstruction_c *i)

14
bochs/cpu/data_xfer64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer64.cc,v 1.30 2007-12-14 22:41:43 sshwarts Exp $
// $Id: data_xfer64.cc,v 1.31 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -48,7 +48,7 @@ void BX_CPU_C::MOV_RRXIq(bxInstruction_c *i)
void BX_CPU_C::MOV_EqGqM(bxInstruction_c *i)
{
write_virtual_qword(i->seg(), RMAddr(i), &BX_READ_64BIT_REG(i->nnn()));
write_virtual_qword(i->seg(), RMAddr(i), BX_READ_64BIT_REG(i->nnn()));
}
void BX_CPU_C::MOV_EqGqR(bxInstruction_c *i)
@ -81,7 +81,7 @@ void BX_CPU_C::MOV_ALOq(bxInstruction_c *i)
void BX_CPU_C::MOV_OqAL(bxInstruction_c *i)
{
write_virtual_byte(i->seg(), i->Iq(), &AL);
write_virtual_byte(i->seg(), i->Iq(), AL);
}
void BX_CPU_C::MOV_AXOq(bxInstruction_c *i)
@ -91,7 +91,7 @@ void BX_CPU_C::MOV_AXOq(bxInstruction_c *i)
void BX_CPU_C::MOV_OqAX(bxInstruction_c *i)
{
write_virtual_word(i->seg(), i->Iq(), &AX);
write_virtual_word(i->seg(), i->Iq(), AX);
}
void BX_CPU_C::MOV_EAXOq(bxInstruction_c *i)
@ -106,7 +106,7 @@ void BX_CPU_C::MOV_EAXOq(bxInstruction_c *i)
void BX_CPU_C::MOV_OqEAX(bxInstruction_c *i)
{
write_virtual_dword(i->seg(), i->Iq(), &EAX);
write_virtual_dword(i->seg(), i->Iq(), EAX);
}
void BX_CPU_C::MOV_RAXOq(bxInstruction_c *i)
@ -116,13 +116,13 @@ void BX_CPU_C::MOV_RAXOq(bxInstruction_c *i)
void BX_CPU_C::MOV_OqRAX(bxInstruction_c *i)
{
write_virtual_qword(i->seg(), i->Iq(), &RAX);
write_virtual_qword(i->seg(), i->Iq(), RAX);
}
void BX_CPU_C::MOV_EqIdM(bxInstruction_c *i)
{
Bit64u op_64 = (Bit32s) i->Id();
write_virtual_qword(i->seg(), RMAddr(i), &op_64);
write_virtual_qword(i->seg(), RMAddr(i), op_64);
}
void BX_CPU_C::MOV_EqIdR(bxInstruction_c *i)

8
bochs/cpu/data_xfer8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer8.cc,v 1.31 2007-11-21 22:36:01 sshwarts Exp $
// $Id: data_xfer8.cc,v 1.32 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -44,7 +44,7 @@ void BX_CPU_C::MOV_RHIb(bxInstruction_c *i)
void BX_CPU_C::MOV_EbGbM(bxInstruction_c *i)
{
write_virtual_byte(i->seg(), RMAddr(i), &BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL()));
write_virtual_byte(i->seg(), RMAddr(i), BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL()));
}
void BX_CPU_C::MOV_EbGbR(bxInstruction_c *i)
@ -71,13 +71,13 @@ void BX_CPU_C::MOV_ALOd(bxInstruction_c *i)
void BX_CPU_C::MOV_OdAL(bxInstruction_c *i)
{
write_virtual_byte(i->seg(), i->Id(), &AL);
write_virtual_byte(i->seg(), i->Id(), AL);
}
void BX_CPU_C::MOV_EbIbM(bxInstruction_c *i)
{
Bit8u op_8 = i->Ib();
write_virtual_byte(i->seg(), RMAddr(i), &op_8);
write_virtual_byte(i->seg(), RMAddr(i), op_8);
}
void BX_CPU_C::MOV_EbIbR(bxInstruction_c *i)

21
bochs/cpu/flag_ctrl.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: flag_ctrl.cc,v 1.32 2007-11-24 14:22:34 sshwarts Exp $
// $Id: flag_ctrl.cc,v 1.33 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2002 MandrakeSoft S.A.
@ -208,7 +208,7 @@ void BX_CPU_C::POPF_Fw(bxInstruction_c *i)
Bit16u flags16;
if (protected_mode()) {
pop_16(&flags16);
flags16 = pop_16();
if (CPL==0)
changeMask |= EFlagsIOPLMask;
if (CPL <= BX_CPU_THIS_PTR get_IOPL())
@ -222,7 +222,7 @@ void BX_CPU_C::POPF_Fw(bxInstruction_c *i)
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&flags16);
flags16 = pop_16();
#if BX_SUPPORT_VME
if (CR4_VME_ENABLED && BX_CPU_THIS_PTR get_IOPL() < 3) {
if (((flags16 & EFlagsIFMask) && BX_CPU_THIS_PTR get_VIP()) ||
@ -245,7 +245,7 @@ void BX_CPU_C::POPF_Fw(bxInstruction_c *i)
BX_CPU_THIS_PTR speculative_rsp = 0;
}
else {
pop_16(&flags16);
flags16 = pop_16();
// All non-reserved flags can be modified
changeMask |= (EFlagsIOPLMask | EFlagsIFMask);
}
@ -278,7 +278,7 @@ void BX_CPU_C::POPF_Fd(bxInstruction_c *i)
Bit32u flags32;
if (protected_mode()) {
pop_32(&flags32);
flags32 = pop_32();
// IOPL changed only if (CPL == 0),
// IF changed only if (CPL <= EFLAGS.IOPL),
// VIF, VIP, VM are unaffected
@ -292,12 +292,12 @@ void BX_CPU_C::POPF_Fd(bxInstruction_c *i)
BX_DEBUG(("POPFD: #GP(0) in v8086 mode"));
exception(BX_GP_EXCEPTION, 0, 0);
}
pop_32(&flags32);
flags32 = pop_32();
// v8086-mode: VM, IOPL, VIP, VIF are unaffected
changeMask |= EFlagsIFMask;
}
else { // Real-mode
pop_32(&flags32);
flags32 = pop_32();
// VIF, VIP, VM are unaffected
changeMask |= (EFlagsIOPLMask | EFlagsIFMask);
}
@ -319,19 +319,18 @@ void BX_CPU_C::POPF_Fq(bxInstruction_c *i)
Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | EFlagsDFMask
| EFlagsNTMask | EFlagsRFMask | EFlagsACMask
| EFlagsIDMask;
Bit64u flags64;
BX_ASSERT (protected_mode());
pop_64(&flags64);
Bit32u flags32 = (Bit32u) flags64;
Bit32u eflags = (Bit32u) pop_64();
if (CPL==0)
changeMask |= EFlagsIOPLMask;
if (CPL <= BX_CPU_THIS_PTR get_IOPL())
changeMask |= EFlagsIFMask;
// VIF, VIP, VM are unaffected
writeEFlags(flags32, changeMask);
writeEFlags(eflags, changeMask);
}
#endif

26
bochs/cpu/io.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: io.cc,v 1.44 2007-12-17 21:13:55 sshwarts Exp $
// $Id: io.cc,v 1.45 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -338,12 +338,12 @@ void BX_CPU_C::INSB_YbDX(bxInstruction_c *i)
if (i->as64L()) {
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_byte(BX_SEG_REG_ES, RDI, &value8);
write_virtual_byte(BX_SEG_REG_ES, RDI, value8);
value8 = BX_INP(DX, 1);
/* no seg override possible */
write_virtual_byte(BX_SEG_REG_ES, RDI, &value8);
write_virtual_byte(BX_SEG_REG_ES, RDI, value8);
if (BX_CPU_THIS_PTR get_DF())
RDI--;
@ -355,12 +355,12 @@ void BX_CPU_C::INSB_YbDX(bxInstruction_c *i)
if (i->as32L()) {
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
write_virtual_byte(BX_SEG_REG_ES, EDI, value8);
value8 = BX_INP(DX, 1);
/* no seg override possible */
write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
write_virtual_byte(BX_SEG_REG_ES, EDI, value8);
if (BX_CPU_THIS_PTR get_DF()) {
RDI = EDI - 1;
@ -372,12 +372,12 @@ void BX_CPU_C::INSB_YbDX(bxInstruction_c *i)
else {
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
write_virtual_byte(BX_SEG_REG_ES, DI, value8);
value8 = BX_INP(DX, 1);
/* no seg override possible */
write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
write_virtual_byte(BX_SEG_REG_ES, DI, value8);
if (BX_CPU_THIS_PTR get_DF())
DI--;
@ -399,12 +399,12 @@ void BX_CPU_C::INSW_YwDX(bxInstruction_c *i)
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_word(BX_SEG_REG_ES, rdi, &value16);
write_virtual_word(BX_SEG_REG_ES, rdi, value16);
value16 = BX_INP(DX, 2);
/* no seg override allowed */
write_virtual_word(BX_SEG_REG_ES, rdi, &value16);
write_virtual_word(BX_SEG_REG_ES, rdi, value16);
if (BX_CPU_THIS_PTR get_DF())
rdi -= 2;
@ -458,12 +458,12 @@ void BX_CPU_C::INSW_YwDX(bxInstruction_c *i)
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_word(BX_SEG_REG_ES, rdi, &value16);
write_virtual_word(BX_SEG_REG_ES, rdi, value16);
value16 = BX_INP(DX, 2);
/* no seg override allowed */
write_virtual_word(BX_SEG_REG_ES, rdi, &value16);
write_virtual_word(BX_SEG_REG_ES, rdi, value16);
#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
doIncr:
@ -508,12 +508,12 @@ void BX_CPU_C::INSD_YdDX(bxInstruction_c *i)
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_dword(BX_SEG_REG_ES, rdi, &value32);
write_virtual_dword(BX_SEG_REG_ES, rdi, value32);
value32 = BX_INP(DX, 4);
/* no seg override allowed */
write_virtual_dword(BX_SEG_REG_ES, rdi, &value32);
write_virtual_dword(BX_SEG_REG_ES, rdi, value32);
#if BX_SUPPORT_X86_64
if (i->as64L()) {

10
bochs/cpu/mmx.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mmx.cc,v 1.66 2007-12-19 23:21:11 sshwarts Exp $
// $Id: mmx.cc,v 1.67 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2002 Stanislav Shwartsman
@ -1203,7 +1203,7 @@ void BX_CPU_C::MOVD_EdPd(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->rm(), MMXUD0(op));
}
else {
write_virtual_dword(i->seg(), RMAddr(i), &(MMXUD0(op)));
write_virtual_dword(i->seg(), RMAddr(i), MMXUD0(op));
}
#else
@ -1226,7 +1226,7 @@ void BX_CPU_C::MOVQ_EqPq(bxInstruction_c *i)
BX_WRITE_64BIT_REG(i->rm(), MMXUQ(op));
}
else {
write_virtual_qword(i->seg(), RMAddr(i), &(MMXUQ(op)));
write_virtual_qword(i->seg(), RMAddr(i), MMXUQ(op));
}
}
@ -1245,7 +1245,7 @@ void BX_CPU_C::MOVQ_QqPq(bxInstruction_c *i)
BX_WRITE_MMX_REG(i->rm(), op);
}
else {
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &op);
write_virtual_qword(i->seg(), RMAddr(i), MMXUQ(op));
}
#else
BX_INFO(("MOVQ_QqPq: required MMX, use --enable-mmx option"));
@ -1973,7 +1973,7 @@ void BX_CPU_C::MOVNTQ_MqPq(bxInstruction_c *i)
#if BX_SUPPORT_3DNOW || BX_SUPPORT_SSE >= 1
BX_CPU_THIS_PTR prepareMMX();
BxPackedMmxRegister reg = BX_READ_MMX_REG(i->nnn());
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &reg);
write_virtual_qword(i->seg(), RMAddr(i), MMXUQ(reg));
#else
BX_INFO(("MOVNTQ_MqPq: required SSE or 3DNOW, use --enable-sse or --enable-3dnow options"));
UndefinedOpcode(i);

4
bochs/cpu/proc_ctrl.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: proc_ctrl.cc,v 1.190 2007-12-16 21:03:46 sshwarts Exp $
// $Id: proc_ctrl.cc,v 1.191 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -870,7 +870,7 @@ void BX_CPU_C::SMSW_Ew(bxInstruction_c *i)
}
}
else {
write_virtual_word(i->seg(), RMAddr(i), &msw);
write_virtual_word(i->seg(), RMAddr(i), msw);
}
}
#endif

22
bochs/cpu/protect_ctrl.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: protect_ctrl.cc,v 1.66 2007-11-22 21:52:55 sshwarts Exp $
// $Id: protect_ctrl.cc,v 1.67 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -272,7 +272,7 @@ void BX_CPU_C::SLDT_Ew(bxInstruction_c *i)
}
}
else {
write_virtual_word(i->seg(), RMAddr(i), &val16);
write_virtual_word(i->seg(), RMAddr(i), val16);
}
}
@ -293,7 +293,7 @@ void BX_CPU_C::STR_Ew(bxInstruction_c *i)
}
}
else {
write_virtual_word(i->seg(), RMAddr(i), &val16);
write_virtual_word(i->seg(), RMAddr(i), val16);
}
}
@ -629,8 +629,8 @@ void BX_CPU_C::SGDT_Ms(bxInstruction_c *i)
Bit16u limit_16 = BX_CPU_THIS_PTR gdtr.limit;
Bit32u base_32 = BX_CPU_THIS_PTR gdtr.base;
write_virtual_word(i->seg(), RMAddr(i), &limit_16);
write_virtual_dword(i->seg(), RMAddr(i)+2, &base_32);
write_virtual_word(i->seg(), RMAddr(i), limit_16);
write_virtual_dword(i->seg(), RMAddr(i)+2, base_32);
}
void BX_CPU_C::SIDT_Ms(bxInstruction_c *i)
@ -638,8 +638,8 @@ void BX_CPU_C::SIDT_Ms(bxInstruction_c *i)
Bit16u limit_16 = BX_CPU_THIS_PTR idtr.limit;
Bit32u base_32 = BX_CPU_THIS_PTR idtr.base;
write_virtual_word(i->seg(), RMAddr(i), &limit_16);
write_virtual_dword(i->seg(), RMAddr(i)+2, &base_32);
write_virtual_word(i->seg(), RMAddr(i), limit_16);
write_virtual_dword(i->seg(), RMAddr(i)+2, base_32);
}
void BX_CPU_C::LGDT_Ms(bxInstruction_c *i)
@ -721,8 +721,8 @@ void BX_CPU_C::SGDT64_Ms(bxInstruction_c *i)
Bit16u limit_16 = BX_CPU_THIS_PTR gdtr.limit;
Bit64u base_64 = BX_CPU_THIS_PTR gdtr.base;
write_virtual_word (i->seg(), RMAddr(i), &limit_16);
write_virtual_qword(i->seg(), RMAddr(i)+2, &base_64);
write_virtual_word (i->seg(), RMAddr(i), limit_16);
write_virtual_qword(i->seg(), RMAddr(i)+2, base_64);
}
void BX_CPU_C::SIDT64_Ms(bxInstruction_c *i)
@ -730,8 +730,8 @@ void BX_CPU_C::SIDT64_Ms(bxInstruction_c *i)
Bit16u limit_16 = BX_CPU_THIS_PTR idtr.limit;
Bit64u base_64 = BX_CPU_THIS_PTR idtr.base;
write_virtual_word(i->seg(), RMAddr(i), &limit_16);
write_virtual_qword(i->seg(), RMAddr(i)+2, &base_64);
write_virtual_word(i->seg(), RMAddr(i), limit_16);
write_virtual_qword(i->seg(), RMAddr(i)+2, base_64);
}
void BX_CPU_C::LGDT64_Ms(bxInstruction_c *i)

12
bochs/cpu/sse.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: sse.cc,v 1.51 2007-12-15 17:42:21 sshwarts Exp $
// $Id: sse.cc,v 1.52 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003 Stanislav Shwartsman
@ -1190,7 +1190,7 @@ void BX_CPU_C::PEXTRB_HbdUdqIb(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->nnn(), result);
}
else {
write_virtual_byte(i->seg(), RMAddr(i), &result);
write_virtual_byte(i->seg(), RMAddr(i), result);
}
#else
BX_INFO(("PEXTRB_HbdUdqIb: required SSE4, use --enable-sse option"));
@ -1212,7 +1212,7 @@ void BX_CPU_C::PEXTRW_HwdUdqIb(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->nnn(), result);
}
else {
write_virtual_word(i->seg(), RMAddr(i), &result);
write_virtual_word(i->seg(), RMAddr(i), result);
}
#else
BX_INFO(("PEXTRW_HwdUdqIb: required SSE4, use --enable-sse option"));
@ -1238,7 +1238,7 @@ void BX_CPU_C::PEXTRD_HdUdqIb(bxInstruction_c *i)
BX_WRITE_64BIT_REG(i->nnn(), result);
}
else {
write_virtual_qword(i->seg(), RMAddr(i), &result);
write_virtual_qword(i->seg(), RMAddr(i), result);
}
}
else
@ -1251,7 +1251,7 @@ void BX_CPU_C::PEXTRD_HdUdqIb(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->nnn(), result);
}
else {
write_virtual_dword(i->seg(), RMAddr(i), &result);
write_virtual_dword(i->seg(), RMAddr(i), result);
}
}
#else
@ -1274,7 +1274,7 @@ void BX_CPU_C::EXTRACTPS_HdUpsIb(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->nnn(), result);
}
else {
write_virtual_dword(i->seg(), RMAddr(i), &result);
write_virtual_dword(i->seg(), RMAddr(i), result);
}
#else
BX_INFO(("EXTRACTPS_HdUpsIb: required SSE4, use --enable-sse option"));

30
bochs/cpu/sse_move.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: sse_move.cc,v 1.70 2007-12-18 21:41:44 sshwarts Exp $
// $Id: sse_move.cc,v 1.71 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003 Stanislav Shwartsman
@ -86,7 +86,7 @@ void BX_CPU_C::STMXCSR(bxInstruction_c *i)
BX_CPU_THIS_PTR prepareSSE();
Bit32u mxcsr = BX_MXCSR_REGISTER & MXCSR_MASK;
write_virtual_dword(i->seg(), RMAddr(i), &mxcsr);
write_virtual_dword(i->seg(), RMAddr(i), mxcsr);
#else
BX_INFO(("STMXCSR: required SSE, use --enable-sse option"));
UndefinedOpcode(i);
@ -537,7 +537,7 @@ void BX_CPU_C::MOVSS_WssVss(bxInstruction_c *i)
}
else {
/* pointer, segment address pair */
write_virtual_dword(i->seg(), RMAddr(i), &val32);
write_virtual_dword(i->seg(), RMAddr(i), val32);
}
#else
BX_INFO(("MOVSS_WssVss: required SSE, use --enable-sse option"));
@ -596,7 +596,7 @@ void BX_CPU_C::MOVSD_WsdVsd(bxInstruction_c *i)
}
else {
/* pointer, segment address pair */
write_virtual_qword(i->seg(), RMAddr(i), &val64);
write_virtual_qword(i->seg(), RMAddr(i), val64);
}
#else
BX_INFO(("MOVSD_WsdVsd: required SSE2, use --enable-sse option"));
@ -721,7 +721,7 @@ void BX_CPU_C::MOVLPS_MqVps(bxInstruction_c *i)
{
#if BX_SUPPORT_SSE >= 1
BX_CPU_THIS_PTR prepareSSE();
write_virtual_qword(i->seg(), RMAddr(i), &BX_XMM_REG_LO_QWORD(i->nnn()));
write_virtual_qword(i->seg(), RMAddr(i), BX_XMM_REG_LO_QWORD(i->nnn()));
#else
BX_INFO(("MOVLPS_MqVps: required SSE, use --enable-sse option"));
UndefinedOpcode(i);
@ -759,7 +759,7 @@ void BX_CPU_C::MOVHPS_MqVps(bxInstruction_c *i)
{
#if BX_SUPPORT_SSE >= 1
BX_CPU_THIS_PTR prepareSSE();
write_virtual_qword(i->seg(), RMAddr(i), &BX_XMM_REG_HI_QWORD(i->nnn()));
write_virtual_qword(i->seg(), RMAddr(i), BX_XMM_REG_HI_QWORD(i->nnn()));
#else
BX_INFO(("MOVHPS_MqVps: required SSE, use --enable-sse option"));
UndefinedOpcode(i);
@ -811,7 +811,7 @@ void BX_CPU_C::MASKMOVDQU_VdqUdq(bxInstruction_c *i)
for(unsigned j=0; j<16; j++)
{
if(mask.xmmubyte(j) & 0x80)
write_virtual_byte(BX_SEG_REG_DS, rdi+j, &op.xmmubyte(j));
write_virtual_byte(BX_SEG_REG_DS, rdi+j, op.xmmubyte(j));
}
#else
@ -936,7 +936,7 @@ void BX_CPU_C::MOVD_EdVd(bxInstruction_c *i)
}
else {
/* pointer, segment address pair */
write_virtual_dword(i->seg(), RMAddr(i), &op2);
write_virtual_dword(i->seg(), RMAddr(i), op2);
}
#else
BX_INFO(("MOVD_EdVd: required SSE2, use --enable-sse option"));
@ -960,7 +960,7 @@ void BX_CPU_C::MOVQ_EqVq(bxInstruction_c *i)
}
else {
/* pointer, segment address pair */
write_virtual_qword(i->seg(), RMAddr(i), &op2);
write_virtual_qword(i->seg(), RMAddr(i), op2);
}
#else
BX_INFO(("MOVQ_EqVq: required SSE2, use --enable-sse option"));
@ -1013,7 +1013,7 @@ void BX_CPU_C::MOVQ_WqVq(bxInstruction_c *i)
BX_WRITE_XMM_REG(i->rm(), op);
}
else {
write_virtual_qword(i->seg(), RMAddr(i), &(op.xmm64u(0)));
write_virtual_qword(i->seg(), RMAddr(i), op.xmm64u(0));
}
#else
BX_INFO(("MOVQ_WqVq: required SSE2, use --enable-sse option"));
@ -1101,8 +1101,7 @@ void BX_CPU_C::PMOVMSKB_GdUdq(bxInstruction_c *i)
void BX_CPU_C::MOVNTI_MdGd(bxInstruction_c *i)
{
#if BX_SUPPORT_SSE >= 2
Bit32u val32 = BX_READ_32BIT_REG(i->nnn());
write_virtual_dword(i->seg(), RMAddr(i), &val32);
write_virtual_dword(i->seg(), RMAddr(i), BX_READ_32BIT_REG(i->nnn()));
#else
BX_INFO(("MOVNTI_MdGd: required SSE2, use --enable-sse option"));
UndefinedOpcode(i);
@ -1115,8 +1114,7 @@ void BX_CPU_C::MOVNTI_MdGd(bxInstruction_c *i)
void BX_CPU_C::MOVNTI_MqGq(bxInstruction_c *i)
{
#if BX_SUPPORT_SSE >= 2
Bit64u val64 = BX_READ_64BIT_REG(i->nnn());
write_virtual_qword(i->seg(), RMAddr(i), &val64);
write_virtual_qword(i->seg(), RMAddr(i), BX_READ_64BIT_REG(i->nnn()));
#else
BX_INFO(("MOVNTI_MqGq: required SSE2, use --enable-sse option"));
UndefinedOpcode(i);
@ -1144,7 +1142,7 @@ void BX_CPU_C::MOVNTSD_MsdVsd(bxInstruction_c *i)
{
#if BX_SUPPORT_SSE4A
BX_CPU_THIS_PTR prepareSSE();
write_virtual_dword(i->seg(), RMAddr(i), &BX_READ_XMM_REG_LO_QWORD(i->nnn()));
write_virtual_dword(i->seg(), RMAddr(i), BX_READ_XMM_REG_LO_QWORD(i->nnn()));
#else
BX_INFO(("MOVNTSD_MsdVsd: required SSE4A, use --enable-sse4a option"));
UndefinedOpcode(i);
@ -1156,7 +1154,7 @@ void BX_CPU_C::MOVNTSS_MssVss(bxInstruction_c *i)
{
#if BX_SUPPORT_SSE4A
BX_CPU_THIS_PTR prepareSSE();
write_virtual_dword(i->seg(), RMAddr(i), &BX_READ_XMM_REG_LO_DWORD(i->nnn()));
write_virtual_dword(i->seg(), RMAddr(i), BX_READ_XMM_REG_LO_DWORD(i->nnn()));
#else
BX_INFO(("MOVNTSS_MssVss: required SSE4A, use --enable-sse4a option"));
UndefinedOpcode(i);

69
bochs/cpu/stack16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: stack16.cc,v 1.27 2007-11-24 14:22:34 sshwarts Exp $
// $Id: stack16.cc,v 1.28 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -23,6 +23,7 @@
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
/////////////////////////////////////////////////////////////////////////
#define NEED_CPU_REG_SHORTCUTS 1
@ -72,12 +73,10 @@ void BX_CPU_C::PUSH16_SS(bxInstruction_c *i)
void BX_CPU_C::POP16_DS(bxInstruction_c *i)
{
Bit16u ds;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&ds);
Bit16u ds = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -86,12 +85,10 @@ void BX_CPU_C::POP16_DS(bxInstruction_c *i)
void BX_CPU_C::POP16_ES(bxInstruction_c *i)
{
Bit16u es;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&es);
Bit16u es = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -99,12 +96,10 @@ void BX_CPU_C::POP16_ES(bxInstruction_c *i)
void BX_CPU_C::POP16_FS(bxInstruction_c *i)
{
Bit16u fs;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&fs);
Bit16u fs = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -112,12 +107,10 @@ void BX_CPU_C::POP16_FS(bxInstruction_c *i)
void BX_CPU_C::POP16_GS(bxInstruction_c *i)
{
Bit16u gs;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&gs);
Bit16u gs = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -125,12 +118,10 @@ void BX_CPU_C::POP16_GS(bxInstruction_c *i)
void BX_CPU_C::POP16_SS(bxInstruction_c *i)
{
Bit16u ss;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&ss);
Bit16u ss = pop_16();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -146,19 +137,15 @@ void BX_CPU_C::POP16_SS(bxInstruction_c *i)
void BX_CPU_C::POP_RX(bxInstruction_c *i)
{
Bit16u rx;
pop_16(&rx);
BX_WRITE_16BIT_REG(i->opcodeReg(), rx)
BX_WRITE_16BIT_REG(i->opcodeReg(), pop_16());
}
void BX_CPU_C::POP_EwM(bxInstruction_c *i)
{
Bit16u val16;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_16(&val16);
Bit16u val16 = pop_16();
// Note: there is one little weirdism here. It is possible to use
// SP in the modrm addressing. If used, the value of SP after the
@ -166,16 +153,14 @@ void BX_CPU_C::POP_EwM(bxInstruction_c *i)
if (i->rm()==4 && i->sibBase()==4) {
BX_CPU_CALL_METHODR (i->ResolveModrm, (i));
}
write_virtual_word(i->seg(), RMAddr(i), &val16);
write_virtual_word(i->seg(), RMAddr(i), val16);
BX_CPU_THIS_PTR speculative_rsp = 0;
}
void BX_CPU_C::POP_EwR(bxInstruction_c *i)
{
Bit16u val16;
pop_16(&val16);
BX_WRITE_16BIT_REG(i->rm(), val16);
BX_WRITE_16BIT_REG(i->rm(), pop_16());
}
void BX_CPU_C::PUSH_Iw(bxInstruction_c *i)
@ -206,26 +191,26 @@ void BX_CPU_C::PUSHAD16(bxInstruction_c *i)
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
{
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 2), &AX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 4), &CX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 6), &DX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 8), &BX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 10), &temp_SP);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 12), &BP);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 14), &SI);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 16), &DI);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 2), AX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 4), CX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 6), DX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 8), BX);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 10), temp_SP);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 12), BP);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 14), SI);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 16), DI);
ESP -= 16;
}
else
{
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 2), &AX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 4), &CX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 6), &DX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 8), &BX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 10), &temp_SP);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 12), &BP);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 14), &SI);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 16), &DI);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 2), AX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 4), CX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 6), DX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 8), BX);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 10), temp_SP);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 12), BP);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 14), SI);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (temp_SP - 16), DI);
SP -= 16;
}
}

77
bochs/cpu/stack32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: stack32.cc,v 1.42 2007-11-30 08:49:12 sshwarts Exp $
// $Id: stack32.cc,v 1.43 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -23,6 +23,7 @@
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
/////////////////////////////////////////////////////////////////////////
#define NEED_CPU_REG_SHORTCUTS 1
@ -37,12 +38,10 @@
void BX_CPU_C::POP_EdM(bxInstruction_c *i)
{
Bit32u val32;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_32(&val32);
Bit32u val32 = pop_32();
// Note: there is one little weirdism here. It is possible to use
// ESP in the modrm addressing. If used, the value of ESP after the
@ -51,16 +50,14 @@ void BX_CPU_C::POP_EdM(bxInstruction_c *i)
// call method on BX_CPU_C object
BX_CPU_CALL_METHODR (i->ResolveModrm, (i));
}
write_virtual_dword(i->seg(), RMAddr(i), &val32);
write_virtual_dword(i->seg(), RMAddr(i), val32);
BX_CPU_THIS_PTR speculative_rsp = 0;
}
void BX_CPU_C::POP_EdR(bxInstruction_c *i)
{
Bit32u val32;
pop_32(&val32);
BX_WRITE_32BIT_REGZ(i->rm(), val32);
BX_WRITE_32BIT_REGZ(i->rm(), pop_32());
}
void BX_CPU_C::PUSH_ERX(bxInstruction_c *i)
@ -70,9 +67,7 @@ void BX_CPU_C::PUSH_ERX(bxInstruction_c *i)
void BX_CPU_C::POP_ERX(bxInstruction_c *i)
{
Bit32u erx;
pop_32(&erx);
BX_WRITE_32BIT_REGZ(i->opcodeReg(), erx)
BX_WRITE_32BIT_REGZ(i->opcodeReg(), pop_32());
}
void BX_CPU_C::PUSH32_CS(bxInstruction_c *i)
@ -107,12 +102,10 @@ void BX_CPU_C::PUSH32_SS(bxInstruction_c *i)
void BX_CPU_C::POP32_DS(bxInstruction_c *i)
{
Bit32u ds;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_32(&ds);
Bit32u ds = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], (Bit16u) ds);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -120,12 +113,10 @@ void BX_CPU_C::POP32_DS(bxInstruction_c *i)
void BX_CPU_C::POP32_ES(bxInstruction_c *i)
{
Bit32u es;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_32(&es);
Bit32u es = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], (Bit16u) es);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -133,12 +124,10 @@ void BX_CPU_C::POP32_ES(bxInstruction_c *i)
void BX_CPU_C::POP32_FS(bxInstruction_c *i)
{
Bit32u fs;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_32(&fs);
Bit32u fs = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], (Bit16u) fs);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -146,12 +135,10 @@ void BX_CPU_C::POP32_FS(bxInstruction_c *i)
void BX_CPU_C::POP32_GS(bxInstruction_c *i)
{
Bit32u gs;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_32(&gs);
Bit32u gs = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], (Bit16u) gs);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -159,12 +146,10 @@ void BX_CPU_C::POP32_GS(bxInstruction_c *i)
void BX_CPU_C::POP32_SS(bxInstruction_c *i)
{
Bit32u ss;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_32(&ss);
Bit32u ss = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], (Bit16u) ss);
BX_CPU_THIS_PTR speculative_rsp = 0;
@ -205,26 +190,26 @@ void BX_CPU_C::PUSHAD32(bxInstruction_c *i)
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
{
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 4), &EAX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 8), &ECX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 12), &EDX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 16), &EBX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 20), &temp_ESP);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 24), &EBP);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 28), &ESI);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 32), &EDI);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 4), EAX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 8), ECX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 12), EDX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 16), EBX);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 20), temp_ESP);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 24), EBP);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 28), ESI);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (temp_ESP - 32), EDI);
ESP -= 32;
}
else
{
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 4), &EAX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 8), &ECX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 12), &EDX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 16), &EBX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 20), &temp_ESP);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 24), &EBP);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 28), &ESI);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 32), &EDI);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 4), EAX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 8), ECX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 12), EDX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 16), EBX);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 20), temp_ESP);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 24), EBP);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 28), ESI);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (temp_SP - 32), EDI);
SP -= 32;
}
}
@ -418,16 +403,12 @@ void BX_CPU_C::LEAVE(bxInstruction_c *i)
// restore frame pointer
#if BX_CPU_LEVEL >= 3
if (i->os32L()) {
Bit32u temp32;
pop_32(&temp32);
EBP = temp32;
EBP = pop_32();
}
else
#endif
{
Bit16u temp16;
pop_16(&temp16);
BP = temp16;
BP = pop_16();
}
BX_CPU_THIS_PTR speculative_rsp = 0;

20
bochs/cpu/stack64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: stack64.cc,v 1.30 2007-11-24 15:27:55 sshwarts Exp $
// $Id: stack64.cc,v 1.31 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -34,12 +34,10 @@
void BX_CPU_C::POP_EqM(bxInstruction_c *i)
{
Bit64u val64;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;
pop_64(&val64);
Bit64u val64 = pop_64();
// Note: there is one little weirdism here. It is possible to use
// RSP in the modrm addressing. If used, the value of RSP after the
@ -48,16 +46,14 @@ void BX_CPU_C::POP_EqM(bxInstruction_c *i)
// call method on BX_CPU_C object
BX_CPU_CALL_METHODR (i->ResolveModrm, (i));
}
write_virtual_qword(i->seg(), RMAddr(i), &val64);
write_virtual_qword(i->seg(), RMAddr(i), val64);
BX_CPU_THIS_PTR speculative_rsp = 0;
}
void BX_CPU_C::POP_EqR(bxInstruction_c *i)
{
Bit64u val64;
pop_64(&val64);
BX_WRITE_64BIT_REG(i->rm(), val64);
BX_WRITE_64BIT_REG(i->rm(), pop_64());
}
void BX_CPU_C::PUSH_RRX(bxInstruction_c *i)
@ -67,9 +63,7 @@ void BX_CPU_C::PUSH_RRX(bxInstruction_c *i)
void BX_CPU_C::POP_RRX(bxInstruction_c *i)
{
Bit64u rrx;
pop_64(&rrx);
BX_WRITE_64BIT_REG(i->opcodeReg(), rrx);
BX_WRITE_64BIT_REG(i->opcodeReg(), pop_64());
}
void BX_CPU_C::PUSH64_FS(bxInstruction_c *i)
@ -142,12 +136,12 @@ void BX_CPU_C::ENTER64_IwIb(bxInstruction_c *i)
RBP -= 8;
read_virtual_qword(BX_SEG_REG_SS, RBP, &temp64);
RSP -= 8;
write_virtual_qword(BX_SEG_REG_SS, RSP, &temp64);
write_virtual_qword(BX_SEG_REG_SS, RSP, temp64);
} /* while (--level) */
/* push(frame pointer) */
RSP -= 8;
write_virtual_qword(BX_SEG_REG_SS, RSP, &frame_ptr64);
write_virtual_qword(BX_SEG_REG_SS, RSP, frame_ptr64);
} /* if (level > 0) ... */
BX_CPU_THIS_PTR speculative_rsp = 0;

48
bochs/cpu/stack_pro.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: stack_pro.cc,v 1.36 2007-12-18 21:08:55 sshwarts Exp $
// $Id: stack_pro.cc,v 1.37 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -38,18 +38,18 @@ void BX_CPU_C::push_16(Bit16u value16)
#if BX_SUPPORT_X86_64
if (StackAddrSize64())
{
write_virtual_word(BX_SEG_REG_SS, RSP-2, &value16);
write_virtual_word(BX_SEG_REG_SS, RSP-2, value16);
RSP -= 2;
}
else
#endif
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* StackAddrSize = 32 */
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (ESP-2), &value16);
write_virtual_word(BX_SEG_REG_SS, (Bit32u) (ESP-2), value16);
ESP -= 2;
}
else
{
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (SP-2), &value16);
write_virtual_word(BX_SEG_REG_SS, (Bit16u) (SP-2), value16);
SP -= 2;
}
}
@ -61,18 +61,18 @@ void BX_CPU_C::push_32(Bit32u value32)
#if BX_SUPPORT_X86_64
if (StackAddrSize64())
{
write_virtual_dword(BX_SEG_REG_SS, RSP-4, &value32);
write_virtual_dword(BX_SEG_REG_SS, RSP-4, value32);
RSP -= 4;
}
else
#endif
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* StackAddrSize = 32 */
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (ESP-4), &value32);
write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (ESP-4), value32);
ESP -= 4;
}
else
{
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (SP-4), &value32);
write_virtual_dword(BX_SEG_REG_SS, (Bit16u) (SP-4), value32);
SP -= 4;
}
}
@ -83,59 +83,71 @@ void BX_CPU_C::push_64(Bit64u value64)
{
BX_ASSERT(StackAddrSize64());
write_virtual_qword(BX_SEG_REG_SS, RSP-8, &value64);
write_virtual_qword(BX_SEG_REG_SS, RSP-8, value64);
RSP -= 8;
}
#endif
/* pop 16 bit operand from the stack */
void BX_CPU_C::pop_16(Bit16u *value16_ptr)
Bit16u BX_CPU_C::pop_16(void)
{
Bit16u value16;
#if BX_SUPPORT_X86_64
if (StackAddrSize64()) {
read_virtual_word(BX_SEG_REG_SS, RSP, value16_ptr);
read_virtual_word(BX_SEG_REG_SS, RSP, &value16);
RSP += 2;
}
else
#endif
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
read_virtual_word(BX_SEG_REG_SS, ESP, value16_ptr);
read_virtual_word(BX_SEG_REG_SS, ESP, &value16);
ESP += 2;
}
else {
read_virtual_word(BX_SEG_REG_SS, SP, value16_ptr);
read_virtual_word(BX_SEG_REG_SS, SP, &value16);
SP += 2;
}
return value16;
}
/* pop 32 bit operand from the stack */
void BX_CPU_C::pop_32(Bit32u *value32_ptr)
Bit32u BX_CPU_C::pop_32()
{
Bit32u value32;
#if BX_SUPPORT_X86_64
if (StackAddrSize64()) {
read_virtual_dword(BX_SEG_REG_SS, RSP, value32_ptr);
read_virtual_dword(BX_SEG_REG_SS, RSP, &value32);
RSP += 4;
}
else
#endif
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
read_virtual_dword(BX_SEG_REG_SS, ESP, value32_ptr);
read_virtual_dword(BX_SEG_REG_SS, ESP, &value32);
ESP += 4;
}
else {
read_virtual_dword(BX_SEG_REG_SS, SP, value32_ptr);
read_virtual_dword(BX_SEG_REG_SS, SP, &value32);
SP += 4;
}
return value32;
}
/* pop 64 bit operand from the stack */
#if BX_SUPPORT_X86_64
void BX_CPU_C::pop_64(Bit64u *value64_ptr)
Bit64u BX_CPU_C::pop_64()
{
Bit64u value64;
BX_ASSERT(StackAddrSize64());
read_virtual_qword(BX_SEG_REG_SS, RSP, value64_ptr);
read_virtual_qword(BX_SEG_REG_SS, RSP, &value64);
RSP += 8;
return value64;
}
#endif

56
bochs/cpu/string.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: string.cc,v 1.46 2007-12-17 19:52:01 sshwarts Exp $
// $Id: string.cc,v 1.47 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -882,14 +882,14 @@ void BX_CPU_C::MOVSB16_XbYb(bxInstruction_c *i)
}
else {
read_virtual_byte(i->seg(), SI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, DI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, DI, temp8);
}
}
else
#endif
{
read_virtual_byte(i->seg(), SI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, DI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, DI, temp8);
}
if (BX_CPU_THIS_PTR get_DF()) {
@ -932,14 +932,14 @@ void BX_CPU_C::MOVSB32_XbYb(bxInstruction_c *i)
}
else {
read_virtual_byte(i->seg(), ESI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, EDI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, EDI, temp8);
}
}
else
#endif
{
read_virtual_byte(i->seg(), ESI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, EDI, &temp8);
write_virtual_byte(BX_SEG_REG_ES, EDI, temp8);
}
if (BX_CPU_THIS_PTR get_DF()) {
@ -962,7 +962,7 @@ void BX_CPU_C::MOVSB64_XbYb(bxInstruction_c *i)
Bit64u rdi = RDI;
read_virtual_byte(i->seg(), rsi, &temp8);
write_virtual_byte(BX_SEG_REG_ES, rdi, &temp8);
write_virtual_byte(BX_SEG_REG_ES, rdi, temp8);
if (BX_CPU_THIS_PTR get_DF()) {
/* decrement RSI, RDI */
@ -1012,14 +1012,14 @@ void BX_CPU_C::MOVSW16_XwYw(bxInstruction_c *i)
}
else {
read_virtual_word(i->seg(), si, &temp16);
write_virtual_word(BX_SEG_REG_ES, di, &temp16);
write_virtual_word(BX_SEG_REG_ES, di, temp16);
}
}
else
#endif
{
read_virtual_word(i->seg(), si, &temp16);
write_virtual_word(BX_SEG_REG_ES, di, &temp16);
write_virtual_word(BX_SEG_REG_ES, di, temp16);
}
if (BX_CPU_THIS_PTR get_DF()) {
@ -1046,7 +1046,7 @@ void BX_CPU_C::MOVSW32_XwYw(bxInstruction_c *i)
Bit32u edi = EDI;
read_virtual_word(i->seg(), esi, &temp16);
write_virtual_word(BX_SEG_REG_ES, edi, &temp16);
write_virtual_word(BX_SEG_REG_ES, edi, temp16);
if (BX_CPU_THIS_PTR get_DF()) {
esi -= 2;
@ -1072,7 +1072,7 @@ void BX_CPU_C::MOVSW64_XwYw(bxInstruction_c *i)
Bit64u rdi = RDI;
read_virtual_word(i->seg(), rsi, &temp16);
write_virtual_word(BX_SEG_REG_ES, rdi, &temp16);
write_virtual_word(BX_SEG_REG_ES, rdi, temp16);
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 2;
@ -1097,7 +1097,7 @@ void BX_CPU_C::MOVSD16_XdYd(bxInstruction_c *i)
Bit16u di = DI;
read_virtual_dword(i->seg(), si, &temp32);
write_virtual_dword(BX_SEG_REG_ES, di, &temp32);
write_virtual_dword(BX_SEG_REG_ES, di, temp32);
if (BX_CPU_THIS_PTR get_DF()) {
si -= 4;
@ -1144,14 +1144,14 @@ void BX_CPU_C::MOVSD32_XdYd(bxInstruction_c *i)
}
else {
read_virtual_dword(i->seg(), esi, &temp32);
write_virtual_dword(BX_SEG_REG_ES, edi, &temp32);
write_virtual_dword(BX_SEG_REG_ES, edi, temp32);
}
}
else
#endif
{
read_virtual_dword(i->seg(), esi, &temp32);
write_virtual_dword(BX_SEG_REG_ES, edi, &temp32);
write_virtual_dword(BX_SEG_REG_ES, edi, temp32);
}
if (BX_CPU_THIS_PTR get_DF()) {
@ -1179,7 +1179,7 @@ void BX_CPU_C::MOVSD64_XdYd(bxInstruction_c *i)
Bit64u rdi = RDI;
read_virtual_dword(i->seg(), rsi, &temp32);
write_virtual_dword(BX_SEG_REG_ES, rdi, &temp32);
write_virtual_dword(BX_SEG_REG_ES, rdi, temp32);
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 4;
@ -1203,7 +1203,7 @@ void BX_CPU_C::MOVSQ32_XqYq(bxInstruction_c *i)
Bit32u edi = EDI;
read_virtual_qword(i->seg(), esi, &temp64);
write_virtual_qword(BX_SEG_REG_ES, edi, &temp64);
write_virtual_qword(BX_SEG_REG_ES, edi, temp64);
if (BX_CPU_THIS_PTR get_DF()) {
esi -= 8;
@ -1228,7 +1228,7 @@ void BX_CPU_C::MOVSQ64_XqYq(bxInstruction_c *i)
Bit64u rdi = RDI;
read_virtual_qword(i->seg(), rsi, &temp64);
write_virtual_qword(BX_SEG_REG_ES, rdi, &temp64);
write_virtual_qword(BX_SEG_REG_ES, rdi, temp64);
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 8;
@ -2007,7 +2007,7 @@ void BX_CPU_C::STOSB16_YbAL(bxInstruction_c *i)
Bit16u di = DI;
write_virtual_byte(BX_SEG_REG_ES, di, &al);
write_virtual_byte(BX_SEG_REG_ES, di, al);
if (BX_CPU_THIS_PTR get_DF()) {
di--;
@ -2049,13 +2049,13 @@ void BX_CPU_C::STOSB32_YbAL(bxInstruction_c *i)
incr = byteCount;
}
else {
write_virtual_byte(BX_SEG_REG_ES, edi, &al);
write_virtual_byte(BX_SEG_REG_ES, edi, al);
}
}
else
#endif
{
write_virtual_byte(BX_SEG_REG_ES, edi, &al);
write_virtual_byte(BX_SEG_REG_ES, edi, al);
}
if (BX_CPU_THIS_PTR get_DF()) {
@ -2077,7 +2077,7 @@ void BX_CPU_C::STOSB64_YbAL(bxInstruction_c *i)
Bit64u rdi = RDI;
write_virtual_byte(BX_SEG_REG_ES, rdi, &al);
write_virtual_byte(BX_SEG_REG_ES, rdi, al);
if (BX_CPU_THIS_PTR get_DF()) {
rdi--;
@ -2096,7 +2096,7 @@ void BX_CPU_C::STOSW16_YwAX(bxInstruction_c *i)
Bit16u ax = AX;
Bit16u di = DI;
write_virtual_word(BX_SEG_REG_ES, di, &ax);
write_virtual_word(BX_SEG_REG_ES, di, ax);
if (BX_CPU_THIS_PTR get_DF()) {
di -= 2;
@ -2115,7 +2115,7 @@ void BX_CPU_C::STOSW32_YwAX(bxInstruction_c *i)
Bit32u edi = EDI;
write_virtual_word(BX_SEG_REG_ES, edi, &ax);
write_virtual_word(BX_SEG_REG_ES, edi, ax);
if (BX_CPU_THIS_PTR get_DF()) {
edi -= 2;
@ -2136,7 +2136,7 @@ void BX_CPU_C::STOSW64_YwAX(bxInstruction_c *i)
Bit64u rdi = RDI;
write_virtual_word(BX_SEG_REG_ES, rdi, &ax);
write_virtual_word(BX_SEG_REG_ES, rdi, ax);
if (BX_CPU_THIS_PTR get_DF()) {
rdi -= 2;
@ -2156,7 +2156,7 @@ void BX_CPU_C::STOSD16_YdEAX(bxInstruction_c *i)
Bit16u di = DI;
write_virtual_dword(BX_SEG_REG_ES, di, &eax);
write_virtual_dword(BX_SEG_REG_ES, di, eax);
if (BX_CPU_THIS_PTR get_DF()) {
di -= 4;
@ -2174,7 +2174,7 @@ void BX_CPU_C::STOSD32_YdEAX(bxInstruction_c *i)
Bit32u eax = EAX;
Bit32u edi = EDI;
write_virtual_dword(BX_SEG_REG_ES, edi, &eax);
write_virtual_dword(BX_SEG_REG_ES, edi, eax);
if (BX_CPU_THIS_PTR get_DF()) {
edi -= 4;
@ -2196,7 +2196,7 @@ void BX_CPU_C::STOSD64_YdEAX(bxInstruction_c *i)
Bit64u rdi = RDI;
write_virtual_dword(BX_SEG_REG_ES, rdi, &eax);
write_virtual_dword(BX_SEG_REG_ES, rdi, eax);
if (BX_CPU_THIS_PTR get_DF()) {
rdi -= 4;
@ -2215,7 +2215,7 @@ void BX_CPU_C::STOSQ32_YqRAX(bxInstruction_c *i)
Bit32u edi = EDI;
write_virtual_qword(BX_SEG_REG_ES, edi, &rax);
write_virtual_qword(BX_SEG_REG_ES, edi, rax);
if (BX_CPU_THIS_PTR get_DF()) {
edi -= 8;
@ -2234,7 +2234,7 @@ void BX_CPU_C::STOSQ64_YqRAX(bxInstruction_c *i)
Bit64u rax = RAX;
Bit64u rdi = RDI;
write_virtual_qword(BX_SEG_REG_ES, rdi, &rax);
write_virtual_qword(BX_SEG_REG_ES, rdi, rax);
if (BX_CPU_THIS_PTR get_DF()) {
rdi -= 8;

14
bochs/cpu/vm8086.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: vm8086.cc,v 1.32 2007-12-16 21:46:39 sshwarts Exp $
// $Id: vm8086.cc,v 1.33 2007-12-20 18:29:38 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -132,9 +132,9 @@ void BX_CPU_C::iret16_stack_return_from_v86(bxInstruction_c *i)
exception(BX_SS_EXCEPTION, 0, 0);
}
pop_16(&ip);
pop_16(&cs_raw);
pop_16(&flags16);
ip = pop_16();
cs_raw = pop_16();
flags16 = pop_16();
#if BX_SUPPORT_VME
if (CR4_VME_ENABLED && BX_CPU_THIS_PTR get_IOPL() < 3)
@ -189,9 +189,9 @@ void BX_CPU_C::iret32_stack_return_from_v86(bxInstruction_c *i)
exception(BX_SS_EXCEPTION, 0, 0);
}
pop_32(&eip);
pop_32(&cs_raw);
pop_32(&flags32);
eip = pop_32();
cs_raw = pop_32();
flags32 = pop_32();
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) cs_raw);
RIP = eip;

62
bochs/fpu/fpu.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fpu.cc,v 1.27 2007-11-24 14:22:34 sshwarts Exp $
// $Id: fpu.cc,v 1.28 2007-12-20 18:29:39 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003 Stanislav Shwartsman
@ -90,20 +90,20 @@ int BX_CPU_C::fpu_save_environment(bxInstruction_c *i)
Bit32u tmp;
tmp = 0xffff0000 | BX_CPU_THIS_PTR the_i387.get_control_word();
write_virtual_dword(i->seg(), RMAddr(i), &tmp);
write_virtual_dword(i->seg(), RMAddr(i), tmp);
tmp = 0xffff0000 | BX_CPU_THIS_PTR the_i387.get_status_word();
write_virtual_dword(i->seg(), RMAddr(i) + 0x04, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x04, tmp);
tmp = 0xffff0000 | BX_CPU_THIS_PTR the_i387.get_tag_word();
write_virtual_dword(i->seg(), RMAddr(i) + 0x08, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x08, tmp);
tmp = (BX_CPU_THIS_PTR the_i387.fip) & 0xffffffff;
write_virtual_dword(i->seg(), RMAddr(i) + 0x0c, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x0c, tmp);
tmp = (BX_CPU_THIS_PTR the_i387.fcs & 0xffff) |
((Bit32u)(BX_CPU_THIS_PTR the_i387.foo)) << 16;
write_virtual_dword(i->seg(), RMAddr(i) + 0x10, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x10, tmp);
tmp = (BX_CPU_THIS_PTR the_i387.fdp) & 0xffffffff;
write_virtual_dword(i->seg(), RMAddr(i) + 0x14, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x14, tmp);
tmp = 0xffff0000 | (BX_CPU_THIS_PTR the_i387.fds);
write_virtual_dword(i->seg(), RMAddr(i) + 0x18, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x18, tmp);
return 0x1c;
}
@ -112,19 +112,19 @@ int BX_CPU_C::fpu_save_environment(bxInstruction_c *i)
Bit16u tmp;
tmp = BX_CPU_THIS_PTR the_i387.get_control_word();
write_virtual_word(i->seg(), RMAddr(i), &tmp);
write_virtual_word(i->seg(), RMAddr(i), tmp);
tmp = BX_CPU_THIS_PTR the_i387.get_status_word();
write_virtual_word(i->seg(), RMAddr(i) + 0x02, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x02, tmp);
tmp = BX_CPU_THIS_PTR the_i387.get_tag_word();
write_virtual_word(i->seg(), RMAddr(i) + 0x04, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x04, tmp);
tmp = (BX_CPU_THIS_PTR the_i387.fip) & 0xffff;
write_virtual_word(i->seg(), RMAddr(i) + 0x06, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x06, tmp);
tmp = (BX_CPU_THIS_PTR the_i387.fcs);
write_virtual_word(i->seg(), RMAddr(i) + 0x08, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x08, tmp);
tmp = (BX_CPU_THIS_PTR the_i387.fdp) & 0xffff;
write_virtual_word(i->seg(), RMAddr(i) + 0x0a, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x0a, tmp);
tmp = (BX_CPU_THIS_PTR the_i387.fds);
write_virtual_word(i->seg(), RMAddr(i) + 0x0c, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x0c, tmp);
return 0x0e;
}
@ -141,20 +141,20 @@ int BX_CPU_C::fpu_save_environment(bxInstruction_c *i)
Bit32u tmp;
tmp = 0xffff0000 | BX_CPU_THIS_PTR the_i387.get_control_word();
write_virtual_dword(i->seg(), RMAddr(i), &tmp);
write_virtual_dword(i->seg(), RMAddr(i), tmp);
tmp = 0xffff0000 | BX_CPU_THIS_PTR the_i387.get_status_word();
write_virtual_dword(i->seg(), RMAddr(i) + 0x04, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x04, tmp);
tmp = 0xffff0000 | BX_CPU_THIS_PTR the_i387.get_tag_word();
write_virtual_dword(i->seg(), RMAddr(i) + 0x08, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x08, tmp);
tmp = 0xffff0000 | (fp_ip & 0xffff);
write_virtual_dword(i->seg(), RMAddr(i) + 0x0c, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x0c, tmp);
tmp = ((fp_ip & 0xffff0000) >> 4) |
(BX_CPU_THIS_PTR the_i387.foo & 0x7ff);
write_virtual_dword(i->seg(), RMAddr(i) + 0x10, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x10, tmp);
tmp = 0xffff0000 | (fp_dp & 0xffff);
write_virtual_dword(i->seg(), RMAddr(i) + 0x14, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x14, tmp);
tmp = (fp_dp & 0xffff0000) >> 4;
write_virtual_dword(i->seg(), RMAddr(i) + 0x18, &tmp);
write_virtual_dword(i->seg(), RMAddr(i) + 0x18, tmp);
return 0x1c;
}
@ -163,20 +163,20 @@ int BX_CPU_C::fpu_save_environment(bxInstruction_c *i)
Bit16u tmp;
tmp = BX_CPU_THIS_PTR the_i387.get_control_word();
write_virtual_word(i->seg(), RMAddr(i), &tmp);
write_virtual_word(i->seg(), RMAddr(i), tmp);
tmp = BX_CPU_THIS_PTR the_i387.get_status_word();
write_virtual_word(i->seg(), RMAddr(i) + 0x02, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x02, tmp);
tmp = BX_CPU_THIS_PTR the_i387.get_tag_word();
write_virtual_word(i->seg(), RMAddr(i) + 0x04, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x04, tmp);
tmp = fp_ip & 0xffff;
write_virtual_word(i->seg(), RMAddr(i) + 0x06, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x06, tmp);
tmp = (Bit16u)(((fp_ip & 0xf0000) >> 4) |
(BX_CPU_THIS_PTR the_i387.foo & 0x7ff));
write_virtual_word(i->seg(), RMAddr(i) + 0x08, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x08, tmp);
tmp = fp_dp & 0xffff;
write_virtual_word(i->seg(), RMAddr(i) + 0x0a, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x0a, tmp);
tmp = (Bit16u)((fp_dp & 0xf0000) >> 4);
write_virtual_word(i->seg(), RMAddr(i) + 0x0c, &tmp);
write_virtual_word(i->seg(), RMAddr(i) + 0x0c, tmp);
return 0x0e;
}
@ -340,7 +340,7 @@ void BX_CPU_C::FNSTCW(bxInstruction_c *i)
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
Bit16u cwd = BX_CPU_THIS_PTR the_i387.get_control_word();
write_virtual_word(i->seg(), RMAddr(i), &cwd);
write_virtual_word(i->seg(), RMAddr(i), cwd);
#else
BX_INFO(("FNSTCW: required FPU, configure --enable-fpu"));
#endif
@ -352,7 +352,7 @@ void BX_CPU_C::FNSTSW(bxInstruction_c *i)
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
Bit16u swd = BX_CPU_THIS_PTR the_i387.get_status_word();
write_virtual_word(i->seg(), RMAddr(i), &swd);
write_virtual_word(i->seg(), RMAddr(i), swd);
#else
BX_INFO(("FNSTSW: required FPU, configure --enable-fpu"));
#endif

22
bochs/fpu/fpu_load_store.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fpu_load_store.cc,v 1.12 2007-03-23 21:27:13 sshwarts Exp $
// $Id: fpu_load_store.cc,v 1.13 2007-12-20 18:29:42 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003 Stanislav Shwartsman
@ -317,7 +317,7 @@ void BX_CPU_C::FST_SINGLE_REAL(bxInstruction_c *i)
return;
}
write_virtual_dword(i->seg(), RMAddr(i), &save_reg);
write_virtual_dword(i->seg(), RMAddr(i), save_reg);
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -353,7 +353,7 @@ void BX_CPU_C::FST_DOUBLE_REAL(bxInstruction_c *i)
return;
}
write_virtual_qword(i->seg(), RMAddr(i), &save_reg);
write_virtual_qword(i->seg(), RMAddr(i), save_reg);
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -419,7 +419,7 @@ void BX_CPU_C::FIST_WORD_INTEGER(bxInstruction_c *i)
return;
}
write_virtual_word(i->seg(), RMAddr(i), (Bit16u*)(&save_reg));
write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -457,7 +457,7 @@ void BX_CPU_C::FIST_DWORD_INTEGER(bxInstruction_c *i)
return;
}
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u*)(&save_reg));
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -493,7 +493,7 @@ void BX_CPU_C::FISTP_QWORD_INTEGER(bxInstruction_c *i)
return;
}
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u*)(&save_reg));
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
BX_CPU_THIS_PTR the_i387.FPU_pop();
#else
BX_INFO(("FISTP_QWORD_INTEGER: required FPU, configure --enable-fpu"));
@ -560,8 +560,8 @@ void BX_CPU_C::FBSTP_PACKED_BCD(bxInstruction_c *i)
}
// write packed bcd to memory
write_virtual_qword(i->seg(), RMAddr(i), &save_reg_lo);
write_virtual_word (i->seg(), RMAddr(i) + 8, &save_reg_hi);
write_virtual_qword(i->seg(), RMAddr(i), save_reg_lo);
write_virtual_word (i->seg(), RMAddr(i) + 8, save_reg_hi);
BX_CPU_THIS_PTR the_i387.FPU_pop();
#else
@ -597,7 +597,7 @@ void BX_CPU_C::FISTTP16(bxInstruction_c *i)
return;
}
write_virtual_word(i->seg(), RMAddr(i), (Bit16u*)(&save_reg));
write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
BX_CPU_THIS_PTR the_i387.FPU_pop();
#else
BX_INFO(("FISTTP16: required SSE3, use --enable-sse option"));
@ -633,7 +633,7 @@ void BX_CPU_C::FISTTP32(bxInstruction_c *i)
return;
}
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u*)(&save_reg));
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
BX_CPU_THIS_PTR the_i387.FPU_pop();
#else
BX_INFO(("FISTTP32: required SSE3, use --enable-sse option"));
@ -669,7 +669,7 @@ void BX_CPU_C::FISTTP64(bxInstruction_c *i)
return;
}
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u*)(&save_reg));
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
BX_CPU_THIS_PTR the_i387.FPU_pop();
#else
BX_INFO(("FISTTP64: required SSE3, use --enable-sse option"));