cleanup RDMSR
This commit is contained in:
Stanislav Shwartsman
parent
b5aabf8848
commit
cc60240dc1
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: msr.cc,v 1.9 2009-01-19 16:45:54 sshwarts Exp $
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// $Id: msr.cc,v 1.10 2009-01-19 17:43:54 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2008 Stanislav Shwartsman
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@ -41,32 +41,28 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDMSR(bxInstruction_c *i)
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}
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Bit32u index = ECX;
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Bit64u val64 = 0;
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/* We have the requested MSR register in ECX */
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switch(index) {
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#if BX_SUPPORT_SEP
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case BX_MSR_SYSENTER_CS:
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RAX = BX_CPU_THIS_PTR msr.sysenter_cs_msr;
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RDX = 0;
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val64 = BX_CPU_THIS_PTR msr.sysenter_cs_msr;
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break;
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case BX_MSR_SYSENTER_ESP:
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RAX = GET32L(BX_CPU_THIS_PTR msr.sysenter_esp_msr);
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RDX = GET32H(BX_CPU_THIS_PTR msr.sysenter_esp_msr);
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val64 = BX_CPU_THIS_PTR msr.sysenter_esp_msr;
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break;
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case BX_MSR_SYSENTER_EIP:
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RAX = GET32L(BX_CPU_THIS_PTR msr.sysenter_eip_msr);
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RDX = GET32H(BX_CPU_THIS_PTR msr.sysenter_eip_msr);
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RDX = 0;
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val64 = BX_CPU_THIS_PTR msr.sysenter_eip_msr;
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break;
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#endif
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#if BX_SUPPORT_MTRR
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case BX_MSR_MTRRCAP: // read only MSR
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RAX = 0x508;
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RDX = 0;
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val64 = BX_CONST64(0x0000000000000508);
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break;
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case BX_MSR_MTRRPHYSBASE0:
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@ -85,21 +81,17 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDMSR(bxInstruction_c *i)
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case BX_MSR_MTRRPHYSMASK6:
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case BX_MSR_MTRRPHYSBASE7:
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case BX_MSR_MTRRPHYSMASK7:
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RAX = GET32L(BX_CPU_THIS_PTR msr.mtrrphys[index - BX_MSR_MTRRPHYSBASE0]);
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RDX = GET32H(BX_CPU_THIS_PTR msr.mtrrphys[index - BX_MSR_MTRRPHYSBASE0]);
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val64 = BX_CPU_THIS_PTR msr.mtrrphys[index - BX_MSR_MTRRPHYSBASE0];
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break;
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case BX_MSR_MTRRFIX64K_00000:
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RAX = GET32L(BX_CPU_THIS_PTR msr.mtrrfix64k_00000);
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RDX = GET32H(BX_CPU_THIS_PTR msr.mtrrfix64k_00000);
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val64 = BX_CPU_THIS_PTR msr.mtrrfix64k_00000;
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break;
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case BX_MSR_MTRRFIX16K_80000:
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RAX = GET32L(BX_CPU_THIS_PTR msr.mtrrfix16k_80000);
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RDX = GET32H(BX_CPU_THIS_PTR msr.mtrrfix16k_80000);
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val64 = BX_CPU_THIS_PTR msr.mtrrfix16k_80000;
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break;
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case BX_MSR_MTRRFIX16K_A0000:
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RAX = GET32L(BX_CPU_THIS_PTR msr.mtrrfix16k_a0000);
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RDX = GET32H(BX_CPU_THIS_PTR msr.mtrrfix16k_a0000);
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val64 = BX_CPU_THIS_PTR msr.mtrrfix16k_a0000;
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break;
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case BX_MSR_MTRRFIX4K_C0000:
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@ -110,23 +102,20 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDMSR(bxInstruction_c *i)
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case BX_MSR_MTRRFIX4K_E8000:
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case BX_MSR_MTRRFIX4K_F0000:
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case BX_MSR_MTRRFIX4K_F8000:
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RAX = GET32L(BX_CPU_THIS_PTR msr.mtrrfix4k[index - BX_MSR_MTRRFIX4K_C0000]);
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RDX = GET32H(BX_CPU_THIS_PTR msr.mtrrfix4k[index - BX_MSR_MTRRFIX4K_C0000]);
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val64 = BX_CPU_THIS_PTR msr.mtrrfix4k[index - BX_MSR_MTRRFIX4K_C0000];
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break;
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case BX_MSR_PAT:
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RAX = GET32L(BX_CPU_THIS_PTR msr.pat);
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RDX = GET32H(BX_CPU_THIS_PTR msr.pat);
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val64 = BX_CPU_THIS_PTR msr.pat;
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break;
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case BX_MSR_MTRR_DEFTYPE:
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RAX = BX_CPU_THIS_PTR msr.mtrr_deftype;
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RDX = 0;
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val64 = BX_CPU_THIS_PTR msr.mtrr_deftype;
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break;
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#endif
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case BX_MSR_TSC:
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RDTSC(i);
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val64 = BX_CPU_THIS_PTR get_TSC();
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break;
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/* MSR_APICBASE
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@ -139,76 +128,66 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDMSR(bxInstruction_c *i)
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*/
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#if BX_SUPPORT_APIC
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case BX_MSR_APICBASE:
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RAX = BX_CPU_THIS_PTR msr.apicbase;
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RDX = 0;
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BX_INFO(("RDMSR: Read %08x:%08x from MSR_APICBASE", EDX, EAX));
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val64 = BX_CPU_THIS_PTR msr.apicbase;
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BX_INFO(("RDMSR: Read %08x:%08x from MSR_APICBASE", GET32H(val64), GET32L(val64)));
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break;
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#endif
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#if BX_SUPPORT_X86_64
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case BX_MSR_EFER:
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RAX = BX_CPU_THIS_PTR efer.get32();
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RDX = 0;
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val64 = BX_CPU_THIS_PTR efer.get32();
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break;
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case BX_MSR_STAR:
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RAX = GET32L(MSR_STAR);
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RDX = GET32H(MSR_STAR);
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val64 = MSR_STAR;
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break;
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case BX_MSR_LSTAR:
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RAX = GET32L(MSR_LSTAR);
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RDX = GET32H(MSR_LSTAR);
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val64 = MSR_LSTAR;
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break;
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case BX_MSR_CSTAR:
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RAX = GET32L(MSR_CSTAR);
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RDX = GET32H(MSR_CSTAR);
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val64 = MSR_CSTAR;
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break;
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case BX_MSR_FMASK:
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RAX = MSR_FMASK;
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RDX = 0;
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val64 = MSR_FMASK;
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break;
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case BX_MSR_FSBASE:
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RAX = GET32L(MSR_FSBASE);
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RDX = GET32H(MSR_FSBASE);
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val64 = MSR_FSBASE;
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break;
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case BX_MSR_GSBASE:
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RAX = GET32L(MSR_GSBASE);
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RDX = GET32H(MSR_GSBASE);
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val64 = MSR_GSBASE;
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break;
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case BX_MSR_KERNELGSBASE:
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RAX = GET32L(MSR_KERNELGSBASE);
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RDX = GET32H(MSR_KERNELGSBASE);
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val64 = MSR_KERNELGSBASE;
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break;
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case BX_MSR_TSC_AUX:
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RAX = MSR_TSC_AUX; // 32 bit MSR
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RDX = 0;
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val64 = MSR_TSC_AUX; // 32 bit MSR
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break;
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#endif // #if BX_SUPPORT_X86_64
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default:
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#if BX_CONFIGURE_MSRS
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if (index < BX_MSR_MAX_INDEX && BX_CPU_THIS_PTR msrs[index]) {
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RAX = GET32L(BX_CPU_THIS_PTR msrs[index]->get64());
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RDX = GET32H(BX_CPU_THIS_PTR msrs[index]->get64());
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val64 = BX_CPU_THIS_PTR msrs[index]->get64();
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break;
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}
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#endif
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// failed to find the MSR, could #GP or ignore it silently
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BX_ERROR(("RDMSR: Unknown register %#x", index));
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#if BX_IGNORE_BAD_MSR
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RAX = 0;
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RDX = 0;
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#else
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#if BX_IGNORE_BAD_MSR == 0
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exception(BX_GP_EXCEPTION, 0, 0);
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#endif
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}
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RAX = GET32L(val64);
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RDX = GET32H(val64);
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#else
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BX_INFO(("RDMSR: Pentium CPU required, use --enable-cpu-level=5"));
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: proc_ctrl.cc,v 1.273 2009-01-17 16:55:13 sshwarts Exp $
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// $Id: proc_ctrl.cc,v 1.274 2009-01-19 17:43:54 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1382,9 +1382,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDPMC(bxInstruction_c *i)
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}
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#if BX_CPU_LEVEL >= 5
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BX_CPP_INLINE Bit64u BX_CPU_C::get_TSC(void)
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Bit64u BX_CPU_C::get_TSC(void)
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{
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return bx_pc_system.time_ticks() - BX_CPU_THIS_PTR msr.tsc_last_reset;
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Bit64u tsc = bx_pc_system.time_ticks() - BX_CPU_THIS_PTR msr.tsc_last_reset;
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return tsc;
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}
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void BX_CPU_C::set_TSC(Bit64u newval)
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@ -1394,7 +1395,7 @@ void BX_CPU_C::set_TSC(Bit64u newval)
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BX_CPU_THIS_PTR msr.tsc_last_reset = bx_pc_system.time_ticks() - newval;
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// verify
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BX_ASSERT (get_TSC() == newval);
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BX_ASSERT(get_TSC() == newval);
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}
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#endif
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@ -1404,11 +1405,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDTSC(bxInstruction_c *i)
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if (! BX_CPU_THIS_PTR cr4.get_TSD() || CPL==0) {
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// return ticks
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Bit64u ticks = BX_CPU_THIS_PTR get_TSC();
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RAX = (Bit32u) (ticks & 0xffffffff);
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RDX = (Bit32u) ((ticks >> 32) & 0xffffffff);
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RAX = GET32L(ticks);
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RDX = GET32H(ticks);
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} else {
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// not allowed to use RDTSC!
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BX_ERROR(("RDTSC: incorrect usage of RDTSC instruction !"));
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BX_ERROR(("RDTSC: not allowed to use instruction !"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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#else
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