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1468 Commits

Author SHA1 Message Date
Stanislav Shwartsman
420f30816d inline integer saturation code - speedup for MMX/SSE integer 2008-04-06 13:56:22 +00:00
Stanislav Shwartsman
1b622661d7 Cleanup 2008-04-05 20:49:21 +00:00
Stanislav Shwartsman
90f1973bef Removed BX_USE_TLB - TLB is always used, only Guest2HostTLB is optional feature 
Use Guest2HostTLB in prefetch code for IFETCHES - speedup above 3%
 2008-04-05 20:41:00 +00:00
Stanislav Shwartsman
1bdddc1f78 Split SHRD/SHLD instructions 2008-04-05 19:08:01 +00:00
Stanislav Shwartsman
16bf4402b0 Remove wrongly committed code 2008-04-05 17:57:21 +00:00
Stanislav Shwartsman
5826e2843a Inline pop/push functions 
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
 2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
2aaafa76a2 Reorganize fetchdecode tables with another level of redirection - a leap toward future improvements 
Currently no speedup and no slowdown - about the same results on my Bochs benchmarking
A lot of code reorganization in fetchdecode
 2008-04-04 22:39:45 +00:00
Stanislav Shwartsman
026c333fa9 move handleDAZ to fpu 2008-04-04 20:03:27 +00:00
Stanislav Shwartsman
52770feedd Add CPUID bits comments and update CPU TODO 2008-04-04 12:23:19 +00:00
Stanislav Shwartsman
41fe0b3ebb Fix code duplication 2008-04-03 18:59:10 +00:00
Stanislav Shwartsman
1808710881 fixed duplicate line 2008-04-03 18:13:26 +00:00
Stanislav Shwartsman
62e3728591 preparations for future optimizations - not necessary speedupo now 2008-04-03 17:56:59 +00:00
Stanislav Shwartsman
4180fd9e11 Merge resolve16/32/64.cc to single file 2008-04-03 17:44:33 +00:00
Stanislav Shwartsman
e91409704f Convert EFER to val32 register, similar to other control registers 2008-03-31 20:56:27 +00:00
Stanislav Shwartsman
3f2487a0af Enabled tracing cross repeated instructions 2008-03-31 18:53:08 +00:00
Stanislav Shwartsman
255d512e29 Organize bxInstruction fields differently 2008-03-31 17:33:34 +00:00
Stanislav Shwartsman
231056fff4 small cleanups 2008-03-29 21:51:42 +00:00
Stanislav Shwartsman
b5f5e01f7e added assert to paging.cc 2008-03-29 21:12:11 +00:00
Stanislav Shwartsman
aade564f33 Correct variable name 2008-03-29 21:03:38 +00:00
Stanislav Shwartsman
08f958f458 Fixed pageWriteStampTable to handle BIOS code as well - increased the table to all 4G instead of allocated memory size 
Avoid checking of pageWriteStamp in the heart of cpu loop with trace cache - now decWriteStamp will post stopTraceExecution event if it hits code page
 2008-03-29 21:01:25 +00:00
Stanislav Shwartsman
7aef2d5892 Inline get_ZF/SF/PF lazy flags functions - gcc didn't get them inline before 2008-03-29 18:44:13 +00:00
Stanislav Shwartsman
f3a91710e4 Split access_linear to access_read_linear and access_write_linear 2008-03-29 18:18:08 +00:00
Stanislav Shwartsman
14ff07b482 Small code cleanup 2008-03-29 09:58:23 +00:00
Stanislav Shwartsman
e48b398bee Add NIL register and simplify more BxResolve work 2008-03-29 09:34:35 +00:00
Stanislav Shwartsman
1a59913e2b Fixed BX_INFO message 2008-03-27 21:04:39 +00:00
Stanislav Shwartsman
8c24dfc01b MSVC6 compilation changes 
More effort to remove can_pop function calls - almost everything is clean
 2008-03-26 16:25:05 +00:00
Stanislav Shwartsman
94f30955be Fixed compilation error 2008-03-25 16:46:39 +00:00
Stanislav Shwartsman
74b2716263 Removed redundant can_pop call - in future I want to remove can_pop as well 2008-03-24 22:35:37 +00:00
Stanislav Shwartsman
9fcbf28cea Removed can_push method - normal memory accesses will be used instead. 
Fixed reset value of TR.TYPE
 2008-03-24 22:13:04 +00:00
Stanislav Shwartsman
a22160959b HLT callback to Bochs internal debugger 2008-03-23 21:39:01 +00:00
Stanislav Shwartsman
34e03fae43 Fixed assertion failure with exception called from compatibility mode 2008-03-23 21:24:05 +00:00
Stanislav Shwartsman
b07a46f200 Fixed CR0 reset value. Modified param tree for IDTR and GDTR segments 2008-03-23 20:18:24 +00:00
Stanislav Shwartsman
47936944a2 Remove Cirrus Logic PCI special define - it will be enabled by default when PCI is enabled. 2008-03-22 22:26:03 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
36b1dedef5 When speculative tracing is OFF this code in ctrl_xfer_pro.cc is not needed 2008-03-22 10:42:09 +00:00
Stanislav Shwartsman
eea5e6eac5 Simplify RepeatSpeedups optimizations - restrict them only to segments which already passed access/limit validation and avoid mass of heavy checks during repeat speedup itself. 2008-03-21 20:35:46 +00:00
Stanislav Shwartsman
7e490699d4 Removing hooks for not-implemented SSE4A from the Bochs code. 2008-03-21 20:04:42 +00:00
Stanislav Shwartsman
d292241102 Icache hash trick by Darek Mihocka 2008-03-21 20:02:48 +00:00
Stanislav Shwartsman
64bfbb32b5 Inline icache lookup code - speedup of 3% according to my measurements 2008-03-06 20:22:24 +00:00
Stanislav Shwartsman
0d26c2359b Reorganize fields in metaInfo3 2008-03-03 16:45:15 +00:00
Stanislav Shwartsman
e6d75f61ee Simplify icache entry calculation 2008-03-03 16:22:31 +00:00
Stanislav Shwartsman
65df050a21 Fixed compilation warning 2008-03-03 15:34:03 +00:00
Stanislav Shwartsman
946b7a369d Added const to fetchPtr in cpu functions 2008-03-03 15:16:46 +00:00
Stanislav Shwartsman
2172e96654 small trace/iacache cleanups, always allow speculative tracing for trace cache 2008-03-03 14:35:36 +00:00
Stanislav Shwartsman
5e7218b8c3 Fixed problem introduced by prev checkin 
+
Fix beak to debugger when executing HLT instruction
 2008-02-29 05:39:40 +00:00
Stanislav Shwartsman
405fcfd75d Reorganize 3-byte opcode tables - bigger tables but easier to maintain them 2008-02-29 03:02:03 +00:00
Stanislav Shwartsman
a459a64f3e whispace, tab2space, indent, dos2unix and other cleanups 2008-02-15 22:05:43 +00:00
Stanislav Shwartsman
cdcd7522aa Added RIP to the GPR register file as lst register 
This allowed to optimize (read - remove) two more BxResolve methods in 64-bit mode
+ Some white space cleanup
 2008-02-15 19:03:54 +00:00
Stanislav Shwartsman
0f44b4f0ec Fixes in MODRM tables 2008-02-15 12:23:49 +00:00
Stanislav Shwartsman
4fc0df26e8 a bit optimize and simplify x87 decoding 2008-02-14 18:59:41 +00:00
Stanislav Shwartsman
933bf018a8 Fixed hang in sse_move.cc 2008-02-13 23:12:35 +00:00
Stanislav Shwartsman
1d13084ab8 Fixed warning with cpu-level=3 2008-02-13 22:51:31 +00:00
Stanislav Shwartsman
398a8ef230 Fixed warning with XSAVE disabled 2008-02-13 22:42:41 +00:00
Stanislav Shwartsman
ae86ad28a0 Finalize XSAVE/XRSTOR instructions 2008-02-13 22:25:24 +00:00
Stanislav Shwartsman
b929a2b2b8 Fixed minor issues - compilation and not only 2008-02-13 17:06:44 +00:00
Stanislav Shwartsman
457152334e step2 in XSAVE implementation 2008-02-13 16:45:21 +00:00
Stanislav Shwartsman
59b73a8a6a new file - currently with stubs for xsave/xrestr extensions 2008-02-12 22:42:47 +00:00
Stanislav Shwartsman
8615022962 Added first stubs for XSAVE/XRESTOR implementation 
Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
 2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
680a588575 Fixed compilation error when alignment check is disabled 2008-02-12 06:47:03 +00:00
Stanislav Shwartsman
8d7410a852 Canonical check have higher priority than #AC check 2008-02-11 20:52:10 +00:00
Stanislav Shwartsman
063d896226 Optimization in 16-bit resolve functions 
Fixes for hosts which can't support misaligned memory access
 2008-02-07 20:43:13 +00:00
Stanislav Shwartsman
965568ea88 cleanups 2008-02-07 18:28:50 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
fb0ce45d28 Unpack more fields in bxInstruction_c -> this increase bxInstruction size by 4 bytes but I have no way but do it if want to support SSE5 dest override later 2008-02-04 21:28:53 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
032b13047c Minor fix in cpu reset, bug sometimes caused to run on garbage memory after software reset. Some small debug messages fixes 2008-02-01 13:25:23 +00:00
Volker Ruppert
885fd16565 - fixed compilation error with wx debugger enabled 2008-01-31 21:44:28 +00:00
Stanislav Shwartsman
5f18ed902d fixed compilation issue 2008-01-29 22:29:48 +00:00
Stanislav Shwartsman
1a55fce072 remove staruct for eflags and use single 32-bit variable 2008-01-29 22:26:29 +00:00
Stanislav Shwartsman
f16d34c01c new file instr.h 2008-01-29 17:37:37 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
9f4dd0df8a Fixed BX_ERROR message in LTR instruction 2008-01-29 06:23:49 +00:00
Stanislav Shwartsman
8653095520 small optimization in cpu_loop with trace cache 2008-01-28 20:09:40 +00:00
Stanislav Shwartsman
7b80c5f481 I merged and succeded to remove some similar execution functions - less code, less chance for branch misprediction 2008-01-25 19:34:30 +00:00
Stanislav Shwartsman
9ec2c87aaa cleanups and optimizations 2008-01-22 16:20:30 +00:00
Stanislav Shwartsman
192f398b46 removed --enable-magic-breakpoint configure option - it is enabled by default if Bochs internal debugger compiled in. Also it always possible to switch magic break off by .bochsrc option 2008-01-21 21:36:58 +00:00
Stanislav Shwartsman
63d8d50cfc code cleanup 2008-01-20 20:11:17 +00:00
Stanislav Shwartsman
932d758547 Do not try to update access/dirty bit if it was already set 2008-01-20 17:46:02 +00:00
Stanislav Shwartsman
8c9de8b4db speculative tracing on fetchdecode level 2008-01-18 09:36:15 +00:00
Stanislav Shwartsman
d18b90484f Added instr callbacks for sysenter/sysexit/syscall/sysret 2008-01-18 08:57:35 +00:00
Stanislav Shwartsman
235bca1280 dos2unix 2008-01-17 21:16:23 +00:00
Stanislav Shwartsman
88a4776244 taking all CPU icache/trace cache related stuff into separate source file from cpu.cc 2008-01-17 21:15:23 +00:00
Stanislav Shwartsman
e287dcd91a correctly implement CLFLUSH protection/paging checks + add instrumentation callback 2008-01-16 22:56:17 +00:00
Stanislav Shwartsman
9be2d79f98 Added a parameter to INVLPD instrumentation call 2008-01-16 22:39:55 +00:00
Stanislav Shwartsman
31bab8e058 Fixed compilation error with instrumentation enabled 2008-01-16 22:20:21 +00:00
Stanislav Shwartsman
9e53b71a55 Segment base in not long mode should only 32-bit 2008-01-14 19:03:50 +00:00
Stanislav Shwartsman
c6fd4ebf94 Split CALL_Ev and JMP_Ev methods 2008-01-12 16:40:38 +00:00
Stanislav Shwartsman
90e321469f Optimized IP-relative memory access 2008-01-10 21:32:12 +00:00
Stanislav Shwartsman
77b4b70b9b oops, revert incorrectly merged change 2008-01-10 20:32:23 +00:00
Stanislav Shwartsman
1f4608cd84 Fix for implemened 3dnow instuctions (most of them are not implemented) 2008-01-10 20:26:49 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
e7a45770fd More optimization for short traces 2008-01-05 10:45:05 +00:00
Stanislav Shwartsman
a9e001bd30 Optimize short traces 2008-01-05 10:21:25 +00:00
Stanislav Shwartsman
f8320c4fe2 removed unused variable 2008-01-01 18:01:39 +00:00
Stanislav Shwartsman
eee1a9030d a bit simplify and optimize shift instructions 
print failed segment info in check_cs - more debug info
 2007-12-30 20:16:35 +00:00
Stanislav Shwartsman
d891f0d8ec Fixed more VC2008 warnings - hopefully last ones 2007-12-30 17:53:12 +00:00
Stanislav Shwartsman
79fc57dec8 Fixed more VCPP2008 warnings 2007-12-26 23:07:44 +00:00
Stanislav Shwartsman
fc159e3bcf small cleanup 2007-12-25 21:42:38 +00:00
Stanislav Shwartsman
38fb3d78be small cleanup in repeat code 2007-12-23 18:09:34 +00:00
Stanislav Shwartsman
085f408078 Fixed possible problem with repeat speedups in 64-bit mode. 
Also was pointed out by MSVCPP2008 warnings
 2007-12-23 17:46:44 +00:00
Stanislav Shwartsman
e4420d52c6 Emplement MASMOVDQU as RMW for efficiency (and correctness) 2007-12-23 17:39:10 +00:00
Stanislav Shwartsman
838fb2a048 Fixing V2008 warnings - they found a bug in sse_pfp.cc ! 2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
948d85c24b Fixed MINGW compilation error 2007-12-22 22:02:08 +00:00
Stanislav Shwartsman
c3c9c40674 Move MaxFetch calculation into fetchdecode - simplify the logic 2007-12-22 17:17:40 +00:00
Stanislav Shwartsman
0e5859302b Avoid 64-bit calculations when checking remainingInPage bytes 2007-12-22 12:43:17 +00:00
Stanislav Shwartsman
cc4a068d7b VM8086 is always ON' 2007-12-21 21:14:48 +00:00
Stanislav Shwartsman
e9a148f9c4 lmost last instruction split -> CMOV in 16/32 bit modes 2007-12-21 18:24:19 +00:00
Stanislav Shwartsman
d830c301cf Fixed 64-bit versions of LOOP instructions, some cleanups 2007-12-21 17:30:49 +00:00
Stanislav Shwartsman
62c098f627 Introduce new icache hash function suggested by Darek Mihocka 
My studies show that in average new hash function of paddr + paddr>>4
suffers 5-10% less from aliasing in direct map cache array.
 2007-12-21 12:38:57 +00:00
Stanislav Shwartsman
a93b0afdbe Merge page split detection method suggested by Darek Mihocka 2007-12-21 10:33:39 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
6ac7fa7106 MMX - modify masked write to RMW - faster execution 
CMPXCHG8B/16B - fixed possible problem. Instruction not allowed to fault after some part of it written to the memory
 2007-12-19 23:21:11 +00:00
Stanislav Shwartsman
c9932e97eb Fixes in resolve.cc -> reduce amount of resolve functions even more 2007-12-18 21:41:44 +00:00
Stanislav Shwartsman
d4ee2c0a59 cleanup 2007-12-18 21:08:55 +00:00
Stanislav Shwartsman
d032a30429 Fixed a lot of code duplication and possible bug with oncorrect implementation of repeat speedup in 64-bit guest 2007-12-17 21:13:55 +00:00
Stanislav Shwartsman
fe2e0525da More optimization for string instructions 2007-12-17 19:52:01 +00:00
Stanislav Shwartsman
0af87ab63b Split string instructions according to the address size - simpler and faster 2007-12-17 18:48:26 +00:00
Stanislav Shwartsman
6c8241da9a Added debug prints in case of exceptions 2007-12-16 21:46:39 +00:00
Stanislav Shwartsman
a545bf63ce push_64 and pop_64 could happen only in 64-bit mode 2007-12-16 21:40:44 +00:00
Stanislav Shwartsman
4f78ff2153 Code cleanup 2007-12-16 21:21:29 +00:00
Stanislav Shwartsman
46366b5064 Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions 2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
de5838ce80 cleanups and fixes for Immediate_IbIb of SSE4A 2007-12-16 20:47:10 +00:00
Stanislav Shwartsman
8b5eaa5820 Make functions inline 2007-12-16 20:37:59 +00:00
Stanislav Shwartsman
1e843cb462 Decode SSE4A 
Rework immediate bytes decoding to make it faster
 2007-12-15 17:42:24 +00:00
Stanislav Shwartsman
3a6d714398 Split for JMP_Ew/Ed opcodes from Grp5 2007-12-14 23:15:52 +00:00
Stanislav Shwartsman
fd73390ca5 Split 64-bit CMOVcc opcode 2007-12-14 22:41:43 +00:00
Stanislav Shwartsman
903f6dea35 Split setCC functions - makes code faster and simpler 2007-12-14 21:29:36 +00:00
Stanislav Shwartsman
d9a59c7a1f Added ability to merge traces cross JCC branch instructions 
Makes traces longer -> emulation faster in average
 2007-12-14 20:41:09 +00:00
Stanislav Shwartsman
db69a25c36 Trace cache instrumentation methods 
Next step will be tracing cross non-taken branches
 2007-12-14 11:27:44 +00:00
Stanislav Shwartsman
48d815427c According to AMD docs INVLD/WBINVLD instructions not required to flush TLBs 2007-12-14 10:15:12 +00:00
Stanislav Shwartsman
c3e5c71000 post exceptions and print BX_ERROR messages in tasking.cc 2007-12-13 23:17:50 +00:00
Stanislav Shwartsman
85d10e4f72 Added MWAIT callback 2007-12-13 21:41:32 +00:00
Stanislav Shwartsman
f145f4c847 Unify BX_INSTR_MEM_READ and BX_INSTR_MEM_WRITE callbacks to single callback BX_INSTR_MEM_ACCESS 
Enable the callback with guest-to-host TLB enabled
Update instrumentation docs
 2007-12-13 21:30:05 +00:00
Stanislav Shwartsman
05c7a1e61b Fixed problem with trace cache enabled 
String instructions might confise trace cache by finishing instruction execution method without actually completing an instruction (and advancing eip)
 2007-12-13 18:42:31 +00:00
Stanislav Shwartsman
05a5923971 Merged Bochs instrumentation patch by Lluis Vilanova 2007-12-13 17:16:21 +00:00
Stanislav Shwartsman
da19b9447a All Jq instructions in 64-bit mode have fixed 64-bit osize 2007-12-10 23:04:18 +00:00
Stanislav Shwartsman
e15f7445f8 Faster memory access for 4G limit cases 
A bit slower for <4G but usually it is 4G
 2007-12-10 19:08:13 +00:00
Stanislav Shwartsman
adda3befd3 Trace cache optimization merged 2007-12-09 18:36:05 +00:00
Stanislav Shwartsman
ee465a7714 misaligned SSE support works only for loads 2007-12-09 17:40:23 +00:00
Stanislav Shwartsman
29267577f0 Fixed HLT problem in SMP binary which runs with single processor only 2007-12-08 09:26:13 +00:00
Stanislav Shwartsman
976af56f6d Split bit.cc to 4 files - new files bit16/32/64.cc 2007-12-07 10:59:18 +00:00
Stanislav Shwartsman
4c16dd71a8 Fixed compilation error in SMP mode 2007-12-07 09:38:42 +00:00
Stanislav Shwartsman
6fcc7d34ab Next step in lazy flags optimization by Darek MihockA - 
get rid of shifts from lazy flags code
 2007-12-06 20:39:11 +00:00
Stanislav Shwartsman
d739cca282 small cleanup 2007-12-06 18:35:33 +00:00
Stanislav Shwartsman
d54d537f81 One more step for lazy flags optimization 2007-12-06 16:57:59 +00:00
Stanislav Shwartsman
a835e3f8ff get_FLAG_Lazy not always returns 0/1 2007-12-05 06:27:01 +00:00
Stanislav Shwartsman
295a36ef58 2nd step of lazy flags optimization 2007-12-05 06:17:09 +00:00
Stanislav Shwartsman
88899cf617 Changes for lazy flags handling -> 1st stap in transition to new lazy flags handling by Darek Mihocka (www.emulators.com) 2007-12-04 19:27:23 +00:00
Stanislav Shwartsman
40fc0a3e42 Reduce ICACHE back to 32K entries - reduce ICACHE size from 4M to 2M 
Not everybody already have C2D CPU with 4M L2 cache on die ...
 2007-12-04 17:34:20 +00:00