Fixes in resolve.cc -> reduce amount of resolve functions even more
This commit is contained in:
Stanislav Shwartsman
parent
d4ee2c0a59
commit
c9932e97eb
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.397 2007-12-17 19:52:00 sshwarts Exp $
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// $Id: cpu.h,v 1.398 2007-12-18 21:41:41 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -3073,7 +3073,6 @@ public: // for now...
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BX_SMF void BxResolve16Mod1or2Rm6(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve16Mod1or2Rm7(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve32Rm(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve32Disp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve32Base(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve32BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -3082,7 +3081,6 @@ public: // for now...
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#if BX_SUPPORT_X86_64
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BX_SMF void BxResolve32Rip(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve64Rip(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve64Rm(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve64Disp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve64Base(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void BxResolve64BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -3835,11 +3833,12 @@ IMPLEMENT_EFLAG_ACCESSOR (TF, 8)
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#define BxImmediate_O 0x0008 // MOV_ALOd, mov_OdAL, mov_eAXOv, mov_OveAX
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#define BxImmediate_BrOff8 0x0009 // Relative branch offset byte
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#define BxImmediate_BrOff16 0x000A // Relative branch offset word, not encodable in 64-bit mode
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#define BxImmediate_BrOff32 0x000B // Relative branch offset dword
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#if BX_SUPPORT_X86_64
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#define BxImmediate_Iq 0x000C // 64 bit override
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#define BxImmediate_Iq 0x000B // 64 bit override
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#endif
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#define BxImmediate_BrOff32 BxImmediate_Id // Relative branch offset dword
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// Lookup for opcode and attributes in another opcode tables
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// Totally 7 opcode groups supported
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#define BxGroupX 0x0070 // bits 6..4: opcode groups definition
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@ -3849,6 +3848,7 @@ IMPLEMENT_EFLAG_ACCESSOR (TF, 8)
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#define BxRMGroup 0x0040 // Group encoding: 100
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#define Bx3ByteOpIndex 0x0050 // Group encoding: 101
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#define Bx3ByteOpTable 0x0060 // Group encoding: 110
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// Group encoding: 111
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#define BxPrefix 0x0080 // bit 7
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#define BxLockable 0x0100 // bit 8
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: ctrl_xfer16.cc,v 1.46 2007-12-16 21:21:29 sshwarts Exp $
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// $Id: ctrl_xfer16.cc,v 1.47 2007-12-18 21:41:41 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -576,11 +576,6 @@ void BX_CPU_C::IRET16(bxInstruction_c *i)
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goto done;
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}
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if (! can_pop(6)) {
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BX_ERROR(("IRET: top 6 bytes of stack not within stack limits"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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pop_16(&ip);
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pop_16(&cs_raw);
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pop_16(&flags);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: ctrl_xfer32.cc,v 1.58 2007-12-16 21:21:29 sshwarts Exp $
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// $Id: ctrl_xfer32.cc,v 1.59 2007-12-18 21:41:41 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -567,11 +567,6 @@ void BX_CPU_C::IRET32(bxInstruction_c *i)
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Bit32u eip, ecs, eflags;
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if (! can_pop(12)) {
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BX_ERROR(("IRETD: to 12 bytes of stack not within stack limits"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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pop_32(&eip);
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// CS.LIMIT in real mode is 0xffff
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.152 2007-12-17 19:52:00 sshwarts Exp $
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// $Id: fetchdecode.cc,v 1.153 2007-12-18 21:41:41 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -737,7 +737,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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/* 0F F4 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /wr */ { 0, &BX_CPU_C::BxError }, // MASKMOVxx SSE group
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/* 0F F8 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -1301,7 +1301,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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/* 0F F4 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /dr */ { 0, &BX_CPU_C::BxError }, // MASKMOVxx SSE group
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/* 0F F8 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -1872,7 +1872,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
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/* 0F F4 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7M },
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/* 0F F8 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -2436,7 +2436,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
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/* 0F F4 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7M },
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/* 0F F8 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -2606,7 +2606,7 @@ fetch_b1:
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i->modRMForm.modRMData1 = rm;
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i->modRMForm.modRMData2 = mod;
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i->modRMForm.modRMData3 = 0;
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i->modRMForm.modRMData3 = rm; // initialize with rm to use BxResolve32Base
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i->modRMForm.modRMData4 = nnn;
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i->modRMForm.displ32u = 0;
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@ -2618,7 +2618,7 @@ fetch_b1:
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if (i->as32L()) {
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// 32-bit addressing modes; note that mod==11b handled above
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if (rm != 4) { // no s-i-b byte
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i->ResolveModrm = &BX_CPU_C::BxResolve32Rm;
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i->ResolveModrm = &BX_CPU_C::BxResolve32Base;
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if (mod == 0x00) { // mod == 00b
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if (BX_NULL_SEG_REG(i->seg()))
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i->setSeg(BX_SEG_REG_DS);
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@ -2663,7 +2663,7 @@ get_8bit_displ:
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base = sib & 0x7; sib >>= 3;
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index = sib & 0x7; sib >>= 3;
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scale = sib;
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i->modRMForm.modRMData3 |= (base);
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i->modRMForm.modRMData3 = (base);
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i->modRMForm.modRMData2 |= (index);
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i->modRMForm.modRMData2 |= (scale<<4);
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if (index == 4)
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@ -2836,6 +2836,15 @@ modrm_done:
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return(0);
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}
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break;
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case BxImmediate_Id:
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if ((ilen+3) < remain) {
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i->modRMForm.Id = FetchDWORD(iptr);
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ilen += 4;
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}
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else {
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return(0);
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}
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break;
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case BxImmediate_IbIb:
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if (ilen < remain) {
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i->IxIxForm.Ib = *iptr++;
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@ -2928,16 +2937,6 @@ modrm_done:
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return(0);
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}
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break;
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case BxImmediate_Id:
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case BxImmediate_BrOff32:
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if ((ilen+3) < remain) {
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i->modRMForm.Id = FetchDWORD(iptr);
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ilen += 4;
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}
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else {
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return(0);
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}
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break;
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default:
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BX_INFO(("b1 was %x", b1));
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BX_PANIC(("fetchdecode: imm_mode = %u", imm_mode));
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.h,v 1.47 2007-12-15 17:42:20 sshwarts Exp $
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// $Id: fetchdecode.h,v 1.48 2007-12-18 21:41:41 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2005 Stanislav Shwartsman
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@ -1752,7 +1752,7 @@ static const BxOpcodeInfo_t BxOpcodeGroupSSE_0ff6[4] = {
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/* F3 */ { 0, &BX_CPU_C::BxError }
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};
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static const BxOpcodeInfo_t BxOpcodeGroupSSE_0ff7[4] = {
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static const BxOpcodeInfo_t BxOpcodeGroupSSE_0ff7M[4] = {
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/* -- */ { 0, &BX_CPU_C::MASKMOVQ_PqPRq },
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/* 66 */ { 0, &BX_CPU_C::MASKMOVDQU_VdqUdq },
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/* F2 */ { 0, &BX_CPU_C::BxError },
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.160 2007-12-17 19:52:00 sshwarts Exp $
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// $Id: fetchdecode64.cc,v 1.161 2007-12-18 21:41:41 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -691,7 +691,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F F4 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /wr */ { 0, &BX_CPU_C::BxError }, // MASKMOVxx SSE group
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/* 0F F8 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /wr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -1220,7 +1220,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F F4 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /dr */ { 0, &BX_CPU_C::BxError }, // MASKMOVxx SSE group
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/* 0F F8 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /dr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -1749,7 +1749,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F F4 /qr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /qr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /qr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /qr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /qr */ { 0, &BX_CPU_C::BxError }, // MASKMOVxx SSE group
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/* 0F F8 /qr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /qr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /qr */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -2284,7 +2284,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
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/* 0F F4 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7M },
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/* 0F F8 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /wm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -2813,7 +2813,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
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/* 0F F4 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7M },
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/* 0F F8 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /dm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -3342,7 +3342,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
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/* 0F F4 /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff4 },
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/* 0F F5 /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff5 },
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/* 0F F6 /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff6 },
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/* 0F F7 /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7 },
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/* 0F F7 /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff7M },
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/* 0F F8 /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff8 },
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/* 0F F9 /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ff9 },
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/* 0F FA /qm */ { BxPrefixSSE, NULL, BxOpcodeGroupSSE_0ffa },
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@ -3535,7 +3535,7 @@ fetch_b1:
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i->modRMForm.modRMData1 = rm;
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i->modRMForm.modRMData2 = mod;
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i->modRMForm.modRMData3 = 0;
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i->modRMForm.modRMData3 = rm; // initialize with rm to use BxResolve64Base
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i->modRMForm.modRMData4 = nnn;
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i->modRMForm.displ32u = 0;
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@ -3547,7 +3547,7 @@ fetch_b1:
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if (i->as64L()) {
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// 64-bit addressing modes; note that mod==11b handled above
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if ((rm & 0x7) != 4) { // no s-i-b byte
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i->ResolveModrm = &BX_CPU_C::BxResolve64Rm;
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i->ResolveModrm = &BX_CPU_C::BxResolve64Base;
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if (mod == 0x00) { // mod == 00b
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if (BX_NULL_SEG_REG(i->seg()))
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i->setSeg(BX_SEG_REG_DS);
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@ -3592,7 +3592,7 @@ get_8bit_displ:
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base = (sib & 0x7) | rex_b; sib >>= 3;
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index = (sib & 0x7) | rex_x; sib >>= 3;
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scale = sib;
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i->modRMForm.modRMData3 |= (base);
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i->modRMForm.modRMData3 = (base);
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i->modRMForm.modRMData2 |= (index);
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i->modRMForm.modRMData2 |= (scale<<4);
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if (index == 4)
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@ -3623,7 +3623,7 @@ get_8bit_displ:
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else {
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// 32-bit addressing modes; note that mod==11b handled above
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if ((rm & 0x7) != 4) { // no s-i-b byte
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i->ResolveModrm = &BX_CPU_C::BxResolve32Rm;
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i->ResolveModrm = &BX_CPU_C::BxResolve32Base;
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if (mod == 0x00) { // mod == 00b
|
||||
if (BX_NULL_SEG_REG(i->seg()))
|
||||
i->setSeg(BX_SEG_REG_DS);
|
||||
@ -3653,7 +3653,7 @@ get_8bit_displ:
|
||||
base = (sib & 0x7) | rex_b; sib >>= 3;
|
||||
index = (sib & 0x7) | rex_x; sib >>= 3;
|
||||
scale = sib;
|
||||
i->modRMForm.modRMData3 |= (base);
|
||||
i->modRMForm.modRMData3 = (base);
|
||||
i->modRMForm.modRMData2 |= (index);
|
||||
i->modRMForm.modRMData2 |= (scale<<4);
|
||||
if (index == 4)
|
||||
@ -3684,18 +3684,6 @@ get_8bit_displ:
|
||||
|
||||
modrm_done:
|
||||
|
||||
/*
|
||||
BX_DEBUG (("as_64=%d os_64=%d as_32=%d os_32=%d b1=%04x b2=%04x ofs=%4d rm=%d mod=%d nnn=%d",
|
||||
i->as64L(),
|
||||
i->os64L(),
|
||||
i->as32L(),
|
||||
i->os32L(),
|
||||
b1,b2,offset,
|
||||
i->modRMForm.rm,
|
||||
mod,
|
||||
nnn));
|
||||
*/
|
||||
|
||||
// Resolve ExecutePtr and additional opcode Attr
|
||||
const BxOpcodeInfo_t *OpcodeInfoPtr;
|
||||
if (mod == 0xc0) {
|
||||
@ -3804,6 +3792,15 @@ modrm_done:
|
||||
return(0);
|
||||
}
|
||||
break;
|
||||
case BxImmediate_Id:
|
||||
if ((ilen+3) < remain) {
|
||||
i->modRMForm.Id = FetchDWORD(iptr);
|
||||
ilen += 4;
|
||||
}
|
||||
else {
|
||||
return(0);
|
||||
}
|
||||
break;
|
||||
case BxImmediate_Iq: // MOV Rx,imm64
|
||||
if ((ilen+7) < remain) {
|
||||
i->IqForm.Iq = FetchQWORD(iptr);
|
||||
@ -3869,16 +3866,6 @@ modrm_done:
|
||||
return(0);
|
||||
}
|
||||
break;
|
||||
case BxImmediate_Id:
|
||||
case BxImmediate_BrOff32:
|
||||
if ((ilen+3) < remain) {
|
||||
i->modRMForm.Id = FetchDWORD(iptr);
|
||||
ilen += 4;
|
||||
}
|
||||
else {
|
||||
return(0);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
BX_INFO(("b1 was %x", b1));
|
||||
BX_PANIC(("fetchdecode: imm_mode = %u", imm_mode));
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: mmx.cc,v 1.64 2007-11-27 22:12:45 sshwarts Exp $
|
||||
// $Id: mmx.cc,v 1.65 2007-12-18 21:41:43 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2002 Stanislav Shwartsman
|
||||
@ -2433,11 +2433,6 @@ void BX_CPU_C::MASKMOVQ_PqPRq(bxInstruction_c *i)
|
||||
#if BX_SUPPORT_3DNOW || BX_SUPPORT_SSE >= 1
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
|
||||
if (! i->modC0()) {
|
||||
BX_INFO(("MASKMOVQ_PqPRq: unexpected memory reference"));
|
||||
UndefinedOpcode(i);
|
||||
}
|
||||
|
||||
bx_address rdi;
|
||||
BxPackedMmxRegister op = BX_READ_MMX_REG(i->nnn()),
|
||||
mask = BX_READ_MMX_REG(i->rm());
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: resolve32.cc,v 1.14 2007-11-18 19:46:14 sshwarts Exp $
|
||||
// $Id: resolve32.cc,v 1.15 2007-12-18 21:41:44 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -32,12 +32,6 @@
|
||||
#define LOG_THIS BX_CPU_THIS_PTR
|
||||
|
||||
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::BxResolve32Rm(bxInstruction_c *i)
|
||||
{
|
||||
RMAddr(i) = BX_READ_32BIT_REG(i->rm()) + i->displ32u();
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::BxResolve32Disp(bxInstruction_c *i)
|
||||
{
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: resolve64.cc,v 1.14 2007-11-24 14:22:34 sshwarts Exp $
|
||||
// $Id: resolve64.cc,v 1.15 2007-12-18 21:41:44 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -37,13 +37,13 @@
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::BxResolve32Rip(bxInstruction_c *i)
|
||||
{
|
||||
// RIP hasn't been bumped yet when this is called. must choose the saved value.
|
||||
// RIP hasn't been bumped yet when this is called. Must choose the saved value.
|
||||
RMAddr(i) = (Bit32u) (BX_CPU_THIS_PTR prev_rip + i->ilen() + (Bit32s) i->displ32u());
|
||||
}
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::BxResolve64Rip(bxInstruction_c *i)
|
||||
{
|
||||
// RIP hasn't been bumped yet when this is called. must choose the saved value.
|
||||
// RIP hasn't been bumped yet when this is called. Must choose the saved value.
|
||||
RMAddr(i) = BX_CPU_THIS_PTR prev_rip + i->ilen() + (Bit32s) i->displ32u();
|
||||
}
|
||||
|
||||
@ -53,12 +53,6 @@ BX_CPU_C::BxResolve64DispIndex(bxInstruction_c *i)
|
||||
RMAddr(i) = (BX_READ_64BIT_REG(i->sibIndex()) << i->sibScale()) + (Bit32s) i->displ32u();
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::BxResolve64Rm(bxInstruction_c *i)
|
||||
{
|
||||
RMAddr(i) = BX_READ_64BIT_REG(i->rm()) + (Bit32s) i->displ32u();
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::BxResolve64Disp(bxInstruction_c *i)
|
||||
{
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: sse_move.cc,v 1.69 2007-12-15 17:42:24 sshwarts Exp $
|
||||
// $Id: sse_move.cc,v 1.70 2007-12-18 21:41:44 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2003 Stanislav Shwartsman
|
||||
@ -790,11 +790,6 @@ void BX_CPU_C::MASKMOVDQU_VdqUdq(bxInstruction_c *i)
|
||||
#if BX_SUPPORT_SSE >= 2
|
||||
BX_CPU_THIS_PTR prepareSSE();
|
||||
|
||||
if (! i->modC0()) {
|
||||
BX_INFO(("MASKMOVDQU_VdqUdq: unexpected memory reference"));
|
||||
UndefinedOpcode(i);
|
||||
}
|
||||
|
||||
bx_address rdi;
|
||||
BxPackedXmmRegister op = BX_READ_XMM_REG(i->nnn()),
|
||||
mask = BX_READ_XMM_REG(i->rm());
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user