new file instr.h
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bochs/cpu/instr.h
Executable file
292
bochs/cpu/instr.h
Executable file
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/////////////////////////////////////////////////////////////////////////
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// $Id: instr.h,v 1.1 2008-01-29 17:37:37 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2008 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#ifndef BX_INSTR_H
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# define BX_INSTR_H 1
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// <TAG-CLASS-INSTRUCTION-START>
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class bxInstruction_c {
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public:
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// Function pointers; a function to resolve the modRM address
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// given the current state of the CPU and the instruction data,
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// and a function to execute the instruction after resolving
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// the memory address (if any).
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#if BX_USE_CPU_SMF
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void (BX_CPP_AttrRegparmN(1) *ResolveModrm)(bxInstruction_c *);
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void (*execute)(bxInstruction_c *);
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#else
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void (BX_CPU_C::*ResolveModrm)(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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void (BX_CPU_C::*execute)(bxInstruction_c *);
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#endif
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struct {
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// 31..29 (unused)
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// 28..20 b1 (9bits of opcode; 1byte-op=0..255, 2byte-op=256..511
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// (leave this one on top so no mask is needed)
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// 19..19 stop trace (used with trace cache)
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// 18..18 mod==c0 (modrm)
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// 17..16 repUsed (0=none, 2=0xF2, 3=0xF3)
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Bit16u metaInfo3;
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// 15..12 (unused)
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// 11...8 ilen (0..15)
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Bit8u metaInfo2;
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// 7...7 extend8bit
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// 6...6 as64
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// 5...5 os64
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// 4...4 as32
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// 3...3 os32
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// 2...0 seg
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Bit8u metaInfo1;
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} metaInfo;
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struct {
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// 31..28 (unused)
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// 27..24 nnn (modrm)
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Bit8u modRMData4;
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// 23..20 (unused)
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// 19..16 base (sib)
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Bit8u modRMData3;
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// 15..14 mod (modrm)
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// 13..12 scale (sib)
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// 11...8 index (sib)
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Bit8u modRMData2;
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// 7...4 (unused)
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// 3...0 rm (modrm) // also used for opcodeReg()
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Bit8u modRMData1;
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} metaData;
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union {
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// Form (longest case): [opcode+modrm+sib/displacement32/immediate32]
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struct {
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union {
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Bit32u Id;
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Bit16u Iw;
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Bit8u Ib;
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};
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union {
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Bit16u displ16u; // for 16-bit modrm forms
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Bit32u displ32u; // for 32-bit modrm forms
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};
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} modRMForm;
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struct {
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union {
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Bit32u Id;
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Bit16u Iw;
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Bit8u Ib;
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};
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union {
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Bit32u Id2; // Not used (for alignment)
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Bit16u Iw2;
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Bit8u Ib2;
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};
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} IxIxForm;
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#if BX_SUPPORT_X86_64
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struct {
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Bit64u Iq; // for MOV Rx,imm64
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} IqForm;
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#endif
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};
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BX_CPP_INLINE unsigned opcodeReg() {
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// The opcodeReg form (low 3 bits of the opcode byte (extended
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// by REX.B on x86-64) to be used with IxIxForm or IqForm.
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return metaData.modRMData1;
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}
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// used in FPU only
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BX_CPP_INLINE unsigned modrm() {
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#if BX_SUPPORT_X86_64
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return mod() | (rm() & 7) | ((nnn() & 7) << 3);
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#else
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return mod() | rm() | (nnn() << 3);
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#endif
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}
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BX_CPP_INLINE unsigned mod() { return metaData.modRMData2 & 0xc0; }
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BX_CPP_INLINE unsigned modC0()
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{
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// This is a cheaper way to test for modRM instructions where
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// the mod field is 0xc0. FetchDecode flags this condition since
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// it is quite common to be tested for.
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return metaInfo.metaInfo3 & (1<<2);
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}
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BX_CPP_INLINE unsigned assertModC0()
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{
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return metaInfo.metaInfo3 |= (1<<2);
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}
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BX_CPP_INLINE unsigned nnn() {
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return metaData.modRMData4;
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}
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BX_CPP_INLINE unsigned rm() {
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return metaData.modRMData1;
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}
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BX_CPP_INLINE unsigned sibScale() {
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return (metaData.modRMData2 >> 4) & 0x3;
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}
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BX_CPP_INLINE unsigned sibIndex() {
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return (metaData.modRMData2) & 0xf;
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}
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BX_CPP_INLINE void setSibBase(unsigned base) {
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metaData.modRMData3 = base;
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}
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BX_CPP_INLINE unsigned sibBase() {
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return metaData.modRMData3;
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}
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BX_CPP_INLINE Bit32u displ32u() { return modRMForm.displ32u; }
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BX_CPP_INLINE Bit16u displ16u() { return modRMForm.displ16u; }
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BX_CPP_INLINE Bit32u Id() { return modRMForm.Id; }
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BX_CPP_INLINE Bit16u Iw() { return modRMForm.Iw; }
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BX_CPP_INLINE Bit8u Ib() { return modRMForm.Ib; }
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BX_CPP_INLINE Bit16u Iw2() { return IxIxForm.Iw2; } // Legacy
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BX_CPP_INLINE Bit8u Ib2() { return IxIxForm.Ib2; } // Legacy
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE Bit64u Iq() { return IqForm.Iq; }
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#endif
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// Info in the metaInfo field.
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// Note: the 'L' at the end of certain flags, means the value returned
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// is for Logical comparisons, eg if (i->os32L() && i->as32L()). If you
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// want a bx_bool value, use os32B() etc. This makes for smaller
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// code, when a strict 0 or 1 is not necessary.
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BX_CPP_INLINE void initMetaInfo(unsigned os32, unsigned as32,
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unsigned os64, unsigned as64)
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{
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metaInfo.metaInfo1 = BX_SEG_REG_NULL | (os32<<3) | (as32<<4) | (os64<<5) | (as64<<6);
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metaInfo.metaInfo2 = 0;
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metaInfo.metaInfo3 = 0;
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}
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BX_CPP_INLINE unsigned seg(void) {
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return metaInfo.metaInfo1 & 7;
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}
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BX_CPP_INLINE void setSeg(unsigned val) {
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~7) | val;
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}
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BX_CPP_INLINE unsigned os32L(void) {
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return metaInfo.metaInfo1 & (1<<3);
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}
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BX_CPP_INLINE unsigned os32B(void) {
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return (metaInfo.metaInfo1 >> 3) & 1;
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}
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BX_CPP_INLINE void setOs32B(unsigned bit) {
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<3)) | (bit<<3);
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}
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BX_CPP_INLINE void assertOs32(void) {
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metaInfo.metaInfo1 |= (1<<3);
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}
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BX_CPP_INLINE unsigned as32L(void) {
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return metaInfo.metaInfo1 & (1<<4);
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}
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BX_CPP_INLINE unsigned as32B(void) {
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return (metaInfo.metaInfo1 >> 4) & 1;
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}
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BX_CPP_INLINE void setAs32B(unsigned bit) {
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<4)) | (bit<<4);
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}
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE unsigned os64L(void) {
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return metaInfo.metaInfo1 & (1<<5);
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}
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BX_CPP_INLINE void assertOs64(void) {
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metaInfo.metaInfo1 |= (1<<5);
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}
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#else
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BX_CPP_INLINE unsigned os64L(void) { return 0; }
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#endif
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE unsigned as64L(void) {
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return metaInfo.metaInfo1 & (1<<6);
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}
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BX_CPP_INLINE void setAs64B(unsigned bit) {
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<6)) | (bit<<6);
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}
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#else
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BX_CPP_INLINE unsigned as64L(void) { return 0; }
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#endif
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE unsigned extend8bitL(void) {
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return metaInfo.metaInfo1 & (1<<7);
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}
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BX_CPP_INLINE void assertExtend8bit(void) {
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metaInfo.metaInfo1 |= (1<<7);
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}
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#endif
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BX_CPP_INLINE unsigned ilen(void) {
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return metaInfo.metaInfo2;
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}
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BX_CPP_INLINE void setILen(unsigned ilen) {
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metaInfo.metaInfo2 = ilen;
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}
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BX_CPP_INLINE unsigned repUsedL(void) {
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return metaInfo.metaInfo3 & 3;
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}
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BX_CPP_INLINE unsigned repUsedValue(void) {
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return metaInfo.metaInfo3 & 3;
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}
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BX_CPP_INLINE void setRepUsed(unsigned value) {
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metaInfo.metaInfo3 = (metaInfo.metaInfo3 & ~3) | (value);
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}
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#if BX_SUPPORT_TRACE_CACHE
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BX_CPP_INLINE void setStopTraceAttr(void) {
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metaInfo.metaInfo3 |= (1<<3);
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}
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BX_CPP_INLINE unsigned getStopTraceAttr(void) {
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return metaInfo.metaInfo3 & (1<<3);
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}
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#endif
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// Note this is the highest field, and thus needs no masking.
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// DON'T PUT ANY FIELDS HIGHER THAN THIS ONE WITHOUT ADDING A MASK.
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BX_CPP_INLINE unsigned b1(void) {
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return metaInfo.metaInfo3 >> 4;
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}
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BX_CPP_INLINE void setB1(unsigned b1) {
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metaInfo.metaInfo3 = (metaInfo.metaInfo3 & ~(0x1ff << 4)) | ((b1 & 0x1ff) << 4);
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}
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};
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// <TAG-CLASS-INSTRUCTION-END>
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// <TAG-TYPE-EXECUTEPTR-START>
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#if BX_USE_CPU_SMF
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typedef void (*BxExecutePtr_t)(bxInstruction_c *);
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typedef void (BX_CPP_AttrRegparmN(1) *BxExecutePtr_tR)(bxInstruction_c *);
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#else
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typedef void (BX_CPU_C::*BxExecutePtr_t)(bxInstruction_c *);
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typedef void (BX_CPU_C::*BxExecutePtr_tR)(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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#endif
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// <TAG-TYPE-EXECUTEPTR-END>
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#endif
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