I merged and succeded to remove some similar execution functions - less code, less chance for branch misprediction
This commit is contained in:
Stanislav Shwartsman
parent
4634e2cd4d
commit
7b80c5f481
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: arith16.cc,v 1.63 2008-01-10 19:37:51 sshwarts Exp $
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// $Id: arith16.cc,v 1.64 2008-01-25 19:34:29 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -600,12 +600,6 @@ void BX_CPU_C::INC_EwM(bxInstruction_c *i)
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SET_FLAGS_OSZAPC_INC_16(op1_16);
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}
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void BX_CPU_C::INC_EwR(bxInstruction_c *i)
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{
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Bit16u rx = ++BX_READ_16BIT_REG(i->rm());
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SET_FLAGS_OSZAPC_DEC_16(rx);
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}
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void BX_CPU_C::DEC_EwM(bxInstruction_c *i)
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{
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Bit16u op1_16;
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@ -619,12 +613,6 @@ void BX_CPU_C::DEC_EwM(bxInstruction_c *i)
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SET_FLAGS_OSZAPC_DEC_16(op1_16);
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}
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void BX_CPU_C::DEC_EwR(bxInstruction_c *i)
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{
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Bit16u rx = --BX_READ_16BIT_REG(i->rm());
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SET_FLAGS_OSZAPC_DEC_16(rx);
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}
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void BX_CPU_C::CMPXCHG_EwGwM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 4
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: arith32.cc,v 1.72 2008-01-10 19:37:51 sshwarts Exp $
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// $Id: arith32.cc,v 1.73 2008-01-25 19:34:29 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -38,7 +38,6 @@
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#define RDX EDX
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#endif
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void BX_CPU_C::INC_ERX(bxInstruction_c *i)
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{
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Bit32u erx = ++BX_READ_32BIT_REG(i->opcodeReg());
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@ -654,15 +653,6 @@ void BX_CPU_C::INC_EdM(bxInstruction_c *i)
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SET_FLAGS_OSZAPC_INC_32(op1_32);
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}
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void BX_CPU_C::INC_EdR(bxInstruction_c *i)
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{
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Bit32u op1_32 = BX_READ_32BIT_REG(i->rm());
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op1_32++;
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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SET_FLAGS_OSZAPC_INC_32(op1_32);
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}
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void BX_CPU_C::DEC_EdM(bxInstruction_c *i)
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{
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Bit32u op1_32;
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@ -676,15 +666,6 @@ void BX_CPU_C::DEC_EdM(bxInstruction_c *i)
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SET_FLAGS_OSZAPC_DEC_32(op1_32);
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}
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void BX_CPU_C::DEC_EdR(bxInstruction_c *i)
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{
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Bit32u op1_32 = BX_READ_32BIT_REG(i->rm());
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op1_32--;
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BX_WRITE_32BIT_REGZ(i->rm(), op1_32);
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SET_FLAGS_OSZAPC_DEC_32(op1_32);
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}
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void BX_CPU_C::CMPXCHG_EdGdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 4
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217
bochs/cpu/cpu.h
217
bochs/cpu/cpu.h
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.416 2008-01-22 16:20:30 sshwarts Exp $
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// $Id: cpu.h,v 1.417 2008-01-25 19:34:29 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -597,53 +597,55 @@ public:
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void (BX_CPU_C::*execute)(bxInstruction_c *);
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#endif
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// 31..29 (unused)
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// 28..20 b1 (9bits of opcode; 1byte-op=0..255, 2byte-op=256..511
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// (leave this one on top so no mask is needed)
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// 19..19 stop trace (used with trace cache)
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// 18..18 mod==c0 (modrm)
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// 17..16 repUsed (0=none, 2=0xF2, 3=0xF3).
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Bit16u metaInfo3;
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struct {
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// 31..29 (unused)
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// 28..20 b1 (9bits of opcode; 1byte-op=0..255, 2byte-op=256..511
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// (leave this one on top so no mask is needed)
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// 19..19 stop trace (used with trace cache)
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// 18..18 mod==c0 (modrm)
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// 17..16 repUsed (0=none, 2=0xF2, 3=0xF3)
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Bit16u metaInfo3;
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// 15..12 (unused)
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// 11...8 ilen (0..15)
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Bit8u metaInfo2;
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// 15..12 (unused)
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// 11...8 ilen (0..15)
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Bit8u metaInfo2;
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// 7...7 extend8bit
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// 6...6 as64
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// 5...5 os64
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// 4...4 as32
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// 3...3 os32
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// 2...0 seg
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Bit8u metaInfo1;
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// 7...7 extend8bit
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// 6...6 as64
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// 5...5 os64
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// 4...4 as32
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// 3...3 os32
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// 2...0 seg
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Bit8u metaInfo1;
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} metaInfo;
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struct {
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// 31..28 (unused)
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// 27..24 nnn (modrm)
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Bit8u modRMData4;
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// 23..20 (unused)
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// 19..16 base (sib)
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Bit8u modRMData3;
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// 15..14 mod (modrm)
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// 13..12 scale (sib)
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// 11...8 index (sib)
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Bit8u modRMData2;
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// 7...4 (unused)
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// 3...0 rm (modrm) // also used for opcodeReg()
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Bit8u modRMData1;
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} metaData;
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union {
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// Form (longest case): [opcode+modrm+sib/displacement32/immediate32]
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struct {
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// 31..28 (unused)
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// 27..24 nnn (modrm)
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Bit8u modRMData4;
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// 23..20 (unused)
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// 19..16 base (sib)
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Bit8u modRMData3;
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// 15..14 mod (modrm)
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// 13..12 scale (sib)
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// 11...8 index (sib)
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Bit8u modRMData2;
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// 7...4 (unused)
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// 3...0 rm (modrm)
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Bit8u modRMData1;
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union {
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Bit32u Id;
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Bit16u Iw;
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Bit8u Ib;
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Bit32u Id;
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Bit16u Iw;
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Bit8u Ib;
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};
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union {
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Bit16u displ16u; // for 16-bit modrm forms
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Bit32u displ32u; // for 32-bit modrm forms
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@ -651,36 +653,20 @@ public:
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} modRMForm;
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struct {
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Bit32u dummy;
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union {
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Bit32u Id;
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Bit16u Iw;
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Bit8u Ib;
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Bit32u Id;
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Bit16u Iw;
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Bit8u Ib;
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};
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union {
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Bit32u Id2; // Not used (for alignment)
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Bit16u Iw2;
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Bit8u Ib2;
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Bit32u Id2; // Not used (for alignment)
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Bit16u Iw2;
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Bit8u Ib2;
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};
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} IxIxForm;
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struct {
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// For opcodes which don't use modRM, but which encode the
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// register in the low 3 bits of the opcode, extended by the
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// REX.B bit on x86-64, the register value is cached in opcodeReg.
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Bit32u opcodeReg;
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union {
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Bit32u Id;
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Bit16u Iw;
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Bit8u Ib;
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};
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Bit32u dummy;
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} IxForm;
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#if BX_SUPPORT_X86_64
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// Form: [opcode/Iq]. These opcode never use a modrm sequence.
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struct {
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Bit32u opcodeReg;
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Bit64u Iq; // for MOV Rx,imm64
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} IqForm;
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#endif
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@ -688,9 +674,8 @@ public:
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BX_CPP_INLINE unsigned opcodeReg() {
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// The opcodeReg form (low 3 bits of the opcode byte (extended
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// by REX.B on x86-64) can be accessed by IxForm or IqForm. They
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// are aligned in the same place, so it doesn't matter.
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return IxForm.opcodeReg;
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// by REX.B on x86-64) to be used with IxIxForm or IqForm.
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return metaData.modRMData1;
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}
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// used in FPU only
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BX_CPP_INLINE unsigned modrm() {
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@ -700,32 +685,32 @@ public:
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return mod() | rm() | (nnn() << 3);
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#endif
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}
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BX_CPP_INLINE unsigned mod() { return modRMForm.modRMData2 & 0xc0; }
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BX_CPP_INLINE unsigned mod() { return metaData.modRMData2 & 0xc0; }
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BX_CPP_INLINE unsigned modC0()
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{
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// This is a cheaper way to test for modRM instructions where
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// the mod field is 0xc0. FetchDecode flags this condition since
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// it is quite common to be tested for.
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return metaInfo3 & (1<<2);
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return metaInfo.metaInfo3 & (1<<2);
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}
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BX_CPP_INLINE unsigned assertModC0()
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{
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return metaInfo3 |= (1<<2);
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return metaInfo.metaInfo3 |= (1<<2);
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}
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BX_CPP_INLINE unsigned nnn() {
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return modRMForm.modRMData4;
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return metaData.modRMData4;
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}
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BX_CPP_INLINE unsigned rm() {
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return modRMForm.modRMData1;
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return metaData.modRMData1;
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}
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BX_CPP_INLINE unsigned sibScale() {
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return (modRMForm.modRMData2 >> 4) & 0x3;
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return (metaData.modRMData2 >> 4) & 0x3;
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}
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BX_CPP_INLINE unsigned sibIndex() {
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return (modRMForm.modRMData2) & 0xf;
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return (metaData.modRMData2) & 0xf;
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}
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BX_CPP_INLINE unsigned sibBase() {
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return modRMForm.modRMData3;
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return metaData.modRMData3;
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}
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BX_CPP_INLINE Bit32u displ32u() { return modRMForm.displ32u; }
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BX_CPP_INLINE Bit16u displ16u() { return modRMForm.displ16u; }
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@ -746,46 +731,46 @@ public:
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BX_CPP_INLINE void initMetaInfo(unsigned os32, unsigned as32,
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unsigned os64, unsigned as64)
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{
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metaInfo1 = BX_SEG_REG_NULL | (os32<<3) | (as32<<4) | (os64<<5) | (as64<<6);
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metaInfo2 = 0;
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metaInfo3 = 0;
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metaInfo.metaInfo1 = BX_SEG_REG_NULL | (os32<<3) | (as32<<4) | (os64<<5) | (as64<<6);
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metaInfo.metaInfo2 = 0;
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metaInfo.metaInfo3 = 0;
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}
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BX_CPP_INLINE unsigned seg(void) {
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return metaInfo1 & 7;
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return metaInfo.metaInfo1 & 7;
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}
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BX_CPP_INLINE void setSeg(unsigned val) {
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metaInfo1 = (metaInfo1 & ~7) | val;
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~7) | val;
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}
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BX_CPP_INLINE unsigned os32L(void) {
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return metaInfo1 & (1<<3);
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return metaInfo.metaInfo1 & (1<<3);
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}
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BX_CPP_INLINE unsigned os32B(void) {
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return (metaInfo1 >> 3) & 1;
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return (metaInfo.metaInfo1 >> 3) & 1;
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}
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BX_CPP_INLINE void setOs32B(unsigned bit) {
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metaInfo1 = (metaInfo1 & ~(1<<3)) | (bit<<3);
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<3)) | (bit<<3);
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}
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BX_CPP_INLINE void assertOs32(void) {
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metaInfo1 |= (1<<3);
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metaInfo.metaInfo1 |= (1<<3);
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}
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BX_CPP_INLINE unsigned as32L(void) {
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return metaInfo1 & (1<<4);
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return metaInfo.metaInfo1 & (1<<4);
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}
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BX_CPP_INLINE unsigned as32B(void) {
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return (metaInfo1 >> 4) & 1;
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return (metaInfo.metaInfo1 >> 4) & 1;
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}
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BX_CPP_INLINE void setAs32B(unsigned bit) {
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metaInfo1 = (metaInfo1 & ~(1<<4)) | (bit<<4);
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<4)) | (bit<<4);
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}
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE unsigned os64L(void) {
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return metaInfo1 & (1<<5);
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return metaInfo.metaInfo1 & (1<<5);
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}
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BX_CPP_INLINE void assertOs64(void) {
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metaInfo1 |= (1<<5);
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metaInfo.metaInfo1 |= (1<<5);
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}
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#else
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BX_CPP_INLINE unsigned os64L(void) { return 0; }
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@ -793,10 +778,10 @@ public:
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE unsigned as64L(void) {
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return metaInfo1 & (1<<6);
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return metaInfo.metaInfo1 & (1<<6);
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}
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BX_CPP_INLINE void setAs64B(unsigned bit) {
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metaInfo1 = (metaInfo1 & ~(1<<6)) | (bit<<6);
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metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~(1<<6)) | (bit<<6);
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}
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#else
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BX_CPP_INLINE unsigned as64L(void) { return 0; }
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@ -804,46 +789,46 @@ public:
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE unsigned extend8bitL(void) {
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return metaInfo1 & (1<<7);
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return metaInfo.metaInfo1 & (1<<7);
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}
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BX_CPP_INLINE void assertExtend8bit(void) {
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metaInfo1 |= (1<<7);
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metaInfo.metaInfo1 |= (1<<7);
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}
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#endif
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BX_CPP_INLINE unsigned ilen(void) {
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return metaInfo2;
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return metaInfo.metaInfo2;
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}
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BX_CPP_INLINE void setILen(unsigned ilen) {
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metaInfo2 = ilen;
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metaInfo.metaInfo2 = ilen;
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}
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BX_CPP_INLINE unsigned repUsedL(void) {
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return metaInfo3 & 3;
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return metaInfo.metaInfo3 & 3;
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}
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BX_CPP_INLINE unsigned repUsedValue(void) {
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return metaInfo3 & 3;
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return metaInfo.metaInfo3 & 3;
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}
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BX_CPP_INLINE void setRepUsed(unsigned value) {
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metaInfo3 = (metaInfo3 & ~3) | (value);
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metaInfo.metaInfo3 = (metaInfo.metaInfo3 & ~3) | (value);
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}
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#if BX_SUPPORT_TRACE_CACHE
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BX_CPP_INLINE void setStopTraceAttr(void) {
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metaInfo3 |= (1<<3);
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metaInfo.metaInfo3 |= (1<<3);
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}
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BX_CPP_INLINE unsigned getStopTraceAttr(void) {
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return metaInfo3 & (1<<3);
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return metaInfo.metaInfo3 & (1<<3);
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}
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#endif
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// Note this is the highest field, and thus needs no masking.
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// DON'T PUT ANY FIELDS HIGHER THAN THIS ONE WITHOUT ADDING A MASK.
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BX_CPP_INLINE unsigned b1(void) {
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return metaInfo3 >> 4;
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return metaInfo.metaInfo3 >> 4;
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}
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BX_CPP_INLINE void setB1(unsigned b1) {
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metaInfo3 = (metaInfo3 & ~(0x1ff << 4)) | ((b1 & 0x1ff) << 4);
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metaInfo.metaInfo3 = (metaInfo.metaInfo3 & ~(0x1ff << 4)) | ((b1 & 0x1ff) << 4);
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}
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};
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// <TAG-CLASS-INSTRUCTION-END>
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@ -1539,10 +1524,6 @@ public: // for now...
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BX_SMF void MOV_EwIwM(bxInstruction_c *);
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BX_SMF void MOV_EbIbM(bxInstruction_c *);
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BX_SMF void MOV_EdIdR(bxInstruction_c *);
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BX_SMF void MOV_EwIwR(bxInstruction_c *);
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BX_SMF void MOV_EbIbR(bxInstruction_c *);
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BX_SMF void ENTER16_IwIb(bxInstruction_c *);
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BX_SMF void ENTER32_IwIb(bxInstruction_c *);
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BX_SMF void LEAVE(bxInstruction_c *);
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@ -1967,11 +1948,7 @@ public: // for now...
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BX_SMF void IDIV_EAXEd(bxInstruction_c *);
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BX_SMF void INC_EbR(bxInstruction_c *);
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BX_SMF void INC_EwR(bxInstruction_c *);
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BX_SMF void INC_EdR(bxInstruction_c *);
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BX_SMF void DEC_EbR(bxInstruction_c *);
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BX_SMF void DEC_EwR(bxInstruction_c *);
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BX_SMF void DEC_EdR(bxInstruction_c *);
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BX_SMF void INC_EbM(bxInstruction_c *);
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BX_SMF void INC_EwM(bxInstruction_c *);
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@ -1995,11 +1972,6 @@ public: // for now...
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BX_SMF void JMP_EdM(bxInstruction_c *);
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BX_SMF void JMP_EwM(bxInstruction_c *);
|
||||
|
||||
BX_SMF void PUSH_EwR(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EdR(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EwM(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EdM(bxInstruction_c *);
|
||||
|
||||
BX_SMF void SLDT_Ew(bxInstruction_c *);
|
||||
BX_SMF void STR_Ew(bxInstruction_c *);
|
||||
BX_SMF void LLDT_Ew(bxInstruction_c *);
|
||||
@ -2747,17 +2719,18 @@ public: // for now...
|
||||
BX_SMF void DEC_RX(bxInstruction_c *);
|
||||
BX_SMF void INC_ERX(bxInstruction_c *);
|
||||
BX_SMF void DEC_ERX(bxInstruction_c *);
|
||||
BX_SMF void PUSH_RX(bxInstruction_c *);
|
||||
BX_SMF void POP_RX(bxInstruction_c *);
|
||||
BX_SMF void PUSH_ERX(bxInstruction_c *);
|
||||
BX_SMF void POP_ERX(bxInstruction_c *);
|
||||
BX_SMF void XCHG_RXAX(bxInstruction_c *);
|
||||
BX_SMF void XCHG_ERXEAX(bxInstruction_c *);
|
||||
|
||||
BX_SMF void PUSH_RX(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EwM(bxInstruction_c *);
|
||||
BX_SMF void PUSH_ERX(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EdM(bxInstruction_c *);
|
||||
|
||||
BX_SMF void POP_RX(bxInstruction_c *);
|
||||
BX_SMF void POP_EwM(bxInstruction_c *);
|
||||
BX_SMF void POP_ERX(bxInstruction_c *);
|
||||
BX_SMF void POP_EdM(bxInstruction_c *);
|
||||
BX_SMF void POP_EwR(bxInstruction_c *);
|
||||
BX_SMF void POP_EdR(bxInstruction_c *);
|
||||
|
||||
BX_SMF void POPCNT_GwEw(bxInstruction_c *);
|
||||
BX_SMF void POPCNT_GdEd(bxInstruction_c *);
|
||||
@ -2990,8 +2963,6 @@ public: // for now...
|
||||
BX_SMF void JMP_EqM(bxInstruction_c *);
|
||||
BX_SMF void JMP_EqR(bxInstruction_c *);
|
||||
BX_SMF void JMP64_Ep(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EqR(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EqM(bxInstruction_c *);
|
||||
BX_SMF void PUSHF_Fq(bxInstruction_c *);
|
||||
BX_SMF void POPF_Fq(bxInstruction_c *);
|
||||
|
||||
@ -3042,11 +3013,11 @@ public: // for now...
|
||||
BX_SMF void CMOVNLE_GqEqR(bxInstruction_c *);
|
||||
|
||||
BX_SMF void MOV_RRXIq(bxInstruction_c *);
|
||||
BX_SMF void PUSH_EqM(bxInstruction_c *);
|
||||
BX_SMF void PUSH_RRX(bxInstruction_c *);
|
||||
BX_SMF void POP_EqM(bxInstruction_c *);
|
||||
BX_SMF void POP_RRX(bxInstruction_c *);
|
||||
BX_SMF void XCHG_RRXRAX(bxInstruction_c *);
|
||||
BX_SMF void POP_EqR(bxInstruction_c *);
|
||||
BX_SMF void POP_EqM(bxInstruction_c *);
|
||||
|
||||
BX_SMF void PUSH64_Id(bxInstruction_c *);
|
||||
BX_SMF void PUSH64_FS(bxInstruction_c *);
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: data_xfer16.cc,v 1.54 2008-01-21 21:36:58 sshwarts Exp $
|
||||
// $Id: data_xfer16.cc,v 1.55 2008-01-25 19:34:29 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -149,11 +149,6 @@ void BX_CPU_C::MOV_EwIwM(bxInstruction_c *i)
|
||||
write_virtual_word(i->seg(), RMAddr(i), i->Iw());
|
||||
}
|
||||
|
||||
void BX_CPU_C::MOV_EwIwR(bxInstruction_c *i)
|
||||
{
|
||||
BX_WRITE_16BIT_REG(i->rm(), i->Iw());
|
||||
}
|
||||
|
||||
#if BX_CPU_LEVEL >= 3
|
||||
void BX_CPU_C::MOVZX_GwEbM(bxInstruction_c *i)
|
||||
{
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: data_xfer32.cc,v 1.52 2008-01-10 19:37:52 sshwarts Exp $
|
||||
// $Id: data_xfer32.cc,v 1.53 2008-01-25 19:34:29 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -101,11 +101,6 @@ void BX_CPU_C::MOV_EdIdM(bxInstruction_c *i)
|
||||
write_virtual_dword(i->seg(), RMAddr(i), i->Id());
|
||||
}
|
||||
|
||||
void BX_CPU_C::MOV_EdIdR(bxInstruction_c *i)
|
||||
{
|
||||
BX_WRITE_32BIT_REGZ(i->rm(), i->Id());
|
||||
}
|
||||
|
||||
void BX_CPU_C::MOVZX_GdEbM(bxInstruction_c *i)
|
||||
{
|
||||
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: data_xfer8.cc,v 1.35 2008-01-10 19:37:52 sshwarts Exp $
|
||||
// $Id: data_xfer8.cc,v 1.36 2008-01-25 19:34:29 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -34,7 +34,7 @@
|
||||
|
||||
void BX_CPU_C::MOV_RLIb(bxInstruction_c *i)
|
||||
{
|
||||
BX_READ_8BIT_REGx(i->opcodeReg(), i->extend8bitL()) = i->Ib();
|
||||
BX_WRITE_8BIT_REGx(i->opcodeReg(), i->extend8bitL(), i->Ib());
|
||||
}
|
||||
|
||||
void BX_CPU_C::MOV_RHIb(bxInstruction_c *i)
|
||||
@ -86,11 +86,6 @@ void BX_CPU_C::MOV_EbIbM(bxInstruction_c *i)
|
||||
write_virtual_byte(i->seg(), RMAddr(i), i->Ib());
|
||||
}
|
||||
|
||||
void BX_CPU_C::MOV_EbIbR(bxInstruction_c *i)
|
||||
{
|
||||
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), i->Ib());
|
||||
}
|
||||
|
||||
void BX_CPU_C::XLAT(bxInstruction_c *i)
|
||||
{
|
||||
bx_address offset;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: fetchdecode.cc,v 1.160 2008-01-20 20:11:17 sshwarts Exp $
|
||||
// $Id: fetchdecode.cc,v 1.161 2008-01-25 19:34:29 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -327,7 +327,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
|
||||
/* 8C /wr */ { 0, &BX_CPU_C::MOV_EwSw },
|
||||
/* 8D /wr */ { 0, &BX_CPU_C::BxError }, // LEA
|
||||
/* 8E /wr */ { BxTraceEnd, &BX_CPU_C::MOV_SwEw }, // async_event = 1
|
||||
/* 8F /wr */ { 0, &BX_CPU_C::POP_EwR },
|
||||
/* 8F /wr */ { 0, &BX_CPU_C::POP_RX }, // POP_EwR
|
||||
/* 90 /wr */ { 0, &BX_CPU_C::NOP },
|
||||
/* 91 /wr */ { 0, &BX_CPU_C::XCHG_RXAX },
|
||||
/* 92 /wr */ { 0, &BX_CPU_C::XCHG_RXAX },
|
||||
@ -382,8 +382,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
|
||||
/* C3 /wr */ { BxTraceEnd, &BX_CPU_C::RETnear16 },
|
||||
/* C4 /wr */ { 0, &BX_CPU_C::BxError }, // LES
|
||||
/* C5 /wr */ { 0, &BX_CPU_C::BxError }, // LDS
|
||||
/* C6 /wr */ { BxImmediate_Ib, &BX_CPU_C::MOV_EbIbR },
|
||||
/* C7 /wr */ { BxImmediate_Iw, &BX_CPU_C::MOV_EwIwR },
|
||||
/* C6 /wr */ { BxImmediate_Ib, &BX_CPU_C::MOV_RLIb }, // MOV_EbIbR
|
||||
/* C7 /wr */ { BxImmediate_Iw, &BX_CPU_C::MOV_RXIw }, // MOV_EwIwR
|
||||
/* C8 /wr */ { BxImmediate_IwIb, &BX_CPU_C::ENTER16_IwIb },
|
||||
/* C9 /wr */ { 0, &BX_CPU_C::LEAVE },
|
||||
/* CA /wr */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar16_Iw },
|
||||
@ -891,7 +891,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
|
||||
/* 8C /dr */ { 0, &BX_CPU_C::MOV_EwSw },
|
||||
/* 8D /dr */ { 0, &BX_CPU_C::BxError }, // LEA
|
||||
/* 8E /dr */ { BxTraceEnd, &BX_CPU_C::MOV_SwEw }, // async_event = 1
|
||||
/* 8F /dr */ { 0, &BX_CPU_C::POP_EdR },
|
||||
/* 8F /dr */ { 0, &BX_CPU_C::POP_ERX }, // POP_EdR
|
||||
/* 90 /dr */ { 0, &BX_CPU_C::NOP },
|
||||
/* 91 /dr */ { 0, &BX_CPU_C::XCHG_ERXEAX },
|
||||
/* 92 /dr */ { 0, &BX_CPU_C::XCHG_ERXEAX },
|
||||
@ -946,8 +946,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
|
||||
/* C3 /dr */ { BxTraceEnd, &BX_CPU_C::RETnear32 },
|
||||
/* C4 /dr */ { 0, &BX_CPU_C::BxError }, // LES
|
||||
/* C5 /dr */ { 0, &BX_CPU_C::BxError }, // LDS
|
||||
/* C6 /dr */ { BxImmediate_Ib, &BX_CPU_C::MOV_EbIbR },
|
||||
/* C7 /dr */ { BxImmediate_Id, &BX_CPU_C::MOV_EdIdR },
|
||||
/* C6 /dr */ { BxImmediate_Ib, &BX_CPU_C::MOV_RLIb }, // MOV_EbIbR
|
||||
/* C7 /dr */ { BxImmediate_Id, &BX_CPU_C::MOV_ERXId }, // MOV_EdIdR
|
||||
/* C8 /dr */ { BxImmediate_IwIb, &BX_CPU_C::ENTER32_IwIb },
|
||||
/* C9 /dr */ { 0, &BX_CPU_C::LEAVE },
|
||||
/* CA /dr */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar32_Iw },
|
||||
@ -2605,10 +2605,12 @@ fetch_b1:
|
||||
if ((b1 & ~3) == 0x120)
|
||||
mod = 0xc0;
|
||||
|
||||
i->modRMForm.modRMData1 = rm;
|
||||
i->modRMForm.modRMData2 = mod;
|
||||
i->modRMForm.modRMData3 = rm; // initialize with rm to use BxResolve32Base
|
||||
i->modRMForm.modRMData4 = nnn;
|
||||
i->metaData.modRMData1 = rm;
|
||||
i->metaData.modRMData2 = mod;
|
||||
i->metaData.modRMData3 = rm; // initialize with rm to use BxResolve32Base
|
||||
i->metaData.modRMData4 = nnn;
|
||||
|
||||
// initialize displ32 with zero to include cases with no diplacement
|
||||
i->modRMForm.displ32u = 0;
|
||||
|
||||
if (mod == 0xc0) { // mod == 11b
|
||||
@ -2664,9 +2666,9 @@ get_8bit_displ:
|
||||
base = sib & 0x7; sib >>= 3;
|
||||
index = sib & 0x7; sib >>= 3;
|
||||
scale = sib;
|
||||
i->modRMForm.modRMData3 = (base);
|
||||
i->modRMForm.modRMData2 |= (index);
|
||||
i->modRMForm.modRMData2 |= (scale<<4);
|
||||
i->metaData.modRMData3 = (base);
|
||||
i->metaData.modRMData2 |= (index);
|
||||
i->metaData.modRMData2 |= (scale<<4);
|
||||
if (index == 4)
|
||||
i->ResolveModrm = &BX_CPU_C::BxResolve32Base;
|
||||
else
|
||||
@ -2790,7 +2792,7 @@ modrm_done:
|
||||
// the if() above after fetching the 2nd byte, so this path is
|
||||
// taken in all cases if a modrm byte is NOT required.
|
||||
i->execute = BxOpcodeInfo32R[b1+offset].ExecutePtr;
|
||||
i->IxForm.opcodeReg = b1 & 7;
|
||||
i->metaData.modRMData1 = b1 & 7;
|
||||
}
|
||||
|
||||
if (lock) { // lock prefix invalid opcode
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: fetchdecode.h,v 1.49 2008-01-12 16:40:38 sshwarts Exp $
|
||||
// $Id: fetchdecode.h,v 1.50 2008-01-25 19:34:29 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2005 Stanislav Shwartsman
|
||||
@ -2922,13 +2922,13 @@ static const BxOpcodeInfo_t BxOpcodeInfoG5wM[8] = {
|
||||
|
||||
static const BxOpcodeInfo_t BxOpcodeInfoG5wR[8] = {
|
||||
// attributes defined in main area
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_EwR },
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_EwR },
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_RX }, // DEC_EwR
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_RX }, // DEC_EwR
|
||||
/* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_EwR },
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL16_Ep
|
||||
/* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_EwR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP16_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_EwR },
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_RX }, // PUSH_EwR
|
||||
/* 7 */ { 0, &BX_CPU_C::BxError }
|
||||
};
|
||||
|
||||
@ -2946,13 +2946,13 @@ static const BxOpcodeInfo_t BxOpcodeInfoG5dM[8] = {
|
||||
|
||||
static const BxOpcodeInfo_t BxOpcodeInfoG5dR[8] = {
|
||||
// attributes defined in main area
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_EdR },
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_EdR },
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_ERX }, // INC_EdR
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_ERX }, // DEC_EdR
|
||||
/* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_EdR },
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL32_Ep
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL32_Ep
|
||||
/* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_EdR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP32_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_EdR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP32_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_ERX }, // PUSH_EdR
|
||||
/* 7 */ { 0, &BX_CPU_C::BxError }
|
||||
};
|
||||
|
||||
@ -2969,13 +2969,13 @@ static const BxOpcodeInfo_t BxOpcodeInfo64G5wM[8] = {
|
||||
};
|
||||
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo64G5wR[8] = {
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_EwR },
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_EwR },
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_RX }, // INC_EwR
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_RX }, // DEC_EwR
|
||||
/* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_EqR },
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL16_Ep
|
||||
/* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_EqR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP16_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_EwR },
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_RX }, // PUSH_EwR
|
||||
/* 7 */ { 0, &BX_CPU_C::BxError }
|
||||
};
|
||||
|
||||
@ -2991,13 +2991,13 @@ static const BxOpcodeInfo_t BxOpcodeInfo64G5dM[8] = {
|
||||
};
|
||||
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo64G5dR[8] = {
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_EdR },
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_EdR },
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_ERX }, // INC_EdR
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_ERX }, // DEC_EdR
|
||||
/* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_EqR },
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL32_Ep
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL32_Ep
|
||||
/* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_EqR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP32_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_EqR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP32_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_RRX }, // PUSH_EqR
|
||||
/* 7 */ { 0, &BX_CPU_C::BxError }
|
||||
};
|
||||
|
||||
@ -3016,10 +3016,10 @@ static const BxOpcodeInfo_t BxOpcodeInfo64G5qR[8] = {
|
||||
/* 0 */ { 0, &BX_CPU_C::INC_EqR },
|
||||
/* 1 */ { 0, &BX_CPU_C::DEC_EqR },
|
||||
/* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_EqR },
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL64_Ep
|
||||
/* 3 */ { 0, &BX_CPU_C::BxError }, // CALL64_Ep
|
||||
/* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_EqR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP64_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_EqR },
|
||||
/* 5 */ { 0, &BX_CPU_C::BxError }, // JMP64_Ep
|
||||
/* 6 */ { 0, &BX_CPU_C::PUSH_RRX }, // PUSH_EqR
|
||||
/* 7 */ { 0, &BX_CPU_C::BxError }
|
||||
};
|
||||
#endif
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: fetchdecode64.cc,v 1.167 2008-01-20 20:11:17 sshwarts Exp $
|
||||
// $Id: fetchdecode64.cc,v 1.168 2008-01-25 19:34:29 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -316,7 +316,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
|
||||
/* 8C /wr */ { 0, &BX_CPU_C::MOV_EwSw },
|
||||
/* 8D /wr */ { 0, &BX_CPU_C::BxError }, // LEA
|
||||
/* 8E /wr */ { BxTraceEnd, &BX_CPU_C::MOV_SwEw }, // async_event = 1
|
||||
/* 8F /wr */ { 0, &BX_CPU_C::POP_EwR },
|
||||
/* 8F /wr */ { 0, &BX_CPU_C::POP_RX }, // POP_EwR
|
||||
/* 90 /wr */ { 0, &BX_CPU_C::XCHG_RXAX }, // handles XCHG R8w, AX
|
||||
/* 91 /wr */ { 0, &BX_CPU_C::XCHG_RXAX },
|
||||
/* 92 /wr */ { 0, &BX_CPU_C::XCHG_RXAX },
|
||||
@ -371,8 +371,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
|
||||
/* C3 /wr */ { BxTraceEnd, &BX_CPU_C::RETnear16 },
|
||||
/* C4 /wr */ { 0, &BX_CPU_C::BxError },
|
||||
/* C5 /wr */ { 0, &BX_CPU_C::BxError },
|
||||
/* C6 /wr */ { BxImmediate_Ib, &BX_CPU_C::MOV_EbIbR },
|
||||
/* C7 /wr */ { BxImmediate_Iw, &BX_CPU_C::MOV_EwIwR },
|
||||
/* C6 /wr */ { BxImmediate_Ib, &BX_CPU_C::MOV_RLIb }, // MOV_EbIbR
|
||||
/* C7 /wr */ { BxImmediate_Iw, &BX_CPU_C::MOV_RXIw }, // MOV_EwIwR
|
||||
/* C8 /wr */ { BxImmediate_IwIb, &BX_CPU_C::ENTER64_IwIb },
|
||||
/* C9 /wr */ { 0, &BX_CPU_C::LEAVE64 },
|
||||
/* CA /wr */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar16_Iw },
|
||||
@ -845,7 +845,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
|
||||
/* 8C /dr */ { 0, &BX_CPU_C::MOV_EwSw },
|
||||
/* 8D /dr */ { 0, &BX_CPU_C::BxError }, // LEA
|
||||
/* 8E /dr */ { BxTraceEnd, &BX_CPU_C::MOV_SwEw }, // async_event = 1
|
||||
/* 8F /dr */ { 0, &BX_CPU_C::POP_EqR },
|
||||
/* 8F /dr */ { 0, &BX_CPU_C::POP_RRX }, // POP_EqR
|
||||
/* 90 /dr */ { 0, &BX_CPU_C::XCHG_ERXEAX }, // handles XCHG R8d, EAX
|
||||
/* 91 /dr */ { 0, &BX_CPU_C::XCHG_ERXEAX },
|
||||
/* 92 /dr */ { 0, &BX_CPU_C::XCHG_ERXEAX },
|
||||
@ -900,8 +900,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
|
||||
/* C3 /dr */ { BxTraceEnd, &BX_CPU_C::RETnear64 },
|
||||
/* C4 /dr */ { 0, &BX_CPU_C::BxError },
|
||||
/* C5 /dr */ { 0, &BX_CPU_C::BxError },
|
||||
/* C6 /dr */ { BxImmediate_Ib, &BX_CPU_C::MOV_EbIbR },
|
||||
/* C7 /dr */ { BxImmediate_Id, &BX_CPU_C::MOV_EdIdR },
|
||||
/* C6 /dr */ { BxImmediate_Ib, &BX_CPU_C::MOV_RLIb }, // MOV_EbIbR
|
||||
/* C7 /dr */ { BxImmediate_Id, &BX_CPU_C::MOV_ERXId }, // MOV_EdIdR
|
||||
/* C8 /dr */ { BxImmediate_IwIb, &BX_CPU_C::ENTER64_IwIb },
|
||||
/* C9 /dr */ { 0, &BX_CPU_C::LEAVE64 },
|
||||
/* CA /dr */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar32_Iw },
|
||||
@ -1374,7 +1374,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
|
||||
/* 8C /qr */ { 0, &BX_CPU_C::MOV_EwSw },
|
||||
/* 8D /qr */ { 0, &BX_CPU_C::BxError }, // LEA
|
||||
/* 8E /qr */ { BxTraceEnd, &BX_CPU_C::MOV_SwEw }, // async_event = 1
|
||||
/* 8F /qr */ { 0, &BX_CPU_C::POP_EqR },
|
||||
/* 8F /qr */ { 0, &BX_CPU_C::POP_RRX }, // POP_EqR
|
||||
/* 90 /qr */ { 0, &BX_CPU_C::XCHG_RRXRAX }, // handles XCHG R8, RAX
|
||||
/* 91 /qr */ { 0, &BX_CPU_C::XCHG_RRXRAX },
|
||||
/* 92 /qr */ { 0, &BX_CPU_C::XCHG_RRXRAX },
|
||||
@ -1429,7 +1429,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
|
||||
/* C3 /qr */ { BxTraceEnd, &BX_CPU_C::RETnear64 },
|
||||
/* C4 /qr */ { 0, &BX_CPU_C::BxError },
|
||||
/* C5 /qr */ { 0, &BX_CPU_C::BxError },
|
||||
/* C6 /qr */ { BxImmediate_Ib, &BX_CPU_C::MOV_EbIbR },
|
||||
/* C6 /dr */ { BxImmediate_Ib, &BX_CPU_C::MOV_RLIb }, // MOV_EbIbR
|
||||
/* C7 /qr */ { BxImmediate_Id, &BX_CPU_C::MOV_EqIdR },
|
||||
/* C8 /qr */ { BxImmediate_IwIb, &BX_CPU_C::ENTER64_IwIb },
|
||||
/* C9 /qr */ { 0, &BX_CPU_C::LEAVE64 },
|
||||
@ -3532,10 +3532,12 @@ fetch_b1:
|
||||
if ((b1 & ~3) == 0x120)
|
||||
mod = 0xc0;
|
||||
|
||||
i->modRMForm.modRMData1 = rm;
|
||||
i->modRMForm.modRMData2 = mod;
|
||||
i->modRMForm.modRMData3 = rm; // initialize with rm to use BxResolve64Base
|
||||
i->modRMForm.modRMData4 = nnn;
|
||||
i->metaData.modRMData1 = rm;
|
||||
i->metaData.modRMData2 = mod;
|
||||
i->metaData.modRMData3 = rm; // initialize with rm to use BxResolve64Base
|
||||
i->metaData.modRMData4 = nnn;
|
||||
|
||||
// initialize displ32 with zero to include cases with no diplacement
|
||||
i->modRMForm.displ32u = 0;
|
||||
|
||||
if (mod == 0xc0) { // mod == 11b
|
||||
@ -3591,9 +3593,9 @@ get_8bit_displ:
|
||||
base = (sib & 0x7) | rex_b; sib >>= 3;
|
||||
index = (sib & 0x7) | rex_x; sib >>= 3;
|
||||
scale = sib;
|
||||
i->modRMForm.modRMData3 = (base);
|
||||
i->modRMForm.modRMData2 |= (index);
|
||||
i->modRMForm.modRMData2 |= (scale<<4);
|
||||
i->metaData.modRMData3 = (base);
|
||||
i->metaData.modRMData2 |= (index);
|
||||
i->metaData.modRMData2 |= (scale<<4);
|
||||
if (index == 4)
|
||||
i->ResolveModrm = &BX_CPU_C::BxResolve64Base;
|
||||
else
|
||||
@ -3652,9 +3654,9 @@ get_8bit_displ:
|
||||
base = (sib & 0x7) | rex_b; sib >>= 3;
|
||||
index = (sib & 0x7) | rex_x; sib >>= 3;
|
||||
scale = sib;
|
||||
i->modRMForm.modRMData3 = (base);
|
||||
i->modRMForm.modRMData2 |= (index);
|
||||
i->modRMForm.modRMData2 |= (scale<<4);
|
||||
i->metaData.modRMData3 = (base);
|
||||
i->metaData.modRMData2 |= (index);
|
||||
i->metaData.modRMData2 |= (scale<<4);
|
||||
if (index == 4)
|
||||
i->ResolveModrm = &BX_CPU_C::BxResolve32Base;
|
||||
else
|
||||
@ -3744,7 +3746,7 @@ modrm_done:
|
||||
// the if() above after fetching the 2nd byte, so this path is
|
||||
// taken in all cases if a modrm byte is NOT required.
|
||||
i->execute = BxOpcodeInfo64R[b1+offset].ExecutePtr;
|
||||
i->IxForm.opcodeReg = (b1 & 7) | rex_b;
|
||||
i->metaData.modRMData1 = (b1 & 7) | rex_b;
|
||||
}
|
||||
|
||||
if (lock) { // lock prefix invalid opcode
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: stack16.cc,v 1.31 2008-01-10 19:37:56 sshwarts Exp $
|
||||
// $Id: stack16.cc,v 1.32 2008-01-25 19:34:30 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -157,11 +157,6 @@ void BX_CPU_C::POP_EwM(bxInstruction_c *i)
|
||||
BX_CPU_THIS_PTR speculative_rsp = 0;
|
||||
}
|
||||
|
||||
void BX_CPU_C::POP_EwR(bxInstruction_c *i)
|
||||
{
|
||||
BX_WRITE_16BIT_REG(i->rm(), pop_16());
|
||||
}
|
||||
|
||||
void BX_CPU_C::PUSH_Iw(bxInstruction_c *i)
|
||||
{
|
||||
push_16(i->Iw());
|
||||
@ -176,11 +171,6 @@ void BX_CPU_C::PUSH_EwM(bxInstruction_c *i)
|
||||
push_16(op1_16);
|
||||
}
|
||||
|
||||
void BX_CPU_C::PUSH_EwR(bxInstruction_c *i)
|
||||
{
|
||||
push_16(BX_READ_16BIT_REG(i->rm()));
|
||||
}
|
||||
|
||||
#if BX_CPU_LEVEL >= 3
|
||||
void BX_CPU_C::PUSHAD16(bxInstruction_c *i)
|
||||
{
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: stack32.cc,v 1.45 2008-01-10 19:37:56 sshwarts Exp $
|
||||
// $Id: stack32.cc,v 1.46 2008-01-25 19:34:30 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -55,11 +55,6 @@ void BX_CPU_C::POP_EdM(bxInstruction_c *i)
|
||||
BX_CPU_THIS_PTR speculative_rsp = 0;
|
||||
}
|
||||
|
||||
void BX_CPU_C::POP_EdR(bxInstruction_c *i)
|
||||
{
|
||||
BX_WRITE_32BIT_REGZ(i->rm(), pop_32());
|
||||
}
|
||||
|
||||
void BX_CPU_C::PUSH_ERX(bxInstruction_c *i)
|
||||
{
|
||||
push_32(BX_READ_32BIT_REG(i->opcodeReg()));
|
||||
@ -177,11 +172,6 @@ void BX_CPU_C::PUSH_EdM(bxInstruction_c *i)
|
||||
push_32(op1_32);
|
||||
}
|
||||
|
||||
void BX_CPU_C::PUSH_EdR(bxInstruction_c *i)
|
||||
{
|
||||
push_32(BX_READ_32BIT_REG(i->rm()));
|
||||
}
|
||||
|
||||
void BX_CPU_C::PUSHAD32(bxInstruction_c *i)
|
||||
{
|
||||
Bit32u temp_ESP = ESP;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: stack64.cc,v 1.34 2008-01-10 19:37:56 sshwarts Exp $
|
||||
// $Id: stack64.cc,v 1.35 2008-01-25 19:34:30 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -51,11 +51,6 @@ void BX_CPU_C::POP_EqM(bxInstruction_c *i)
|
||||
BX_CPU_THIS_PTR speculative_rsp = 0;
|
||||
}
|
||||
|
||||
void BX_CPU_C::POP_EqR(bxInstruction_c *i)
|
||||
{
|
||||
BX_WRITE_64BIT_REG(i->rm(), pop_64());
|
||||
}
|
||||
|
||||
void BX_CPU_C::PUSH_RRX(bxInstruction_c *i)
|
||||
{
|
||||
push_64(BX_READ_64BIT_REG(i->opcodeReg()));
|
||||
@ -107,11 +102,6 @@ void BX_CPU_C::PUSH_EqM(bxInstruction_c *i)
|
||||
push_64(op1_64);
|
||||
}
|
||||
|
||||
void BX_CPU_C::PUSH_EqR(bxInstruction_c *i)
|
||||
{
|
||||
push_64(BX_READ_64BIT_REG(i->rm()));
|
||||
}
|
||||
|
||||
void BX_CPU_C::ENTER64_IwIb(bxInstruction_c *i)
|
||||
{
|
||||
Bit8u level = i->Ib2();
|
||||
|
||||
Loading…
Reference in New Issue
Block a user