Organize bxInstruction fields differently
This commit is contained in:
Stanislav Shwartsman
parent
65adf7014b
commit
255d512e29
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: bit.cc,v 1.53 2008-03-27 21:04:39 sshwarts Exp $
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// $Id: bit.cc,v 1.54 2008-03-31 17:33:30 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -293,45 +293,43 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSWAP_RRX(bxInstruction_c *i)
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#if (BX_SUPPORT_SSE >= 5) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
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// primitives for CRC32 usage
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static Bit8u BitReflect8(Bit8u val8)
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BX_CPP_INLINE Bit8u BitReflect8(Bit8u val8)
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{
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return ((val8 & 0x80) >> 7) |
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((val8 & 0x40) >> 5) |
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((val8 & 0x20) >> 3) |
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((val8 & 0x10) >> 1) |
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((val8 & 0x08) << 1) |
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((val8 & 0x04) << 3) |
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((val8 & 0x02) << 5) |
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((val8 & 0x01) << 7);
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return ((val8 & 0x80) >> 7) |
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((val8 & 0x40) >> 5) |
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((val8 & 0x20) >> 3) |
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((val8 & 0x10) >> 1) |
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((val8 & 0x08) << 1) |
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((val8 & 0x04) << 3) |
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((val8 & 0x02) << 5) |
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((val8 & 0x01) << 7);
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}
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BX_CPP_INLINE Bit16u BitReflect16(Bit16u val16)
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{
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return ((Bit16u)(BitReflect8(val16 & 0xff)) << 8) | BitReflect8(val16 >> 8);
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return ((Bit16u)(BitReflect8(val16 & 0xff)) << 8) | BitReflect8(val16 >> 8);
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}
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BX_CPP_INLINE Bit32u BitReflect32(Bit32u val32)
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{
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return ((Bit32u)(BitReflect16(val32 & 0xffff)) << 16) | BitReflect16(val32 >> 16);
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return ((Bit32u)(BitReflect16(val32 & 0xffff)) << 16) | BitReflect16(val32 >> 16);
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}
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static Bit32u mod2_64bit(Bit64u divisor, Bit64u dividend)
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{
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Bit64u remainder = dividend >> 32;
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Bit64u remainder = dividend >> 32;
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for (int bitpos=31; bitpos>=0; bitpos--)
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{
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// copy one more bit from the dividend
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remainder = (remainder << 1) | ((dividend >> bitpos) & 1);
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for (int bitpos=31; bitpos>=0; bitpos--) {
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// copy one more bit from the dividend
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remainder = (remainder << 1) | ((dividend >> bitpos) & 1);
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// if MSB is set, then XOR divisor and get new remainder
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if (((remainder >> 32) & 1) == 1)
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{
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remainder ^= divisor;
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}
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// if MSB is set, then XOR divisor and get new remainder
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if (((remainder >> 32) & 1) == 1) {
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remainder ^= divisor;
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}
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}
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return remainder;
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return remainder;
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}
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#endif // (BX_SUPPORT_SSE >= 5) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.174 2008-03-29 09:58:23 sshwarts Exp $
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// $Id: fetchdecode.cc,v 1.175 2008-03-31 17:33:30 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -2597,8 +2597,8 @@ fetch_b1:
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mod = 0xc0;
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i->setModRM(b2);
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i->metaData.metaData1 = rm;
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i->metaData.metaData5 = nnn;
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i->setRm(rm);
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i->setNnn(nnn);
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if (mod == 0xc0) { // mod == 11b
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i->assertModC0();
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.181 2008-03-29 09:58:23 sshwarts Exp $
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// $Id: fetchdecode64.cc,v 1.182 2008-03-31 17:33:33 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -3533,8 +3533,8 @@ fetch_b1:
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mod = 0xc0;
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i->setModRM(b2);
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i->metaData.metaData1 = rm;
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i->metaData.metaData5 = nnn;
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i->setRm(rm);
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i->setNnn(nnn);
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if (mod == 0xc0) { // mod == 11b
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i->assertModC0();
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: instr.h,v 1.7 2008-03-22 21:29:40 sshwarts Exp $
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// $Id: instr.h,v 1.8 2008-03-31 17:33:34 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2008 Stanislav Shwartsman
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@ -66,39 +66,17 @@ public:
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Bit8u metaInfo1;
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} metaInfo;
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// using 5-bit index for registers (16 regs in 64-bit and RIP)
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struct {
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// (unused, keep for alignment)
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// (will be used for SSE5 destination override later)
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Bit8u metaData8;
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#define BX_INSTR_METADATA_SEG 0
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#define BX_INSTR_METADATA_DEST 1
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#define BX_INSTR_METADATA_NNN 2
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#define BX_INSTR_METADATA_RM 3
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#define BX_INSTR_METADATA_BASE 4
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#define BX_INSTR_METADATA_INDEX 5
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#define BX_INSTR_METADATA_SCALE 6
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#define BX_INSTR_METADATA_MODRM 7
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// 7...0 modrm
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Bit8u metaData7;
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// 7...3 (unused)
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// 2...0 seg
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Bit8u metaData6;
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// 7...5 (unused)
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// 4...0 nnn (modrm)
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Bit8u metaData5;
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// 7...5 (unused)
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// 4...0 base (sib)
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Bit8u metaData4;
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// 7...5 (unused)
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// 4...0 index (sib)
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Bit8u metaData3;
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// 7...2 (unused)
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// 1...0 scale (sib)
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Bit8u metaData2;
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// 7...5 (unused)
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// 4...0 rm (modrm) // also used for opcodeReg()
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Bit8u metaData1;
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} metaData;
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// using 5-bit field for registers (16 regs in 64-bit, RIP, NIL)
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Bit8u metaData[8];
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union {
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// Form (longest case): [opcode+modrm+sib/displacement32/immediate32]
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@ -134,20 +112,6 @@ public:
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#endif
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};
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BX_CPP_INLINE void setOpcodeReg(unsigned opreg) {
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// The opcodeReg form (low 3 bits of the opcode byte (extended
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// by REX.B on x86-64) to be used with IxIxForm or IqForm.
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metaData.metaData1 = opreg;
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}
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BX_CPP_INLINE unsigned opcodeReg() {
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return metaData.metaData1;
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}
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BX_CPP_INLINE void setModRM(unsigned modrm) {
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metaData.metaData7 = modrm;
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}
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BX_CPP_INLINE unsigned modrm() {
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return metaData.metaData7;
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}
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BX_CPP_INLINE unsigned modC0()
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{
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// This is a cheaper way to test for modRM instructions where
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@ -159,29 +123,49 @@ public:
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{
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return metaInfo.metaInfo1 |= (1<<2);
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}
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BX_CPP_INLINE void setOpcodeReg(unsigned opreg) {
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// The opcodeReg form (low 3 bits of the opcode byte (extended
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// by REX.B on x86-64) to be used with IxIxForm or IqForm.
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metaData[BX_INSTR_METADATA_RM] = opreg;
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}
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BX_CPP_INLINE unsigned opcodeReg() {
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return metaData[BX_INSTR_METADATA_RM];
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}
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BX_CPP_INLINE void setModRM(unsigned modrm) {
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metaData[BX_INSTR_METADATA_MODRM] = modrm;
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}
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BX_CPP_INLINE unsigned modrm() {
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return metaData[BX_INSTR_METADATA_MODRM];
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}
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BX_CPP_INLINE void setNnn(unsigned nnn) {
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metaData[BX_INSTR_METADATA_NNN] = nnn;
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}
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BX_CPP_INLINE unsigned nnn() {
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return metaData.metaData5;
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return metaData[BX_INSTR_METADATA_NNN];
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}
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BX_CPP_INLINE void setRm(unsigned rm) {
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metaData[BX_INSTR_METADATA_RM] = rm;
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}
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BX_CPP_INLINE unsigned rm() {
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return metaData.metaData1;
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return metaData[BX_INSTR_METADATA_RM];
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}
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BX_CPP_INLINE void setSibScale(unsigned scale) {
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metaData.metaData2 = scale;
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metaData[BX_INSTR_METADATA_SCALE] = scale;
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}
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BX_CPP_INLINE unsigned sibScale() {
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return metaData.metaData2;
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return metaData[BX_INSTR_METADATA_SCALE];
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}
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BX_CPP_INLINE void setSibIndex(unsigned index) {
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metaData.metaData3 = index;
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metaData[BX_INSTR_METADATA_INDEX] = index;
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}
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BX_CPP_INLINE unsigned sibIndex() {
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return metaData.metaData3;
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return metaData[BX_INSTR_METADATA_INDEX];
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}
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BX_CPP_INLINE void setSibBase(unsigned base) {
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metaData.metaData4 = base;
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metaData[BX_INSTR_METADATA_BASE] = base;
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}
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BX_CPP_INLINE unsigned sibBase() {
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return metaData.metaData4;
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return metaData[BX_INSTR_METADATA_BASE];
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}
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BX_CPP_INLINE Bit32u displ32u() { return modRMForm.displ32u; }
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BX_CPP_INLINE Bit16u displ16u() { return modRMForm.displ16u; }
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@ -204,13 +188,13 @@ public:
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metaInfo.metaInfo1 = (os32<<3) | (as32<<4) | (os64<<5) | (as64<<6);
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metaInfo.metaInfo2 = 0;
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metaInfo.metaInfo3 = 0;
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metaData.metaData6 = BX_SEG_REG_NULL;
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metaData[BX_INSTR_METADATA_SEG] = BX_SEG_REG_NULL;
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}
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BX_CPP_INLINE unsigned seg(void) {
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return metaData.metaData6;
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return metaData[BX_INSTR_METADATA_SEG];
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}
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BX_CPP_INLINE void setSeg(unsigned val) {
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metaData.metaData6 = val;
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metaData[BX_INSTR_METADATA_SEG] = val;
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}
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BX_CPP_INLINE unsigned os32L(void) {
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