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Fixed more VCPP2008 warnings

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This commit is contained in:
Stanislav Shwartsman 2007-12-26 23:07:44 +00:00
parent 917a040cc4
commit 79fc57dec8
14 changed files with 140 additions and 141 deletions
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66
bochs/cpu/access.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: access.cc,v 1.86 2007-12-21 10:33:39 sshwarts Exp $
// $Id: access.cc,v 1.87 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -337,7 +337,7 @@ int BX_CPU_C::int_number(bx_segment_reg_t *seg)
Bit8u* BX_CPP_AttrRegparmN(2)
BX_CPU_C::v2h_read_byte(bx_address laddr, unsigned curr_pl)
{
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -345,7 +345,7 @@ BX_CPU_C::v2h_read_byte(bx_address laddr, unsigned curr_pl)
// from this CPL.
if (tlbEntry->accessBits & (1<<curr_pl)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
return hostAddr;
}
@ -357,7 +357,7 @@ BX_CPU_C::v2h_read_byte(bx_address laddr, unsigned curr_pl)
Bit8u* BX_CPP_AttrRegparmN(2)
BX_CPU_C::v2h_write_byte(bx_address laddr, unsigned curr_pl)
{
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf)
@ -366,7 +366,7 @@ BX_CPU_C::v2h_write_byte(bx_address laddr, unsigned curr_pl)
// from this CPL.
if (tlbEntry->accessBits & (0x10 << curr_pl)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
@ -382,7 +382,7 @@ BX_CPU_C::v2h_write_byte(bx_address laddr, unsigned curr_pl)
BX_CPU_C::v2h_read(bx_address laddr, unsigned curr_pl, unsigned len)
{
// Make sure access does not span 2 pages.
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, len);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, len);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -390,7 +390,7 @@ BX_CPU_C::v2h_read(bx_address laddr, unsigned curr_pl, unsigned len)
// from this CPL.
if (tlbEntry->accessBits & (1<<curr_pl)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
return hostAddr;
}
@ -403,7 +403,7 @@ BX_CPU_C::v2h_read(bx_address laddr, unsigned curr_pl, unsigned len)
BX_CPU_C::v2h_write(bx_address laddr, unsigned curr_pl, unsigned len)
{
// Make sure access does not span 2 pages.
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, len);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, len);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf)
@ -412,7 +412,7 @@ BX_CPU_C::v2h_write(bx_address laddr, unsigned curr_pl, unsigned len)
// from this CPL.
if (tlbEntry->accessBits & (0x10 << curr_pl)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
@ -436,7 +436,7 @@ accessOK:
laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_WRITE);
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -444,7 +444,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, BX_WRITE);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@ -492,7 +492,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -500,7 +500,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, BX_WRITE);
Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@ -548,7 +548,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -556,7 +556,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, BX_WRITE);
Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@ -604,7 +604,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -612,7 +612,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, BX_WRITE);
Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@ -653,7 +653,7 @@ accessOK:
laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_READ);
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -661,7 +661,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, BX_READ);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
data = *hostAddr;
@ -707,7 +707,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -715,7 +715,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, BX_READ);
Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
ReadHostWordFromLittleEndian(hostAddr, data);
@ -761,7 +761,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -769,7 +769,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, BX_READ);
Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
ReadHostDWordFromLittleEndian(hostAddr, data);
@ -815,7 +815,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -823,7 +823,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, BX_READ);
Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
ReadHostQWordFromLittleEndian(hostAddr, data);
@ -866,7 +866,7 @@ accessOK:
laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_RW);
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -874,7 +874,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, BX_RW);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@ -926,7 +926,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -934,7 +934,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, BX_RW);
Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@ -984,7 +984,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -992,7 +992,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, BX_RW);
Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@ -1042,7 +1042,7 @@ accessOK:
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@ -1050,7 +1050,7 @@ accessOK:
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
Bit32u pageOffset = laddr & 0xfff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, BX_RW);
Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE

6
bochs/cpu/bit64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: bit64.cc,v 1.3 2007-12-23 17:21:27 sshwarts Exp $
// $Id: bit64.cc,v 1.4 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -312,11 +312,9 @@ void BX_CPU_C::BTR_EqIbM(bxInstruction_c *i)
void BX_CPU_C::BTR_EqIbR(bxInstruction_c *i)
{
Bit64u op1_64;
Bit8u op2_8 = i->Ib() & 0x3f;
op1_64 = BX_READ_64BIT_REG(i->rm());
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
op1_64 &= ~(((Bit64u) 1) << op2_8);
BX_WRITE_64BIT_REG(i->rm(), op1_64);

4
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.403 2007-12-22 17:17:40 sshwarts Exp $
// $Id: cpu.h,v 1.404 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1262,6 +1262,8 @@ public: // for now...
#endif // #if BX_USE_TLB
#define PAGE_OFFSET(laddr) ((Bit32u)(laddr) & 0xfff)
// An instruction cache. Each entry should be exactly 32 bytes, and
// this structure should be aligned on a 32-byte boundary to be friendly
// with the host cache lines.

4
bochs/cpu/debugstuff.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: debugstuff.cc,v 1.87 2007-12-25 21:42:38 sshwarts Exp $
// $Id: debugstuff.cc,v 1.88 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -45,7 +45,7 @@ void BX_CPU_C::debug_disasm_instruction(bx_address offset)
static char letters[] = "0123456789ABCDEF";
static disassembler bx_disassemble;
unsigned remainsInPage = 0x1000 - (offset & 0xfff);
unsigned remainsInPage = 0x1000 - PAGE_OFFSET(offset);
bx_bool valid = dbg_xlate_linear2phy(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_CS) + offset, &phy_addr);
if (valid && BX_CPU_THIS_PTR mem!=NULL) {

10
bochs/cpu/io.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: io.cc,v 1.48 2007-12-23 18:09:34 sshwarts Exp $
// $Id: io.cc,v 1.49 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -88,12 +88,12 @@ Bit32u BX_CPU_C::FastRepINSW(bxInstruction_c *i, bx_address dstOff, Bit16u port,
// Counting downward
// Note: 1st word must not cross page boundary.
if ((laddrDst & 0xfff) > 0xffe) return 0;
wordsFitDst = (2 + (laddrDst & 0xfff)) >> 1;
wordsFitDst = (2 + (PAGE_OFFSET(laddrDst))) >> 1;
pointerDelta = -2;
}
else {
// Counting upward
wordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 1;
wordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = 2;
}
@ -215,12 +215,12 @@ Bit32u BX_CPU_C::FastRepOUTSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
// Counting downward
// Note: 1st word must not cross page boundary.
if ((laddrSrc & 0xfff) > 0xffe) return 0;
wordsFitSrc = (2 + (laddrSrc & 0xfff)) >> 1;
wordsFitSrc = (2 + (PAGE_OFFSET(laddrSrc))) >> 1;
pointerDelta = (unsigned) -2;
}
else {
// Counting upward
wordsFitSrc = (0x1000 - (laddrSrc & 0xfff)) >> 1;
wordsFitSrc = (0x1000 - PAGE_OFFSET(laddrSrc)) >> 1;
pointerDelta = 2;
}

4
bochs/cpu/iret.cc
View File

@ -1,5 +1,5 @@
////////////////////////////////////////////////////////////////////////
// $Id: iret.cc,v 1.25 2007-12-23 17:21:27 sshwarts Exp $
// $Id: iret.cc,v 1.26 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2005 Stanislav Shwartsman
@ -451,7 +451,7 @@ BX_CPU_C::long_iret(bxInstruction_c *i)
/* load CS:EIP from stack */
/* load CS-cache with new code segment descriptor */
branch_far32(&cs_selector, &cs_descriptor, new_rip, CPL);
branch_far32(&cs_selector, &cs_descriptor, (Bit32u) new_rip, CPL);
// ID,VIP,VIF,AC,VM,RF,x,NT,IOPL,OF,DF,IF,TF,SF,ZF,x,AF,x,PF,x,CF
Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | EFlagsDFMask |

4
bochs/cpu/mmx.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mmx.cc,v 1.69 2007-12-23 17:21:27 sshwarts Exp $
// $Id: mmx.cc,v 1.70 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2002 Stanislav Shwartsman
@ -2417,7 +2417,7 @@ void BX_CPU_C::PSADBW_PqQq(bxInstruction_c *i)
temp += abs(MMXUB6(op1) - MMXUB6(op2));
temp += abs(MMXUB7(op1) - MMXUB7(op2));
MMXUW0(op1) = (Bit64u) temp;
MMXUQ(op1) = (Bit64u) temp;
/* now write result back to destination */
BX_WRITE_MMX_REG(i->nnn(), op1);

8
bochs/cpu/mult32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mult32.cc,v 1.24 2007-12-20 20:58:37 sshwarts Exp $
// $Id: mult32.cc,v 1.25 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -198,8 +198,8 @@ void BX_CPU_C::IMUL_GdEdId(bxInstruction_c *i)
op2_32 = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
}
Bit64s product_64 = ((Bit64s) op2_32) * ((Bit64s) op3_32);
Bit32u product_32 = (product_64 & 0xFFFFFFFF);
Bit64s product_64 = ((Bit64s) op2_32) * ((Bit64s) op3_32);
Bit32u product_32 = (Bit32u)(product_64 & 0xFFFFFFFF);
/* now write product back to destination */
BX_WRITE_32BIT_REGZ(i->nnn(), product_32);
@ -231,7 +231,7 @@ void BX_CPU_C::IMUL_GdEd(bxInstruction_c *i)
op1_32 = BX_READ_32BIT_REG(i->nnn());
Bit64s product_64 = ((Bit64s) op1_32) * ((Bit64s) op2_32);
Bit32u product_32 = (product_64 & 0xFFFFFFFF);
Bit32u product_32 = (Bit32u)(product_64 & 0xFFFFFFFF);
/* now write product back to destination */
BX_WRITE_32BIT_REGZ(i->nnn(), product_32);

16
bochs/cpu/mult64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mult64.cc,v 1.23 2007-12-23 17:21:27 sshwarts Exp $
// $Id: mult64.cc,v 1.24 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -48,10 +48,10 @@ void long_mul(Bit128u *product, Bit64u op1, Bit64u op2)
int i,j,k;
op_1[0] = op1 & 0xffffffff;
op_1[1] = op1 >> 32;
op_2[0] = op2 & 0xffffffff;
op_2[1] = op2 >> 32;
op_1[0] = (Bit32u)(op1 & 0xffffffff);
op_1[1] = (Bit32u)(op1 >> 32);
op_2[0] = (Bit32u)(op2 & 0xffffffff);
op_2[1] = (Bit32u)(op2 >> 32);
for (i = 0; i < 4; i++) result[i] = 0;
@ -59,10 +59,10 @@ void long_mul(Bit128u *product, Bit64u op1, Bit64u op2)
for (j = 0; j < 2; j++) {
nn = (Bit64u) op_1[i] * (Bit64u) op_2[j];
k = i + j;
c = partial_add(&result[k++],nn & 0xffffffff);
c = partial_add(&result[k++],(nn >> 32) + c);
c = partial_add(&result[k++], (Bit32u)(nn & 0xffffffff));
c = partial_add(&result[k++], (Bit32u)(nn >> 32) + c);
while (k < 4 && c != 0) {
c = partial_add(&result[k++],c);
c = partial_add(&result[k++], c);
}
}
}

14
bochs/cpu/paging.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: paging.cc,v 1.102 2007-12-23 17:21:27 sshwarts Exp $
// $Id: paging.cc,v 1.103 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -552,7 +552,7 @@ void BX_CPU_C::TLB_flush(bx_bool invalidateGlobal)
void BX_CPU_C::TLB_invlpg(bx_address laddr)
{
#if BX_USE_TLB
Bit32u TLB_index = BX_TLB_INDEX_OF(laddr, 0);
unsigned TLB_index = BX_TLB_INDEX_OF(laddr, 0);
BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf = BX_INVALID_TLB_ENTRY;
InstrTLB_Increment(tlbEntryFlushes); // A TLB entry flush occurred.
#endif
@ -637,7 +637,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
InstrTLB_Stats();
bx_address lpf = LPFOf(laddr);
Bit32u TLB_index = BX_TLB_INDEX_OF(lpf, 0);
unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
if (tlbEntry->lpf == lpf)
@ -1051,7 +1051,7 @@ bx_bool BX_CPU_C::dbg_xlate_linear2phy(bx_address laddr, bx_phy_address *phy)
// see if page is in the TLB first
#if BX_USE_TLB
Bit32u TLB_index = BX_TLB_INDEX_OF(lpf, 0);
unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
if (tlbEntry->lpf == lpf) {
@ -1118,7 +1118,7 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u
hwbreakpoint_match(laddr, len, rw);
#endif
Bit32u pageOffset = laddr & 0x00000fff;
Bit32u pageOffset = PAGE_OFFSET(laddr);
unsigned xlate_rw = rw;
if (rw==BX_RW) rw = BX_READ;
@ -1223,7 +1223,7 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u
if (rw == BX_READ) {
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw);
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
bx_address lpf = LPFOf(laddr);
@ -1264,7 +1264,7 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u
else { // Write
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw);
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
bx_address lpf = LPFOf(laddr);

94
bochs/cpu/smm.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: smm.cc,v 1.29 2007-11-24 14:22:34 sshwarts Exp $
// $Id: smm.cc,v 1.30 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006 Stanislav Shwartsman
@ -217,40 +217,40 @@ BX_CPP_INLINE Bit64u SMRAM_FIELD64(const Bit32u *saved_state, unsigned hi, unsig
void BX_CPU_C::smram_save_state(Bit32u *saved_state)
{
// --- General Purpose Registers --- //
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RAX_HI32) = RAX >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RAX_HI32) = (Bit32u)(RAX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RAX_LO32) = EAX;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RCX_HI32) = RCX >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RCX_HI32) = (Bit32u)(RCX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RCX_LO32) = ECX;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDX_HI32) = RDX >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDX_HI32) = (Bit32u)(RDX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDX_LO32) = EDX;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBX_HI32) = RBX >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBX_HI32) = (Bit32u)(RBX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBX_LO32) = EBX;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSP_HI32) = RSP >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSP_HI32) = (Bit32u)(RSP >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSP_LO32) = ESP;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBP_HI32) = RBP >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBP_HI32) = (Bit32u)(RBP >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBP_LO32) = EBP;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSI_HI32) = RSI >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSI_HI32) = (Bit32u)(RSI >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSI_LO32) = ESI;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDI_HI32) = RDI >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDI_HI32) = (Bit32u)(RDI >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDI_LO32) = EDI;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_HI32) = R8 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_LO32) = R8 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_HI32) = R9 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_LO32) = R9 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_HI32) = R10 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_LO32) = R10 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_HI32) = R11 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_LO32) = R11 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_HI32) = R12 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_LO32) = R12 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_HI32) = R13 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_LO32) = R13 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_HI32) = R14 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_LO32) = R14 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_HI32) = R15 >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_LO32) = R15 & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_HI32) = RIP >> 32;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_LO32) = RIP & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_HI32) = (Bit32u)(R8 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_LO32) = (Bit32u)(R8 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_HI32) = (Bit32u)(R9 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_LO32) = (Bit32u)(R9 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_HI32) = (Bit32u)(R10 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_LO32) = (Bit32u)(R10 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_HI32) = (Bit32u)(R11 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_LO32) = (Bit32u)(R11 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_HI32) = (Bit32u)(R12 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_LO32) = (Bit32u)(R12 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_HI32) = (Bit32u)(R13 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_LO32) = (Bit32u)(R13 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_HI32) = (Bit32u)(R14 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_LO32) = (Bit32u)(R14 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_HI32) = (Bit32u)(R15 >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_LO32) = (Bit32u)(R15 & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_HI32) = (Bit32u)(RIP >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_LO32) = EIP;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RFLAGS32) = read_eflags();
// --- Debug and Control Registers --- //
@ -271,65 +271,65 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
/* base+0x7ebc to base+0x7ea0 is reserved */
// --- Task Register --- //
SMRAM_FIELD(saved_state, SMRAM_TR_BASE_HI32) = BX_CPU_THIS_PTR tr.cache.u.system.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_TR_BASE_LO32) = BX_CPU_THIS_PTR tr.cache.u.system.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_TR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR tr.cache.u.system.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_TR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR tr.cache.u.system.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_TR_LIMIT) = BX_CPU_THIS_PTR tr.cache.u.system.limit;
SMRAM_FIELD(saved_state, SMRAM_TR_SELECTOR_AR) = BX_CPU_THIS_PTR tr.selector.value |
(((Bit32u) get_segment_ar_data(&BX_CPU_THIS_PTR tr.cache)) << 16);
// --- IDTR --- //
SMRAM_FIELD(saved_state, SMRAM_IDTR_BASE_HI32) = BX_CPU_THIS_PTR idtr.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_IDTR_BASE_LO32) = BX_CPU_THIS_PTR idtr.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_IDTR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR idtr.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_IDTR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR idtr.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_IDTR_LIMIT) = BX_CPU_THIS_PTR idtr.limit;
// --- LDTR --- //
SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_HI32) = BX_CPU_THIS_PTR ldtr.cache.u.system.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_LO32) = BX_CPU_THIS_PTR ldtr.cache.u.system.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR ldtr.cache.u.system.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR ldtr.cache.u.system.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_LDTR_LIMIT) = BX_CPU_THIS_PTR ldtr.cache.u.system.limit;
SMRAM_FIELD(saved_state, SMRAM_LDTR_SELECTOR_AR) = BX_CPU_THIS_PTR ldtr.selector.value |
(((Bit32u) get_segment_ar_data(&BX_CPU_THIS_PTR ldtr.cache)) << 16);
// --- GDTR --- //
SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_HI32) = BX_CPU_THIS_PTR gdtr.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_LO32) = BX_CPU_THIS_PTR gdtr.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR gdtr.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR gdtr.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_GDTR_LIMIT) = BX_CPU_THIS_PTR gdtr.limit;
// --- GS selector --- //
bx_segment_reg_t *seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS]);
SMRAM_FIELD(saved_state, SMRAM_GS_BASE_HI32) = seg->cache.u.segment.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_GS_BASE_LO32) = seg->cache.u.segment.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_GS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_GS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_GS_LIMIT) = seg->cache.u.segment.limit;
SMRAM_FIELD(saved_state, SMRAM_GS_SELECTOR_AR) = seg->selector.value |
(((Bit32u) get_segment_ar_data(&seg->cache)) << 16);
// --- FS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS]);
SMRAM_FIELD(saved_state, SMRAM_FS_BASE_HI32) = seg->cache.u.segment.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_FS_BASE_LO32) = seg->cache.u.segment.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_FS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_FS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_FS_LIMIT) = seg->cache.u.segment.limit;
SMRAM_FIELD(saved_state, SMRAM_FS_SELECTOR_AR) = seg->selector.value |
(((Bit32u) get_segment_ar_data(&seg->cache)) << 16);
// --- DS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS]);
SMRAM_FIELD(saved_state, SMRAM_DS_BASE_HI32) = seg->cache.u.segment.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_DS_BASE_LO32) = seg->cache.u.segment.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_DS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_DS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_DS_LIMIT) = seg->cache.u.segment.limit;
SMRAM_FIELD(saved_state, SMRAM_DS_SELECTOR_AR) = seg->selector.value |
(((Bit32u) get_segment_ar_data(&seg->cache)) << 16);
// --- SS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS]);
SMRAM_FIELD(saved_state, SMRAM_SS_BASE_HI32) = seg->cache.u.segment.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_SS_BASE_LO32) = seg->cache.u.segment.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_SS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_SS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_SS_LIMIT) = seg->cache.u.segment.limit;
SMRAM_FIELD(saved_state, SMRAM_SS_SELECTOR_AR) = seg->selector.value |
(((Bit32u) get_segment_ar_data(&seg->cache)) << 16);
// --- CS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS]);
SMRAM_FIELD(saved_state, SMRAM_CS_BASE_HI32) = seg->cache.u.segment.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_CS_BASE_LO32) = seg->cache.u.segment.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_CS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_CS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_CS_LIMIT) = seg->cache.u.segment.limit;
SMRAM_FIELD(saved_state, SMRAM_CS_SELECTOR_AR) = seg->selector.value |
(((Bit32u) get_segment_ar_data(&seg->cache)) << 16);
// --- ES selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES]);
SMRAM_FIELD(saved_state, SMRAM_ES_BASE_HI32) = seg->cache.u.segment.base >> 32;
SMRAM_FIELD(saved_state, SMRAM_ES_BASE_LO32) = seg->cache.u.segment.base & 0xffffffff;
SMRAM_FIELD(saved_state, SMRAM_ES_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
SMRAM_FIELD(saved_state, SMRAM_ES_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
SMRAM_FIELD(saved_state, SMRAM_ES_LIMIT) = seg->cache.u.segment.limit;
SMRAM_FIELD(saved_state, SMRAM_ES_SELECTOR_AR) = seg->selector.value |
(((Bit32u) get_segment_ar_data(&seg->cache)) << 16);

10
bochs/cpu/sse_move.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: sse_move.cc,v 1.73 2007-12-23 17:39:10 sshwarts Exp $
// $Id: sse_move.cc,v 1.74 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003 Stanislav Shwartsman
@ -146,8 +146,8 @@ void BX_CPU_C::FXSAVE(bxInstruction_c *i)
else
#endif
{
xmm.xmm32u(2) = (BX_CPU_THIS_PTR the_i387.fip) & 0xffffffff;
xmm.xmm32u(3) = (BX_CPU_THIS_PTR the_i387.fcs);
xmm.xmm32u(2) = (Bit32u)(BX_CPU_THIS_PTR the_i387.fip) & 0xffffffff;
xmm.xmm32u(3) = (BX_CPU_THIS_PTR the_i387.fcs);
}
write_virtual_dqword_aligned(i->seg(), RMAddr(i), (Bit8u *) &xmm);
@ -170,8 +170,8 @@ void BX_CPU_C::FXSAVE(bxInstruction_c *i)
else
#endif
{
xmm.xmm32u(0) = (BX_CPU_THIS_PTR the_i387.fdp) & 0xffffffff;
xmm.xmm32u(1) = (BX_CPU_THIS_PTR the_i387.fds);
xmm.xmm32u(0) = (Bit32u)(BX_CPU_THIS_PTR the_i387.fdp) & 0xffffffff;
xmm.xmm32u(1) = (BX_CPU_THIS_PTR the_i387.fds);
}
#if BX_SUPPORT_SSE >= 1

3
bochs/cpu/stack16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: stack16.cc,v 1.29 2007-12-20 20:58:37 sshwarts Exp $
// $Id: stack16.cc,v 1.30 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -80,7 +80,6 @@ void BX_CPU_C::POP16_DS(bxInstruction_c *i)
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
BX_CPU_THIS_PTR speculative_rsp = 0;
}
void BX_CPU_C::POP16_ES(bxInstruction_c *i)

38
bochs/cpu/string.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: string.cc,v 1.49 2007-12-23 18:09:34 sshwarts Exp $
// $Id: string.cc,v 1.50 2007-12-26 23:07:44 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -108,14 +108,14 @@ Bit32u BX_CPU_C::FastRepMOVSB(bxInstruction_c *i, unsigned srcSeg, bx_address sr
// See how many bytes can fit in the rest of this page.
if (BX_CPU_THIS_PTR get_DF()) {
// Counting downward.
bytesFitSrc = 1 + (laddrSrc & 0xfff);
bytesFitDst = 1 + (laddrDst & 0xfff);
bytesFitSrc = 1 + PAGE_OFFSET(laddrSrc);
bytesFitDst = 1 + PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) -1;
}
else {
// Counting upward.
bytesFitSrc = (0x1000 - (laddrSrc & 0xfff));
bytesFitDst = (0x1000 - (laddrDst & 0xfff));
bytesFitSrc = 0x1000 - PAGE_OFFSET(laddrSrc);
bytesFitDst = 0x1000 - PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) 1;
}
@ -257,14 +257,14 @@ Bit32u BX_CPU_C::FastRepMOVSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
// Note: 1st word must not cross page boundary.
if (((laddrSrc & 0xfff) > 0xffe) || ((laddrDst & 0xfff) > 0xffe))
return 0;
wordsFitSrc = (2 + (laddrSrc & 0xfff)) >> 1;
wordsFitDst = (2 + (laddrDst & 0xfff)) >> 1;
wordsFitSrc = (2 + PAGE_OFFSET(laddrSrc)) >> 1;
wordsFitDst = (2 + PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) -2;
}
else {
// Counting upward.
wordsFitSrc = (0x1000 - (laddrSrc & 0xfff)) >> 1;
wordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 1;
wordsFitSrc = (0x1000 - PAGE_OFFSET(laddrSrc)) >> 1;
wordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) 2;
}
@ -407,14 +407,14 @@ Bit32u BX_CPU_C::FastRepMOVSD(bxInstruction_c *i, unsigned srcSeg, bx_address sr
// Note: 1st dword must not cross page boundary.
if (((laddrSrc & 0xfff) > 0xffc) || ((laddrDst & 0xfff) > 0xffc))
return 0;
dwordsFitSrc = (4 + (laddrSrc & 0xfff)) >> 2;
dwordsFitDst = (4 + (laddrDst & 0xfff)) >> 2;
dwordsFitSrc = (4 + PAGE_OFFSET(laddrSrc)) >> 2;
dwordsFitDst = (4 + PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) -4;
}
else {
// Counting upward.
dwordsFitSrc = (0x1000 - (laddrSrc & 0xfff)) >> 2;
dwordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 2;
dwordsFitSrc = (0x1000 - PAGE_OFFSET(laddrSrc)) >> 2;
dwordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) 4;
}
@ -525,12 +525,12 @@ Bit32u BX_CPU_C::FastRepSTOSB(bxInstruction_c *i, unsigned dstSeg, bx_address ds
// See how many bytes can fit in the rest of this page.
if (BX_CPU_THIS_PTR get_DF()) {
// Counting downward.
bytesFitDst = 1 + (laddrDst & 0xfff);
bytesFitDst = 1 + PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) -1;
}
else {
// Counting upward.
bytesFitDst = (0x1000 - (laddrDst & 0xfff));
bytesFitDst = 0x1000 - PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) 1;
}
@ -627,12 +627,12 @@ Bit32u BX_CPU_C::FastRepSTOSW(bxInstruction_c *i, unsigned dstSeg, bx_address ds
// Counting downward.
// Note: 1st word must not cross page boundary.
if ((laddrDst & 0xfff) > 0xffe) return 0;
wordsFitDst = (2 + (laddrDst & 0xfff)) >> 1;
wordsFitDst = (2 + PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) -2;
}
else {
// Counting upward.
wordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 1;
wordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) 2;
}
@ -730,12 +730,12 @@ Bit32u BX_CPU_C::FastRepSTOSD(bxInstruction_c *i, unsigned dstSeg, bx_address ds
// Counting downward.
// Note: 1st dword must not cross page boundary.
if ((laddrDst & 0xfff) > 0xffc) return 0;
dwordsFitDst = (4 + (laddrDst & 0xfff)) >> 2;
dwordsFitDst = (4 + PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) -4;
}
else {
// Counting upward.
dwordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 2;
dwordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) 4;
}