Unify BX_INSTR_MEM_READ and BX_INSTR_MEM_WRITE callbacks to single callback BX_INSTR_MEM_ACCESS
Enable the callback with guest-to-host TLB enabled Update instrumentation docs
This commit is contained in:
Stanislav Shwartsman
parent
05c7a1e61b
commit
f145f4c847
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: access.cc,v 1.80 2007-12-10 19:08:13 sshwarts Exp $
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// $Id: access.cc,v 1.81 2007-12-13 21:30:04 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -545,6 +545,7 @@ accessOK:
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = laddr & 0xfff;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, BX_WRITE);
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Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -603,6 +604,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, BX_WRITE);
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Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -662,6 +664,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, BX_WRITE);
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Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -721,6 +724,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, BX_WRITE);
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Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -771,6 +775,7 @@ accessOK:
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if (tlbEntry->accessBits & (1<<pl)) { // Read this pl OK.
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = laddr & 0xfff;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, BX_READ);
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Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
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*data = *hostAddr;
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return;
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@ -826,6 +831,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (1<<pl)) { // Read this pl OK.
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, BX_READ);
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Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
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ReadHostWordFromLittleEndian(hostAddr, *data);
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return;
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@ -882,6 +888,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (1<<pl)) { // Read this pl OK.
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, BX_READ);
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Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
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ReadHostDWordFromLittleEndian(hostAddr, *data);
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return;
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@ -938,6 +945,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (1<<pl)) { // Read this pl OK.
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, BX_READ);
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Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
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ReadHostQWordFromLittleEndian(hostAddr, *data);
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return;
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@ -990,6 +998,7 @@ accessOK:
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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Bit32u pageOffset = laddr & 0xfff;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, BX_RW);
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Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -1051,6 +1060,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, BX_RW);
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Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -1111,6 +1121,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, BX_RW);
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Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -1171,6 +1182,7 @@ accessOK:
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// from this CPL.
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if (tlbEntry->accessBits & (0x04 << pl)) {
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bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, BX_RW);
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Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
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#if BX_SUPPORT_ICACHE
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pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
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@ -1432,6 +1444,7 @@ accessOK:
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#if BX_SupportGuest2HostTLB
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Bit16u *hostAddr = v2h_write_word(laddr, user);
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if (hostAddr) {
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | (laddr & 0xfff), 2, BX_WRITE);
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WriteHostWordToLittleEndian(hostAddr, data);
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return;
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}
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@ -1470,6 +1483,7 @@ accessOK:
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#if BX_SupportGuest2HostTLB
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Bit32u *hostAddr = v2h_write_dword(laddr, user);
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if (hostAddr) {
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | (laddr & 0xfff), 4, BX_WRITE);
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WriteHostDWordToLittleEndian(hostAddr, data);
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return;
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}
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@ -1505,6 +1519,7 @@ void BX_CPU_C::write_new_stack_qword(bx_address offset, bx_bool user, Bit64u dat
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#if BX_SupportGuest2HostTLB
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Bit64u *hostAddr = v2h_write_qword(laddr, user);
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if (hostAddr) {
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | (laddr & 0xfff), 8, BX_WRITE);
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WriteHostQWordToLittleEndian(hostAddr, data);
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return;
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}
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: paging.cc,v 1.97 2007-12-13 17:16:21 sshwarts Exp $
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// $Id: paging.cc,v 1.98 2007-12-13 21:30:04 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1115,12 +1115,12 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned pl, unsign
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BX_CPU_THIS_PTR address_xlation.pages = 1;
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if (rw == BX_READ) {
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.paddress1, len, xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.paddress1, len, xlate_rw);
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS,
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BX_CPU_THIS_PTR address_xlation.paddress1, len, data);
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}
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else {
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.paddress1, len);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.paddress1, len, xlate_rw);
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BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS,
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BX_CPU_THIS_PTR address_xlation.paddress1, len, data);
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}
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@ -1140,29 +1140,27 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned pl, unsign
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#ifdef BX_LITTLE_ENDIAN
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if (rw == BX_READ) {
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1,
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xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, xlate_rw);
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, data);
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2, xlate_rw);
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1);
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}
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else {
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, xlate_rw);
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BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, data);
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2, xlate_rw);
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BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1);
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@ -1170,30 +1168,29 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned pl, unsign
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#else // BX_BIG_ENDIAN
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if (rw == BX_READ) {
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1,
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xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1,
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xlate_rw);
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1,
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((Bit8u*)data) + (len - BX_CPU_THIS_PTR address_xlation.len1));
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2, xlate_rw);
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2, data);
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}
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else {
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, xlate_rw);
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BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1,
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((Bit8u*)data) + (len - BX_CPU_THIS_PTR address_xlation.len1));
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2, xlate_rw);
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BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2, data);
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}
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@ -1208,7 +1205,7 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned pl, unsign
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BX_CPU_THIS_PTR address_xlation.paddress1 = laddr;
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BX_CPU_THIS_PTR address_xlation.pages = 1;
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if (rw == BX_READ) {
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr, laddr, len, xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw);
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#if BX_SupportGuest2HostTLB
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Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
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@ -1249,7 +1246,7 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned pl, unsign
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, laddr, len, data);
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}
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else { // Write
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr, laddr, len);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw);
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#if BX_SupportGuest2HostTLB
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Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr);
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bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
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@ -1291,32 +1288,32 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned pl, unsign
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#ifdef BX_LITTLE_ENDIAN
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if (rw == BX_READ) {
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1,
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xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1,
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xlate_rw);
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, data);
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BX_INSTR_LIN_READ(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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xlate_rw);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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xlate_rw);
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1);
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}
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else {
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1);
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, xlate_rw);
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BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS,
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BX_CPU_THIS_PTR address_xlation.paddress1,
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BX_CPU_THIS_PTR address_xlation.len1, data);
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BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2);
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BX_CPU_THIS_PTR address_xlation.len2, slate_rw);
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BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS,
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BX_CPU_THIS_PTR address_xlation.paddress2,
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BX_CPU_THIS_PTR address_xlation.len2,
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@ -1325,33 +1322,33 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned pl, unsign
|
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|
||||
#else // BX_BIG_ENDIAN
|
||||
if (rw == BX_READ) {
|
||||
BX_INSTR_LIN_READ(BX_CPU_ID, laddr,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress1,
|
||||
BX_CPU_THIS_PTR address_xlation.len1,
|
||||
xlate_rw);
|
||||
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress1,
|
||||
BX_CPU_THIS_PTR address_xlation.len1,
|
||||
xlate_rw);
|
||||
BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress1,
|
||||
BX_CPU_THIS_PTR address_xlation.len1,
|
||||
((Bit8u*)data) + (len - BX_CPU_THIS_PTR address_xlation.len1));
|
||||
BX_INSTR_LIN_READ(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress2,
|
||||
BX_CPU_THIS_PTR address_xlation.len2,
|
||||
xlate_rw);
|
||||
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress2,
|
||||
BX_CPU_THIS_PTR address_xlation.len2,
|
||||
xlate_rw);
|
||||
BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress2,
|
||||
BX_CPU_THIS_PTR address_xlation.len2, data);
|
||||
}
|
||||
else {
|
||||
BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr,
|
||||
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress1,
|
||||
BX_CPU_THIS_PTR address_xlation.len1);
|
||||
BX_CPU_THIS_PTR address_xlation.len1, xlate_rw);
|
||||
BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress1,
|
||||
BX_CPU_THIS_PTR address_xlation.len1,
|
||||
((Bit8u*)data) + (len - BX_CPU_THIS_PTR address_xlation.len1));
|
||||
BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress2,
|
||||
BX_CPU_THIS_PTR address_xlation.len2);
|
||||
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress2,
|
||||
BX_CPU_THIS_PTR address_xlation.len2, xlate_rw);
|
||||
BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS,
|
||||
BX_CPU_THIS_PTR address_xlation.paddress2,
|
||||
BX_CPU_THIS_PTR address_xlation.len2, data);
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: instrument.h,v 1.17 2007-12-13 17:16:21 sshwarts Exp $
|
||||
// $Id: instrument.h,v 1.18 2007-12-13 21:30:05 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -117,9 +117,9 @@ void bx_instr_mem_data(unsigned cpu, bx_address lin, unsigned size, unsigned rw)
|
||||
# define BX_INSTR_REPEAT_ITERATION(cpu_id, i)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len, rw)
|
||||
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len)
|
||||
# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_MEM_CODE(cpu_id, linear, size)
|
||||
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw) bx_instr_mem_data(cpu_id, linear, size, rw)
|
||||
|
||||
@ -180,9 +180,9 @@ void bx_instr_mem_data(unsigned cpu, bx_address lin, unsigned size, unsigned rw)
|
||||
# define BX_INSTR_REPEAT_ITERATION(cpu_id, i)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len, rw)
|
||||
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len)
|
||||
# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_MEM_CODE(cpu_id, linear, size)
|
||||
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw)
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: instrument.h,v 1.15 2007-12-13 17:16:21 sshwarts Exp $
|
||||
// $Id: instrument.h,v 1.16 2007-12-13 21:30:05 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -165,8 +165,7 @@ extern bxInstrumentation *icpu;
|
||||
# define BX_INSTR_REPEAT_ITERATION(cpu_id, i)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len, rw)
|
||||
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len)
|
||||
# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
|
||||
|
||||
# define BX_INSTR_MEM_CODE(cpu_id, linear, size)
|
||||
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw) icpu[cpu_id].bx_instr_mem_data(linear, size, rw)
|
||||
@ -228,9 +227,9 @@ extern bxInstrumentation *icpu;
|
||||
# define BX_INSTR_REPEAT_ITERATION(cpu_id, i)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len, rw)
|
||||
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len)
|
||||
# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_MEM_CODE(cpu_id, linear, size)
|
||||
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw)
|
||||
|
||||
|
||||
@ -173,29 +173,32 @@ instruction execution. In case of repeat instruction the callback will
|
||||
be called only once after all repeat iterations.
|
||||
|
||||
|
||||
void bx_instr_mem_code(unsigned cpu, bx_address linear, unsigned len);
|
||||
void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw);
|
||||
|
||||
The callback is called each time, when Bochs simulator executes a linear
|
||||
memory access. Note that no page split accesses will be generated because
|
||||
Bochs splits page split accesses to two different memory accesses during its
|
||||
execution flow. The callback also will not be generated in case of direct
|
||||
physical memory access like in SMM, VMM or SVM modes.
|
||||
|
||||
Possible access types are: BX_READ, BX_WRITE and BX_RW.
|
||||
|
||||
Currently the callback is not supported when repeat-speedups optimization is
|
||||
enabled.
|
||||
|
||||
|
||||
void bx_instr_mem_data(unsigned cpu, bx_address linear, unsigned len, unsigned rw);
|
||||
|
||||
The callback is called each time, when Bochs simulator executes code or data
|
||||
memory access. Possible access types are: BX_READ, BX_WRITE and BX_RW.
|
||||
|
||||
|
||||
void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw);
|
||||
void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned len);
|
||||
|
||||
The callback is called each time, when Bochs simulator executes a memory
|
||||
access. Note that no page split accesses will be generated because Bochs
|
||||
splits page split accesses to two different memory accesses during its
|
||||
execution flow.
|
||||
|
||||
Currently the callbacks are not supported when guest-to-host-tlb optimization
|
||||
is enabled.
|
||||
The callback is called each time, when Bochs simulator executes linear memory
|
||||
access. In contrast to previous callback it will be called even if memory
|
||||
access fails because of any reason (for example protection failure or page
|
||||
fault).
|
||||
|
||||
|
||||
void bx_instr_phy_read(unsigned cpu, bx_address addr, unsigned len);
|
||||
void bx_instr_phy_write(unsigned cpu, bx_address addr, unsigned len);
|
||||
|
||||
These callback functions are a feedback from external memory system.
|
||||
These callback functions are the feedback from external memory system.
|
||||
|
||||
|
||||
void bx_instr_inp(Bit16u addr, unsigned len);
|
||||
@ -208,10 +211,11 @@ These callback functions are a feedback from various system devices.
|
||||
-----------------------------------------------------------------------------
|
||||
Known problems:
|
||||
|
||||
1. BX_INSTR_MEM_CODE never called from Bochs's code.
|
||||
2. BX_INSTR_LIN_READ doesn't work when Guest-To-Host-TLB feature is enabled.
|
||||
3. BX_INSTR_LIN_WRITE doesn't work when Guest-To-Host-TLB feature is enabled.
|
||||
4.
|
||||
1. BX_INSTR_LIN_ACCESS doesn't work when repeat-speedups feature is enabled.
|
||||
|
||||
2. BX_INSTR_MEM_DATA doesn't work when repeat-speedups feature is enabled.
|
||||
|
||||
3.
|
||||
|
||||
While using Bochs as a reference model for simulations, the simulator needs
|
||||
information about what loads/stores are taking place with each instruction.
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: instrument.cc,v 1.17 2007-12-13 17:16:21 sshwarts Exp $
|
||||
// $Id: instrument.cc,v 1.18 2007-12-13 21:30:05 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -67,11 +67,10 @@ void bx_instr_outp(Bit16u addr, unsigned len) {}
|
||||
void bx_instr_inp2(Bit16u addr, unsigned len, unsigned val) {}
|
||||
void bx_instr_outp2(Bit16u addr, unsigned len, unsigned val) {}
|
||||
|
||||
void bx_instr_mem_code(unsigned cpu, bx_address linear, unsigned size) {}
|
||||
void bx_instr_mem_data(unsigned cpu, bx_address linear, unsigned size, unsigned rw) {}
|
||||
void bx_instr_mem_code(unsigned cpu, bx_address linear, unsigned len) {}
|
||||
void bx_instr_mem_data(unsigned cpu, bx_address linear, unsigned len, unsigned rw) {}
|
||||
|
||||
void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw) {}
|
||||
void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned len) {}
|
||||
void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw) {}
|
||||
|
||||
void bx_instr_phy_write(unsigned cpu, bx_address addr, unsigned len) {}
|
||||
void bx_instr_phy_read(unsigned cpu, bx_address addr, unsigned len) {}
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: instrument.h,v 1.21 2007-12-13 17:16:21 sshwarts Exp $
|
||||
// $Id: instrument.h,v 1.22 2007-12-13 21:30:05 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -93,8 +93,7 @@ void bx_instr_outp2(Bit16u addr, unsigned len, unsigned val);
|
||||
void bx_instr_mem_code(unsigned cpu, bx_address linear, unsigned size);
|
||||
void bx_instr_mem_data(unsigned cpu, bx_address linear, unsigned size, unsigned rw);
|
||||
|
||||
void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw);
|
||||
void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned len);
|
||||
void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw);
|
||||
|
||||
void bx_instr_phy_write(unsigned cpu, bx_address addr, unsigned len);
|
||||
void bx_instr_phy_read(unsigned cpu, bx_address addr, unsigned len);
|
||||
@ -146,9 +145,9 @@ void bx_instr_wrmsr(unsigned cpu, unsigned addr, Bit64u value);
|
||||
# define BX_INSTR_REPEAT_ITERATION(cpu_id, i) bx_instr_repeat_iteration(cpu_id, i)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len, rw) bx_instr_lin_read(cpu_id, lin, phy, len, rw)
|
||||
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len) bx_instr_lin_write(cpu_id, lin, phy, len)
|
||||
# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) bx_instr_lin_access(cpu_id, lin, phy, len, rw)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_MEM_CODE(cpu_id, linear, size) bx_instr_mem_code(cpu_id, linear, size)
|
||||
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw) bx_instr_mem_data(cpu_id, linear, size, rw)
|
||||
|
||||
@ -209,10 +208,10 @@ void bx_instr_wrmsr(unsigned cpu, unsigned addr, Bit64u value);
|
||||
# define BX_INSTR_REPEAT_ITERATION(cpu_id, i)
|
||||
|
||||
/* memory access */
|
||||
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len, rw)
|
||||
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len)
|
||||
# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
|
||||
|
||||
# define BX_INSTR_MEM_CODE(cpu_id, linear, size)
|
||||
/* memory access */
|
||||
# define BX_INSTR_MEM_CODE(cpu_id, linear, size)
|
||||
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw)
|
||||
|
||||
/* called from memory object */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user