Stanislav Shwartsman
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81b1a0ddb7
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Fixed bug in BLENDVPS/PD instructions
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2008-05-10 22:20:05 +00:00 |
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Stanislav Shwartsman
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56a44d675b
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Fixed potential memory overflow in dbg paging function
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2008-05-10 22:11:48 +00:00 |
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Stanislav Shwartsman
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c8f870c9ac
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Remove incorrect assertion
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2008-05-10 21:30:30 +00:00 |
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Stanislav Shwartsman
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d3528cccd6
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Style fixes - name convention for push to new stack methods
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2008-05-10 20:35:03 +00:00 |
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Stanislav Shwartsman
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ec1ff39a5f
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Splitted memory access methods for 32 and 64-bit code.
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
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2008-05-10 18:10:53 +00:00 |
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Stanislav Shwartsman
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ebc4bf0cff
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Check RIP for canonical boundaries in 64-bit mode
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2008-05-10 15:02:42 +00:00 |
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Stanislav Shwartsman
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3634c6f892
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Compress FPU tag word
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2008-05-10 13:34:47 +00:00 |
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Stanislav Shwartsman
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6ebae41ad7
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print physcial address with special format - preparations for 64-bit physical address emu
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2008-05-09 22:33:37 +00:00 |
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Stanislav Shwartsman
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8e7cf2bf3a
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- Fixed CPUID
- Merged jmp_call_gate16 and jmp_call_gate32 to single function
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2008-05-09 18:09:04 +00:00 |
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Stanislav Shwartsman
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80c9b5fcbe
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Compilation error fixed
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2008-05-09 08:28:00 +00:00 |
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Stanislav Shwartsman
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16d073bf51
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Fixed recently introduced PUSH_Eq decoding bug
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2008-05-08 21:34:22 +00:00 |
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Stanislav Shwartsman
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09c875b11c
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Fixed dbg comment
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2008-05-08 21:04:03 +00:00 |
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Stanislav Shwartsman
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6bb845caa0
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iFixed ENTER instruction
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2008-05-08 18:02:21 +00:00 |
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Stanislav Shwartsman
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25ce5f7d48
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Small functionality correctness fixes
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2008-05-07 16:45:07 +00:00 |
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Stanislav Shwartsman
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74e2127c5e
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Fixed OF flag handling bug
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2008-05-06 20:29:26 +00:00 |
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Stanislav Shwartsman
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5da460b6dc
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Clear segment descriptor cache when loading null selector
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2008-05-06 19:45:17 +00:00 |
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Stanislav Shwartsman
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48d45518eb
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Fixed CMPXCHG code bug from yesterday
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2008-05-06 05:06:32 +00:00 |
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Stanislav Shwartsman
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eedf26627f
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Fixes in CMPXHG8B instruction - slight speedup and correct #AC check
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2008-05-05 21:48:07 +00:00 |
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Stanislav Shwartsman
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685a10749d
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Remove redundant RSP canonical check - will happen anyway in push function
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2008-05-04 21:51:52 +00:00 |
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Stanislav Shwartsman
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64a80c8a2d
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- Added canonical check for SYSENTER MSRs in WRMSR
- Fixed LLDT and LTR instructions in 64-bit mode
- Fixed error code for not 64-bit CS in interrupt from long mode
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2008-05-04 21:25:16 +00:00 |
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Stanislav Shwartsman
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f642b57a54
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Lazy falgs optimizations by Darek Mihocka
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2008-05-04 15:07:08 +00:00 |
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Stanislav Shwartsman
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06e3615239
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Reduce trace cache memory footprint using naive memory pool trace allocation
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2008-05-04 05:37:36 +00:00 |
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Stanislav Shwartsman
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a6b360c92f
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Removed duplicated ';'
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2008-05-03 17:35:11 +00:00 |
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Stanislav Shwartsman
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50c9674d2e
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Small optimization in memory access functions
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2008-05-03 17:33:30 +00:00 |
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Stanislav Shwartsman
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ed4be45a8b
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Split shift/rotate opcodes in 32-bit mode and 64-bit mode
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2008-05-02 22:47:07 +00:00 |
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Stanislav Shwartsman
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73d8bd3af4
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Hide more memory variables
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2008-05-01 20:28:36 +00:00 |
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Stanislav Shwartsman
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f5780a5f5c
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Hide some BX_MEM_C variables
Optimize resolve16 methods - by reducing their amount again - reduce chance for misspredictin
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2008-05-01 20:08:37 +00:00 |
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Stanislav Shwartsman
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8e8fa363f1
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Check for seg cache valid bit in real mode as well - fix for big real mode
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2008-05-01 05:11:19 +00:00 |
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Stanislav Shwartsman
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81deffd65d
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More fetchdecode fixes
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2008-04-30 21:32:33 +00:00 |
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Stanislav Shwartsman
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e5b6f90b62
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some fetchdecode fixes
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2008-04-30 21:07:12 +00:00 |
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Stanislav Shwartsman
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423aa44ab1
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PUSHA/POPA fixes
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2008-04-30 20:41:40 +00:00 |
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Stanislav Shwartsman
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c063563bb8
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Fixed compilation error
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2008-04-30 16:31:07 +00:00 |
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Stanislav Shwartsman
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affbdbefb4
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do not cause tranition to MMX state if no MMX reg touched
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2008-04-29 21:47:16 +00:00 |
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Stanislav Shwartsman
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18b4dec094
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Fixed compilation error
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2008-04-29 05:12:21 +00:00 |
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Stanislav Shwartsman
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06c6ac0060
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- Fixed effective address wrap in 64-bit mode with 32-bit address size
- Fixed SMSW instruction in 32-bit and 64-bit modes
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2008-04-28 18:18:08 +00:00 |
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Stanislav Shwartsman
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b000c6ac17
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- Fixed TSS limit check in task switch routine
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2008-04-28 18:14:50 +00:00 |
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Stanislav Shwartsman
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67e534832b
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Remove from CPU reference to MEM object - it is only one and could be static
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2008-04-27 19:49:02 +00:00 |
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Stanislav Shwartsman
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e86102eea5
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Fixed 2nd dword of 64-bit descriptor check
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2008-04-26 19:41:28 +00:00 |
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Stanislav Shwartsman
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7384c8e07d
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Fixed restore state in task switch
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2008-04-26 10:20:15 +00:00 |
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Stanislav Shwartsman
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bbe7db9e88
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Fixed bug with pushing into new stack in exception function
Fixed bug with Expand down segment limits (can be critical)
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2008-04-25 21:21:46 +00:00 |
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Stanislav Shwartsman
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9047c9be96
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Support for reserved bits checking in paging
Check for page is in DTLB before invalidating by INVLPG
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2008-04-25 20:08:23 +00:00 |
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Stanislav Shwartsman
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00ee869624
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alignment check for write_new_stack
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2008-04-25 12:44:16 +00:00 |
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Stanislav Shwartsman
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a647c7e551
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Check for old TSS limits in task switching logic
MSR_GSKERNELBASE should be canonical - added WRMSR check
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2008-04-25 11:39:51 +00:00 |
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Stanislav Shwartsman
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b78878bd90
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Fixed #AC exception detection
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2008-04-25 08:19:36 +00:00 |
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Stanislav Shwartsman
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cf47fab9d0
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Fixed address size wrap in the bittest/set instructions
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2008-04-25 07:40:51 +00:00 |
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Stanislav Shwartsman
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ea48400435
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Chnage back write variables order
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2008-04-24 22:41:46 +00:00 |
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Stanislav Shwartsman
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83e55874a4
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Fixed compilation issue
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2008-04-24 21:59:42 +00:00 |
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Stanislav Shwartsman
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64f2489afb
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Correctly implement opcode group G11 i.e. instructions C6 and C7 should @UD when modrm nnn field != 0 (1st instr in the group
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2008-04-24 21:52:28 +00:00 |
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Stanislav Shwartsman
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8e08402eb2
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Fixed loading of SS null selector in long mode afer exception
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2008-04-24 20:52:27 +00:00 |
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Stanislav Shwartsman
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b504253645
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Added canonical check for LIDT/LGDT instructions in 64-bit mode
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2008-04-24 19:34:01 +00:00 |
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