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333 Commits

Author SHA1 Message Date
Stanislav Shwartsman
f5ce2a7639 split crreg access functions to separate file 2010-03-25 21:33:07 +00:00
Stanislav Shwartsman
79466dffe2 apic virtualization + vmx fixes 2010-03-16 14:51:20 +00:00
Stanislav Shwartsman
5d2c2879a7 IA32_FEATURE_CONTROL_MSR is implemented 2010-03-06 16:59:05 +00:00
Stanislav Shwartsman
189553d702 bugfix 2010-03-05 08:54:07 +00:00
Stanislav Shwartsman
01cfbdccbc Move MMX to be runtime option 2010-03-01 18:53:53 +00:00
Stanislav Shwartsman
5b6a14656d Make XSAVE as runtime option 2010-02-26 22:53:43 +00:00
Stanislav Shwartsman
5df864b1f1 Move param_names.h into bochs root folder 2010-02-26 14:18:19 +00:00
Stanislav Shwartsman
927c3594d6 enable compilation with CPU_LEVEL <= 6 
converted SEP to runtime option as well
 2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
78a420faa1 first updates 2010-02-25 22:34:56 +00:00
Stanislav Shwartsman
033a20b3b2 allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT 2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
bd60e0264c change Copyright to Bochs Project 2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
0a735942e2 restore real mode with CPL != 0 2009-11-20 14:18:43 +00:00
Stanislav Shwartsman
5099cff0e5 save restore for new var 2009-11-13 16:01:37 +00:00
Stanislav Shwartsman
71bb10f98c move ignore-bad-msrs to runtime option in ,bochsrc 2009-11-13 15:55:46 +00:00
Stanislav Shwartsman
6f0db17b08 fixed #DB on rpeat instructions 2009-10-30 09:13:19 +00:00
Stanislav Shwartsman
da4722e257 optimize sr params 2009-10-16 18:29:45 +00:00
Stanislav Shwartsman
d26660dac1 small fixes 2009-08-19 09:59:30 +00:00
Stanislav Shwartsman
d44dc8b83c Fix param name 2009-07-28 14:52:19 +00:00
Stanislav Shwartsman
66c4654418 segment desriptor 'A' bit handling fixes 2009-07-27 05:52:28 +00:00
Stanislav Shwartsman
733491871d copy/paste typo fix 2009-06-15 15:10:05 +00:00
Stanislav Shwartsman
cd445195dd cleanup configure options. All paging related stuff is now automatically set/unset according to cpu-level option. 
Related configure options (--enable-pae, --enable-mtrr, --enable-global-pages, --enable-large-pages) are deprecated.
Less configure options - less configure problems :)
 2009-06-15 09:30:56 +00:00
Stanislav Shwartsman
3d7bbf4356 fixed VMXON pointer concept 2009-05-28 08:26:17 +00:00
Stanislav Shwartsman
847179fd13 mtrr reverved bits check 2009-05-21 13:25:30 +00:00
Stanislav Shwartsman
aac70fdf25 faster vmenter/vmexit 2009-05-03 13:02:14 +00:00
Stanislav Shwartsman
78418c6a74 removed cr1 from cpu 2009-05-01 09:32:46 +00:00
Stanislav Shwartsman
153f86b1a8 save/restore mwait status correctly 2009-04-05 19:38:44 +00:00
Stanislav Shwartsman
9e092a86c3 merge "system" and "segment" blocks of descriptor 2009-04-05 19:09:44 +00:00
Stanislav Shwartsman
c9383813f0 don't have to keep both limit and limit_scale 2009-04-05 18:16:29 +00:00
Stanislav Shwartsman
a0b1fda178 bugfixes 2009-03-27 16:42:21 +00:00
Stanislav Shwartsman
4470c6a1c8 make ICACHE always enabled option and deprecate it in the configure script 
Trace cache still can be turned off
 2009-03-13 18:48:08 +00:00
Stanislav Shwartsman
09489f968a cleanup APIC initialization and setting of APIC_ID 2009-02-20 17:26:01 +00:00
Stanislav Shwartsman
78590cc6f2 remove redundant cpu->name variable 2009-02-20 17:05:03 +00:00
Stanislav Shwartsman
7be90a7426 forgot to enable local_apic in init() 2009-02-18 22:38:58 +00:00
Stanislav Shwartsman
3564ef3162 small fixes 2009-02-18 22:33:06 +00:00
Stanislav Shwartsman
3a1852ea23 take local APIC read/write access into CPU class from BX_MEM (needed for APIC virtualization later) 2009-02-17 19:20:47 +00:00
Stanislav Shwartsman
fdf4f25230 revert incorret merge 2009-02-03 19:28:22 +00:00
Stanislav Shwartsman
fbc6f04d8a correctly deliver INIT 2009-02-03 19:26:09 +00:00
Stanislav Shwartsman
592484408f Initial NMI virtualization for VMX, clean out CPU pins set/clear code 2009-02-03 19:17:15 +00:00
Stanislav Shwartsman
9430c5cf95 INIT pin is blocked when CPU is waiting for SIPI 2009-01-31 11:53:57 +00:00
Stanislav Shwartsman
f8185a6bc6 Added Intel VMX emulation to Bochs CPU 2009-01-31 10:43:24 +00:00
Stanislav Shwartsman
a1c11c788b sepatate activity state from debug trap 2009-01-29 20:27:57 +00:00
Stanislav Shwartsman
cd90782293 No need to save/restore EXT field 2009-01-23 17:48:38 +00:00
Stanislav Shwartsman
a396c8a1ce Rework SMM mess 2009-01-17 22:35:45 +00:00
Volker Ruppert
501952efdd - removed unused logfunctions member 'type' and related method 'settype()' 
- updated FSF address in copyright
 2009-01-10 11:30:20 +00:00
Stanislav Shwartsman
836e9649d8 modify set cr0 functionality 2009-01-10 10:07:57 +00:00
Stanislav Shwartsman
6ea14b747c Fixed SEGFAULT with configurable MSRS 
fixed osdep issue in win32 enhanced debugger module
 2009-01-08 18:07:44 +00:00
Stanislav Shwartsman
e182e74a4d Added ability to define user MSRs spec for emulated CPU 2008-12-28 20:30:48 +00:00
Stanislav Shwartsman
1231f64d79 move function to cpu.cc 2008-12-07 19:47:34 +00:00
Stanislav Shwartsman
f9ce1171fe rename crreg accessors 2008-12-06 10:21:55 +00:00
Stanislav Shwartsman
ae4e5cea65 Fixed param tree overflow 2008-12-04 20:26:06 +00:00
Stanislav Shwartsman
098308dd9f some variable renames + comp warn fix 2008-12-01 19:06:14 +00:00
Stanislav Shwartsman
f69ac41e59 added infrastructure for init disable 2008-12-01 18:54:24 +00:00
Stanislav Shwartsman
fbd078cb70 updates for instrumentation 2008-11-18 20:58:09 +00:00
Stanislav Shwartsman
3d60e1e20d Fixed CPU state after software reset (INIT). 
Update instrumentation.
Clean extra space from plugin.h biosdev device name
 2008-11-18 20:55:59 +00:00
Stanislav Shwartsman
f5ba90da55 Misaligned check small optimization 2008-09-08 15:45:57 +00:00
Stanislav Shwartsman
56504e4a67 Add some missed eflags accessors and pay more attention for special ones 2008-08-16 21:06:56 +00:00
Stanislav Shwartsman
dcb82ec4bf Optimize TLB flush methods 2008-08-13 21:51:54 +00:00
Stanislav Shwartsman
c9a8e4d79d Remove redundant TLB flush - it is even before TLB iniT 2008-08-13 20:54:03 +00:00
Stanislav Shwartsman
6398ebb1d4 First step of access bits cleanup and optimization - no perf gain yet 2008-08-03 19:53:09 +00:00
Stanislav Shwartsman
a0e66d0e4c fixed variable name 2008-06-14 16:55:45 +00:00
Stanislav Shwartsman
9393cff0b9 Fixed CPU CPL restore when in v8086 mode 2008-05-30 21:10:37 +00:00
Stanislav Shwartsman
d295371450 - Correctly handle segment a byte in BIG real mode 2008-05-26 21:46:39 +00:00
Stanislav Shwartsman
3619c0f6b4 Some changes to make x86-debugger feature working back 2008-05-23 17:49:46 +00:00
Stanislav Shwartsman
4a76bd2169 Fixed setting of reserved bits in CR3 register 2008-05-11 19:36:06 +00:00
Stanislav Shwartsman
67e534832b Remove from CPU reference to MEM object - it is only one and could be static 2008-04-27 19:49:02 +00:00
Stanislav Shwartsman
bdaef81603 Added debugger memory trace functionality. Enable by 'trace-mem on' command 2008-04-19 13:21:23 +00:00
Stanislav Shwartsman
15e9dca062 - support 64-bit write to MSR_TSC using WRMSR instruction 
- fixed save/restore param type for async_event
- fixed setting of reserved bits in upper part of CR4 in 64-bit mode
 2008-04-18 18:32:40 +00:00
Stanislav Shwartsman
892fa99c6f - prefetch hint should be NOP when use in register mode 
- #GP when trying to set reserved bits of CR4_HI in 64-bit mode
- #GP when trying to set reserved bits of EFER MSR
- clear upper part of RSI/RDI when executing rep instructions with 32-bit asize
  even if no repeat iterations were executed (because of RCX=0 for example)
- write SYSENTER_EIP_MSR and SYSENTER_ESP_MSR as 64-bit when x86_64 supported
- set MSR_FMASK reset value
- MSR_FMASK should be 32-bit only
- check for fetch permissions when doing ITLB lookup
- #GP when trying to write non-canonical address to MSR_CSTAR or MSR_LSTAR
- correct repeat instructions timing
- mark TSS busy in TR after it is loaded
 2008-04-16 16:44:06 +00:00
Stanislav Shwartsman
6d65d82e03 Call BX_INSTR_EXIT callback instead of BX_INSTR_SHUTDOWN 2008-04-15 21:27:57 +00:00
Stanislav Shwartsman
a851cfd8f0 Re-implemented modebp debugger function in simple and more clean way 2008-04-07 19:59:53 +00:00
Stanislav Shwartsman
fea49bb270 Fixed linear address wrap in legacy (not long64) mode 2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
90f1973bef Removed BX_USE_TLB - TLB is always used, only Guest2HostTLB is optional feature 
Use Guest2HostTLB in prefetch code for IFETCHES - speedup above 3%
 2008-04-05 20:41:00 +00:00
Stanislav Shwartsman
62e3728591 preparations for future optimizations - not necessary speedupo now 2008-04-03 17:56:59 +00:00
Stanislav Shwartsman
e91409704f Convert EFER to val32 register, similar to other control registers 2008-03-31 20:56:27 +00:00
Stanislav Shwartsman
b5f5e01f7e added assert to paging.cc 2008-03-29 21:12:11 +00:00
Stanislav Shwartsman
08f958f458 Fixed pageWriteStampTable to handle BIOS code as well - increased the table to all 4G instead of allocated memory size 
Avoid checking of pageWriteStamp in the heart of cpu loop with trace cache - now decWriteStamp will post stopTraceExecution event if it hits code page
 2008-03-29 21:01:25 +00:00
Stanislav Shwartsman
e48b398bee Add NIL register and simplify more BxResolve work 2008-03-29 09:34:35 +00:00
Stanislav Shwartsman
9fcbf28cea Removed can_push method - normal memory accesses will be used instead. 
Fixed reset value of TR.TYPE
 2008-03-24 22:13:04 +00:00
Stanislav Shwartsman
b07a46f200 Fixed CR0 reset value. Modified param tree for IDTR and GDTR segments 2008-03-23 20:18:24 +00:00
Stanislav Shwartsman
457152334e step2 in XSAVE implementation 2008-02-13 16:45:21 +00:00
Stanislav Shwartsman
8d7410a852 Canonical check have higher priority than #AC check 2008-02-11 20:52:10 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
032b13047c Minor fix in cpu reset, bug sometimes caused to run on garbage memory after software reset. Some small debug messages fixes 2008-02-01 13:25:23 +00:00
Volker Ruppert
885fd16565 - fixed compilation error with wx debugger enabled 2008-01-31 21:44:28 +00:00
Stanislav Shwartsman
5f18ed902d fixed compilation issue 2008-01-29 22:29:48 +00:00
Stanislav Shwartsman
1a55fce072 remove staruct for eflags and use single 32-bit variable 2008-01-29 22:26:29 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
192f398b46 removed --enable-magic-breakpoint configure option - it is enabled by default if Bochs internal debugger compiled in. Also it always possible to switch magic break off by .bochsrc option 2008-01-21 21:36:58 +00:00
Stanislav Shwartsman
e51184c8cf Eliminate saving of RSP from heart of cpu_loop 
Now save RSP only where it is really required
 2007-11-24 14:22:34 +00:00
Stanislav Shwartsman
30f42d74f1 make sreg index tables static in fetchdecode and remove them from init.cc/cpu.h 2007-11-18 21:07:40 +00:00
Stanislav Shwartsman
9dc471bbe5 Simplify Guest2HostTLB code 
Fixed APIC CPUID bit
 2007-11-11 20:44:07 +00:00
Volker Ruppert
56dd9fe3d9 - fixed several MSVC compilation warnings 
* MSVC doesn't support localized variables (e.g. valid inside of a 'for' loop
    only). So we cannot use the variable 'i' with different types (unsigned / int)
    in the reset() method.
  * added some conversions from Bit64s to bx_bool
 2007-11-03 16:55:08 +00:00
Stanislav Shwartsman
e137560b14 Complete MONITOR/MWAIT implemntation (including monitoring of memory range) 
Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
 2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
c0640a078c INFO message about CPU reset 2007-10-14 21:42:50 +00:00
Stanislav Shwartsman
52891b501b Correct name for cpu param when only 1 cpu is used 2007-10-14 19:36:23 +00:00
Stanislav Shwartsman
e9801ef501 Support for restore cpu (and any other device from bochs root) from debugger 2007-10-14 19:04:51 +00:00
Stanislav Shwartsman
c0e7c31b7d Param name fixed to capital letters 2007-10-14 00:22:07 +00:00
Stanislav Shwartsman
082eb05b6b First step to fully configurable CPUID 
- put CPUID functions data into array, in future we could load this array from configure file
 - cpuid initialize function is more flexible now but still reuire some work
 2007-10-12 19:30:51 +00:00
Stanislav Shwartsman
be9ad60ef3 cleanups 2007-10-11 22:44:17 +00:00
Stanislav Shwartsman
f6ed95785f added cpu state param - for future use and for dbg info 
started to move debugger to info bx_param interface -> info sse and info mmx commands modified
 2007-10-11 18:12:00 +00:00
Stanislav Shwartsman
071c5c1a26 A lot of changes but everything is really trivial. 
Make save/restore default feature, the configure option for save/restore removed from configure script and save/restore made available forever. All code now assume it is exists. Bochs save/restore tree previosly called "save_restore" renamed to "bochs" tree and it will be havily used everywhere, starting from save/restore and ending by various bochs debugger functions. I am going to rework debugger code to get rid of debug CPU access functions and use this "bochs" param tree instead
 2007-09-28 19:52:08 +00:00
Stanislav Shwartsman
91e6ca8d5c Implemented MTRR support 
Fixes in #PF exception priority
 2007-09-20 17:33:35 +00:00
Stanislav Shwartsman
70f513b07b Make efer control MSR separate register 2007-09-10 20:47:08 +00:00
Stanislav Shwartsman
895891b673 Implemented #AC check under configure option 
Fixes in misaligned SSE support
 2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
38d1f39c77 Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation 2007-07-09 15:16:14 +00:00
Volker Ruppert
f8aec91820 - fixed some MSVC warnings 2007-04-06 15:22:17 +00:00
Stanislav Shwartsman
f8003098b1 Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;) 
Fixed "last prefix" for REX in 64-bit mode
 2007-01-25 19:09:41 +00:00
Stanislav Shwartsman
9b10f209f3 Fixed typo 2007-01-12 16:09:39 +00:00
Stanislav Shwartsman
6c63e84d23 Fixed CR3 masking in long mode 
Added PANIC assertion of 32-bit physical address in PAE mode
cleanup
 2006-10-04 19:08:40 +00:00
Stanislav Shwartsman
3ab94305a0 1. Fixed bug report 
[ bochs-Bugs-1562172 ] TLB_init() fails to initialize priv_check array if USE_TLB 0
2. Paging is always exists for i386+
   To disable paging it is better to use normal model without special code, only by setting cr0.pg=0
 2006-09-20 17:02:20 +00:00
Volker Ruppert
5dd0d64b11 - several changes for restart support in wx (not yet complete) 
* don't initialize cpu specific parameters for the wx debugger if they already
    exist
  * separate siminterface method init_save_restore() added
  * old wx specific handling in quit_sim() removed
  * new bx_list_c method clear() deletes all parameters from the list
  * moved devices cleanup code from the pc_system to a new devices method exit()
  * pc_system init code now sets ticksTotal to 0
 2006-09-07 18:50:51 +00:00
Stanislav Shwartsman
173d126763 Fixed LDTR reset vales 2006-08-31 18:21:16 +00:00
Stanislav Shwartsman
fdac9efa9b Fixed ton of code duplication. 
Do not save/restore XMM8-XMM15 not in 64-bit mode
 2006-08-31 18:18:17 +00:00
Volker Ruppert
3600f1af41 - fixed LDTR list size 2006-08-26 07:35:27 +00:00
Stanislav Shwartsman
65082e4a4f Handle granularity field for LDT 
Next step - fix code duplication with TSS
 2006-08-25 19:56:03 +00:00
Stanislav Shwartsman
49d7b4614f Fixed another bug generator - duplication between descriptor type field and four descriptor cache bits 2006-06-12 16:58:27 +00:00
Stanislav Shwartsman
308521e7ce Fixes in SYSCALL/SYSRET instructions 
Use parse_selector to avoid code duplication
 2006-06-11 21:37:22 +00:00
Volker Ruppert
d550d71e03 - register parameters for the wx debugger only if present (fixes memory leak) 
- removed useless static variable 'counter'
 2006-06-06 18:36:50 +00:00
Stanislav Shwartsman
c8c5772f44 1. Fix BX_INFO message in config.cc 
2. In init.cc save and restore BX_CPU_THIS__PTR trace value, allows to enable/disable tracing using save/restore.
3. in iret.cc - cleanup3. in iret.cc - cleanup3. in iret.cc - cleanup
 2006-06-05 17:33:25 +00:00
Stanislav Shwartsman
08d7e8e305 Fixed wrong assert_check failure found during x86-64 save/restore experiments 2006-06-05 16:36:56 +00:00
Stanislav Shwartsman
fea15294b5 Fixed compilation error in init.cc 
Move initialization of memory object to misc_mem.cc
 2006-06-03 12:59:14 +00:00
Stanislav Shwartsman
d17eb99f76 fixed allocated physical memory limit check in memory.cc 
Force eflags before saving them - register eflags using param handlers
 2006-06-01 20:05:15 +00:00
Stanislav Shwartsman
4b7e7087aa Handle more fields memory management insie the bx_param_c. 
Remove more strdups
 2006-05-30 17:01:27 +00:00
Stanislav Shwartsman
fee48d74e0 Avoid doing strdup for param name field - most of the strdups elliminated ! 2006-05-29 22:33:38 +00:00
Stanislav Shwartsman
5b912c26af Fixed save/restore of segment registers for x86-64 mode 2006-05-28 19:18:29 +00:00
Stanislav Shwartsman
286b89d763 Several x86-64 MSRs were not-initilized ! 
Fixed small save-restore bug in dma.cc
First step to make save-restore code look better (only several files processed for example)
 2006-05-28 17:07:57 +00:00
Stanislav Shwartsman
0977bef9a2 Fix compilation err for x86-64 2006-05-27 16:05:30 +00:00
Stanislav Shwartsman
8b0df8e99b Merge SAVE_RESTORE branch to CVS 2006-05-27 15:54:49 +00:00
Stanislav Shwartsman
8b55085c76 Merge tss286 and tss386 segment descriptor cache fields to one structure 2006-05-21 20:41:48 +00:00
Stanislav Shwartsman
d00b2dec1d LDTR and TR type check in assert_check 2006-05-21 19:31:23 +00:00
Stanislav Shwartsman
73e1266cbe Add CR0 consistency checks and CS.L/CS.D consistency check 
Optimize icache writestamps - 2x more space to decrement for page-write-stamp
 2006-05-19 20:04:33 +00:00
Stanislav Shwartsman
7c2c9c41e8 Remove unused CPU vars 2006-05-15 18:00:55 +00:00
Volker Ruppert
9340f3b3f8 - partial sync with BRANCH_SAVE_RESTORE_3 (hardware save/restore not present yet) 
* changed data format of text files for save/restore (looks like C/C++ structures,
    similar to the format used in old save/restore branches)
  * don't set the initial value of shadow bool parameters
  * don't set the initial value of bool parameters twice
  * cpu/init.cc: missing #undef added
  * ne2k.cc: variable tx_timer_active was never set to 1 (type now bx_bool)
  * floppy.cc: missing initialization of the 'eot' array in reset() added
  * pic.h: type of member 'byte_expected' changed to Bit8u
  * pit_wrap.h: unused members removed
 2006-05-01 18:24:47 +00:00
Stanislav Shwartsman
b2408c2fca Added assertion check CPU method, could be used for "debug mode" run with checking various assumptions before each instruction emulation 2006-04-25 14:42:57 +00:00
Volker Ruppert
52c4666465 - partial sync with BRANCH_SAVE_RESTORE_3 (hardware save/restore not present yet) 
* fixed minimum limit of signed variable types
  * don't set the initial value of shadow parameters
  * fixed range check for shadow parameters
  * added support for setting the value base (decimal/hex) of numeric shadow parameters.
    The text format hex number is now initialized in the constructor
  * added missing newline after filename for binary data
  * fixed data size of 64-bit shadow parameters
  * fixed save/restore output format of numeric parameters (signed/unsigned/64-bit)
  * cpu/init.cc: fixed macro name and added missing #undef line
 2006-04-22 18:14:55 +00:00
Volker Ruppert
eb2104d0de - parameters for the wx debugger moved to a separate subtree to avoid conflicts 
with the proposed save/restore feature
- fixed a warning in the cpu parameter handler for the wx debugger
 2006-04-16 10:12:32 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction 
Added HALT state indication (actually make existant one working for single CPU)
 2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
da3d26d7f4 Preliminary implemntation of SMM save statei 
Fixed fetchModeMask for load32bitOsStack
 2006-03-27 18:02:07 +00:00
Stanislav Shwartsman
d6f85c12f6 NMI support inside the CPU. 
Added two functions to query NMI and SMI from Bochs debugger.
In future they could be used for generating NMI or SMI by user request using GUI button (could be implemented separatelly later and under configure-time or .bocshrc option)
 2006-03-16 20:24:09 +00:00
Stanislav Shwartsman
a64b16391d Remove unused vars 2006-03-15 17:57:11 +00:00
Stanislav Shwartsman
e85a90a720 Remove cpu.h -> devices.cc dependancy, kill_bochs_request moved from CPU to bx_pc_system 
Small Icache simplification and speedup
 2006-03-14 18:11:22 +00:00
Volker Ruppert
9699eaeca4 - added SMP support in save/restore parameter subtree 
- TODO: implement tab window control for SMP CPUs in wx "show cpu" dialog
 2006-03-09 20:16:17 +00:00
Volker Ruppert
5597fc9cf3 - fixed wx "Show CPU" dialog to make it work with the new parameter handling 
- fixed CPU register names
- removed old parameter handling (bx_id, BXP_* symbols, param_registry, etc.)
 2006-03-08 18:10:41 +00:00
Volker Ruppert
575a17e50f - converted cpu state parameters to param-tree style 
- removed old-style parameter init methods
- NOTE: the wx CPU registers dialog (debugger) currently reports nothing
- TODO: fix wx CPU registers dialog, remove remaining bx_id related stuff
 2006-03-07 20:32:07 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
fc0894bbe1 Enable A20 after system reset 2006-03-04 16:58:10 +00:00
Stanislav Shwartsman
a527b2cfca first smm - implement cpu state when switching to SMM 
smm coming soon
fixed code duplication in init.cc
 2006-02-28 19:50:08 +00:00
Stanislav Shwartsman
55ceecf79b Small optimization in icache page-write-stamp 2006-02-28 17:47:33 +00:00
Stanislav Shwartsman
203a9caf31 SMM mode could leave together with pmode or any other (according to amd docs) 
so we need separate bx_bool indicator in_smm instead
 2006-02-14 20:03:14 +00:00