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some variable renames + comp warn fix

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This commit is contained in:
Stanislav Shwartsman 2008-12-01 19:06:14 +00:00
parent f69ac41e59
commit 098308dd9f
8 changed files with 44 additions and 38 deletions
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4
bochs/cpu/apic.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: apic.cc,v 1.111 2008-11-20 18:44:15 sshwarts Exp $
// $Id: apic.cc,v 1.112 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2002 Zwane Mwaikambo, Stanislav Shwartsman
@ -818,7 +818,7 @@ bx_bool bx_local_apic_c::match_logical_addr(Bit8u address)
if (address == 0xff) // broadcast all
return 1;
if ((address & 0xf0) == (log_dest & 0xf0))
if ((unsigned)(address & 0xf0) == (unsigned)(log_dest & 0xf0))
match = ((address & log_dest & 0x0f) != 0);
}
else {

22
bochs/cpu/cpu.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.cc,v 1.252 2008-12-01 18:54:24 sshwarts Exp $
// $Id: cpu.cc,v 1.253 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -436,7 +436,7 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
while (1)
{
if ((BX_CPU_INTR && (BX_CPU_THIS_PTR get_IF() || (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT_IF))) ||
BX_CPU_THIS_PTR nmi_pending || BX_CPU_THIS_PTR smi_pending)
BX_CPU_THIS_PTR pending_NMI || BX_CPU_THIS_PTR pending_SMI)
{
// interrupt ends the HALT condition
#if BX_SUPPORT_MONITOR_MWAIT
@ -496,11 +496,11 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
// SMI
// INIT
// (bochs doesn't support these)
if (BX_CPU_THIS_PTR smi_pending && ! BX_CPU_THIS_PTR smm_mode())
if (BX_CPU_THIS_PTR pending_SMI && ! BX_CPU_THIS_PTR smm_mode())
{
// clear SMI pending flag and disable NMI when SMM was accepted
BX_CPU_THIS_PTR smi_pending = 0;
BX_CPU_THIS_PTR nmi_disable = 1;
BX_CPU_THIS_PTR pending_SMI = 0;
BX_CPU_THIS_PTR disable_NMI = 1;
enter_system_management_mode();
}
@ -528,9 +528,9 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
// an opportunity to check interrupts on the next instruction
// boundary.
}
else if (BX_CPU_THIS_PTR nmi_pending) {
BX_CPU_THIS_PTR nmi_pending = 0;
BX_CPU_THIS_PTR nmi_disable = 1;
else if (BX_CPU_THIS_PTR pending_NMI) {
BX_CPU_THIS_PTR pending_NMI = 0;
BX_CPU_THIS_PTR disable_NMI = 1;
BX_CPU_THIS_PTR errorno = 0;
BX_CPU_THIS_PTR EXT = 1; /* external event */
BX_INSTR_HWINTERRUPT(BX_CPU_ID, 2, BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
@ -823,19 +823,19 @@ void BX_CPU_C::boundaryFetch(const Bit8u *fetchPtr, unsigned remainingInPage, bx
void BX_CPU_C::deliver_INIT(void)
{
if (! BX_CPU_THIS_PTR init_disable)
if (! BX_CPU_THIS_PTR disable_INIT)
BX_CPU_THIS_PTR reset(BX_RESET_SOFTWARE);
}
void BX_CPU_C::deliver_NMI(void)
{
BX_CPU_THIS_PTR nmi_pending = 1;
BX_CPU_THIS_PTR pending_NMI = 1;
BX_CPU_THIS_PTR async_event = 1;
}
void BX_CPU_C::deliver_SMI(void)
{
BX_CPU_THIS_PTR smi_pending = 1;
BX_CPU_THIS_PTR pending_SMI = 1;
BX_CPU_THIS_PTR async_event = 1;
}

18
bochs/cpu/cpu.h
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.538 2008-12-01 18:54:24 sshwarts Exp $
// $Id: cpu.h,v 1.539 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -902,9 +902,16 @@ public: // for now...
#define BX_ASYNC_EVENT_STOP_TRACE (0x80000000)
#endif
bx_bool in_smm;
unsigned cpu_mode;
bx_bool user_pl;
volatile bx_bool INTR;
volatile bx_bool smi_pending;
volatile bx_bool nmi_pending;
volatile bx_bool pending_SMI;
volatile bx_bool pending_NMI;
volatile bx_bool pending_INIT;
bx_bool disable_SMI;
bx_bool disable_NMI;
bx_bool disable_INIT;
// for exceptions
jmp_buf jmp_buf_env;
@ -921,11 +928,6 @@ public: // for now...
const Bit8u *eipFetchPtr;
bx_phy_address pAddrA20Page; // Guest physical address of current instruction
// page with A20() already applied.
unsigned cpu_mode;
bx_bool user_pl;
bx_bool in_smm;
bx_bool nmi_disable;
bx_bool init_disable;
#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
unsigned alignment_check_mask;
#endif

4
bochs/cpu/ctrl_xfer16.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: ctrl_xfer16.cc,v 1.63 2008-10-06 20:41:28 sshwarts Exp $
// $Id: ctrl_xfer16.cc,v 1.64 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -605,7 +605,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::IRET16(bxInstruction_c *i)
BX_CPU_THIS_PTR show_flag |= Flag_iret;
#endif
BX_CPU_THIS_PTR nmi_disable = 0;
BX_CPU_THIS_PTR disable_NMI = 0;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = RSP;

4
bochs/cpu/ctrl_xfer32.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: ctrl_xfer32.cc,v 1.80 2008-10-06 20:41:28 sshwarts Exp $
// $Id: ctrl_xfer32.cc,v 1.81 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -645,7 +645,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::IRET32(bxInstruction_c *i)
BX_CPU_THIS_PTR show_flag |= Flag_iret;
#endif
BX_CPU_THIS_PTR nmi_disable = 0;
BX_CPU_THIS_PTR disable_NMI = 0;
BX_CPU_THIS_PTR speculative_rsp = 1;
BX_CPU_THIS_PTR prev_rsp = ESP;

4
bochs/cpu/ctrl_xfer64.cc
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@ -1,5 +1,5 @@
////////c/////////////////////////////////////////////////////////////////
// $Id: ctrl_xfer64.cc,v 1.74 2008-09-06 21:10:40 sshwarts Exp $
// $Id: ctrl_xfer64.cc,v 1.75 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -466,7 +466,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::IRET64(bxInstruction_c *i)
BX_CPU_THIS_PTR show_flag |= Flag_iret;
#endif
BX_CPU_THIS_PTR nmi_disable = 0;
BX_CPU_THIS_PTR disable_NMI = 0;
BX_ASSERT(protected_mode());

22
bochs/cpu/init.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: init.cc,v 1.182 2008-12-01 18:54:24 sshwarts Exp $
// $Id: init.cc,v 1.183 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -507,11 +507,13 @@ void BX_CPU_C::register_state(void)
BXRS_PARAM_BOOL(cpu, EXT, EXT);
BXRS_PARAM_BOOL(cpu, INTR, INTR);
BXRS_PARAM_BOOL(cpu, smi_pending, smi_pending);
BXRS_PARAM_BOOL(cpu, nmi_pending, nmi_pending);
BXRS_PARAM_BOOL(cpu, in_smm, in_smm);
BXRS_PARAM_BOOL(cpu, nmi_disable, nmi_disable);
BXRS_PARAM_BOOL(cpu, init_disable, init_disable);
BXRS_PARAM_BOOL(cpu, disable_SMI, disable_SMI);
BXRS_PARAM_BOOL(cpu, pending_SMI, pending_SMI);
BXRS_PARAM_BOOL(cpu, disable_NMI, disable_NMI);
BXRS_PARAM_BOOL(cpu, pending_NMI, pending_NMI);
BXRS_PARAM_BOOL(cpu, disable_INIT, disable_INIT);
BXRS_PARAM_BOOL(cpu, pending_INIT, pending_INIT);
BXRS_PARAM_BOOL(cpu, trace, trace);
}
@ -851,11 +853,13 @@ void BX_CPU_C::reset(unsigned source)
# error "DR6: CPU > 6"
#endif
BX_CPU_THIS_PTR smi_pending = 0;
BX_CPU_THIS_PTR nmi_pending = 0;
BX_CPU_THIS_PTR in_smm = 0;
BX_CPU_THIS_PTR nmi_disable = 0;
BX_CPU_THIS_PTR init_disable = 0;
BX_CPU_THIS_PTR disable_SMI = 0;
BX_CPU_THIS_PTR pending_SMI = 0;
BX_CPU_THIS_PTR disable_NMI = 0;
BX_CPU_THIS_PTR pending_NMI = 0;
BX_CPU_THIS_PTR disable_INIT = 0;
BX_CPU_THIS_PTR pending_INIT = 0;
#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
BX_CPU_THIS_PTR alignment_check_mask = 0;
#endif

4
bochs/cpu/smm.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: smm.cc,v 1.45 2008-09-08 20:47:33 sshwarts Exp $
// $Id: smm.cc,v 1.46 2008-12-01 19:06:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006 Stanislav Shwartsman
@ -76,7 +76,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RSM(bxInstruction_c *i)
BX_INFO(("RSM: Resuming from System Management Mode"));
BX_CPU_THIS_PTR nmi_disable = 0;
BX_CPU_THIS_PTR disable_NMI = 0;
Bit32u saved_state[SMM_SAVE_STATE_MAP_SIZE], n;
// reset reserved bits