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2678 Commits

Author SHA1 Message Date
Stanislav Shwartsman
bb7a648d91 Major commit ! 
------------

Implemented SVN nested paging support - the Virtual Box boots perfectly with Nested Paging guest !
A lot of code duplication was added for now - major cleanup will follow later.

! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB - this configuration has Nested Paging enabled.

Some CPUID modules rework done to enable Toliman configuration.

Ckean up 'executable' attribute from all CPU source files.
 2012-02-13 23:29:01 +00:00
Stanislav Shwartsman
deaf58b130 read from CPUDB svm extensions 2012-02-13 21:55:27 +00:00
Stanislav Shwartsman
813fe4e6b9 reduce code duplication - continue preparing for nested paging implementation 2012-02-13 20:06:04 +00:00
Stanislav Shwartsman
4d0a5c1b07 - VMX: EPT misconfiguration should always take priority above EPT permissions violation (translate_guest_physical corner case bug) 
- VMX: EPT reserved bits set should cause EPT misconfiguration and not EPT violation
- VMX: EPT walk for guest CR3 address should be considered as 'page walk'
 2012-02-12 21:30:22 +00:00
Stanislav Shwartsman
0b5f798af1 re-commit changes from SVN rev11026 which were accidentially undo'ed by last Volker's commit 2012-02-12 19:13:57 +00:00
Volker Ruppert
de94b08a1a - class bx_list_c now contains a chained list of parameters. Removed the now 
obsolete maxsize parameter from all lists.
 2012-02-12 18:43:20 +00:00
Stanislav Shwartsman
855d2adece cleanups in paging code 2012-02-12 16:09:35 +00:00
Stanislav Shwartsman
fa182e96b5 for future nested paging: under NP PDPTR CACHE will contain NP PDPTR entries 2012-02-10 20:39:46 +00:00
Stanislav Shwartsman
b497077b70 intel disclosed more cpuid bits 2012-02-08 19:54:22 +00:00
Stanislav Shwartsman
9bebe91826 eliminate duplicated cpu methods by adding extra param to opcodes with no modrm 2012-02-03 10:24:59 +00:00
Stanislav Shwartsman
14ec87768e expand FCMOV function to 8 different functions - each one is much simpler to implement and understand 2012-02-01 12:07:53 +00:00
Stanislav Shwartsman
2e44613032 dos2unix for avx_pfp.cc 2012-01-30 15:29:22 +00:00
Stanislav Shwartsman
457c56c822 fixup for EPT paging 2012-01-22 18:39:15 +00:00
Stanislav Shwartsman
fc6712e3a3 undo part of prev paging commit 2012-01-19 20:01:32 +00:00
Stanislav Shwartsman
12afed23a1 small fix and cleanups in paging code 2012-01-19 06:38:22 +00:00
Stanislav Shwartsman
9461797886 added extra param to debugger phy access callback + cleanup in vmexit functions 2012-01-17 21:50:15 +00:00
Stanislav Shwartsman
f4b49633d4 paging code rework (cont) 2012-01-17 18:20:55 +00:00
Stanislav Shwartsman
0d64a6cb92 fixed paging bug in previous commit 2012-01-16 15:26:25 +00:00
Stanislav Shwartsman
7d641450ec remove param from check_entry_PAE function - it is always the same for all calls 2012-01-15 20:25:39 +00:00
Stanislav Shwartsman
c7cb99787e rework in paging code before nested paging implementation for SVM - step 2 
optimize TLB flush code
 2012-01-15 19:38:00 +00:00
Stanislav Shwartsman
4db23355cd rework in paging code before nested paging implementation for SVM - step 1 2012-01-15 17:54:13 +00:00
Stanislav Shwartsman
f5d55f5eb6 - Implemented Task Switch intercept in SVM, cleanup in task switch handling code 
- Changed (c) year in several cpu files
- Cleanup and indent fixes in VMX code
 2012-01-11 20:21:29 +00:00
Stanislav Shwartsman
cb366e00c5 fixed code duplication in exceptions 2012-01-11 06:27:35 +00:00
Stanislav Shwartsman
ba7887f31c fixed code duplication with v86 interrupt redirection 2012-01-10 08:13:34 +00:00
Stanislav Shwartsman
8d698c7087 fixed compilation err ith cpu-level=5 and cleanups 2012-01-09 20:52:15 +00:00
Stanislav Shwartsman
87b1c31495 fixed SVM VmEXIT on #PF error code 2012-01-09 20:24:23 +00:00
Stanislav Shwartsman
f64c38dfaf fix in SVM event injection 2012-01-09 20:15:15 +00:00
Stanislav Shwartsman
2900956327 Split back some frequently used arithmetic and logic opcodes (which were done as Load+Op before). 2012-01-09 13:09:59 +00:00
Stanislav Shwartsman
35bfe11c3d SVM: forgot to save RFLAGS in guest state 2012-01-08 19:46:38 +00:00
Stanislav Shwartsman
a531f8081c fixed compilation with cpu-level=5 2012-01-08 16:58:14 +00:00
Stanislav Shwartsman
76ee7b499b svm updates 2012-01-08 14:09:51 +00:00
Stanislav Shwartsman
9261b2fa14 removed param_names.h include where not needed anymore 2012-01-07 17:54:19 +00:00
Stanislav Shwartsman
7defa74261 cleaned up code duplication in CPUDB classes 2012-01-07 17:06:03 +00:00
Stanislav Shwartsman
a804adac46 fixed compilation err with SMP enabled 2012-01-07 16:45:25 +00:00
Stanislav Shwartsman
edfff5bf44 fixed VMX+EPT VirtualBox failures 2012-01-06 10:30:07 +00:00
Stanislav Shwartsman
e2ff4bc6d4 clear exitinfo1/2 fields in SVM on VMENTER 2012-01-05 22:23:05 +00:00
Stanislav Shwartsman
665d4568ee convert most popular svn/vmx msgs to bx_debug - can be used together with enabling log options per device from .bochsrc 2012-01-05 19:42:58 +00:00
Stanislav Shwartsman
fddccfb498 code cleanup + copy/paste removal 2012-01-04 21:36:39 +00:00
Stanislav Shwartsman
0e17f8f195 implemented AMD APIC extensions for SVM support 2012-01-04 16:06:37 +00:00
Stanislav Shwartsman
8c8fa8ec25 vmx cleanups 2012-01-03 20:27:40 +00:00
Stanislav Shwartsman
c857488ed9 Added Corei5 750 (Lynnfield) configuration to the CPUDB 2012-01-02 20:59:02 +00:00
Stanislav Shwartsman
3b98634045 show EFER in debug print outside long mode too 2012-01-02 20:06:03 +00:00
Stanislav Shwartsman
5847e772a6 set async_event when injecting virq to SVM guest 2012-01-01 21:22:56 +00:00
Stanislav Shwartsman
269d5e3443 more SVM fixes 2012-01-01 20:26:23 +00:00
Stanislav Shwartsman
810aa1b67c fixes for SVN. also turion64_tyler supports RDTSCP - include it in CPUID 2012-01-01 17:54:41 +00:00
Stanislav Shwartsman
30d90c1dc1 more SVM fixes 2011-12-31 20:10:11 +00:00
Stanislav Shwartsman
b97a108d93 SVM: allow entering vm8086 and also paged real mode 2011-12-31 16:33:36 +00:00
Stanislav Shwartsman
a0b5ff48ec more SVM fixes 2011-12-31 14:22:51 +00:00
Stanislav Shwartsman
3c0d712146 SVM fixes 2011-12-31 13:58:55 +00:00
Stanislav Shwartsman
fe6741d84d fixed SVM bug 2011-12-31 13:26:55 +00:00
Stanislav Shwartsman
fe6328d18c correctly enable SVM support in internal CPU features list 2011-12-31 12:58:20 +00:00
Stanislav Shwartsman
46d8a5894e removed bad RDMSR/WRMSR check which disabled access to AMD extended MSRs 2011-12-31 12:37:35 +00:00
Stanislav Shwartsman
560e3ca254 compilation fix for smp=0 2011-12-30 18:55:19 +00:00
Stanislav Shwartsman
cee8a3b9ef AMD's core has special 0x80000008.ecx value 2011-12-30 18:53:41 +00:00
Stanislav Shwartsman
088ab4832f turion64 tyler supports cmpxchg16b 2011-12-30 18:46:46 +00:00
Stanislav Shwartsman
2a0d989755 fixed compilation err with SVm w/o VMX 2011-12-30 12:24:22 +00:00
Stanislav Shwartsman
93523a657d remove patch that always kept IF set after HLT - not needed anymore 2011-12-30 08:50:01 +00:00
Stanislav Shwartsman
abda3a967c added two AMD CPUs to CPUDB 2011-12-29 14:23:22 +00:00
Stanislav Shwartsman
5da69a6fb4 fixed typo - invalid CPUID leaf should go to max std leaf 2011-12-28 21:59:39 +00:00
Stanislav Shwartsman
2b854cb101 added basic (very basic) SVM CPUID into generic_cpuid module 2011-12-28 21:54:51 +00:00
Stanislav Shwartsman
0a14f08f16 completing SVM coding, missed - CPUID, extended APIC 2011-12-28 16:12:28 +00:00
Stanislav Shwartsman
864ea23b5b take events handling logic from cpu.cc to new file event.cc 2011-12-28 12:26:45 +00:00
Stanislav Shwartsman
2b8371f2b6 implemented SVM_GIF handling 2011-12-27 20:46:15 +00:00
Stanislav Shwartsman
7f5f917a34 more SVM implementation 2011-12-27 19:42:11 +00:00
Stanislav Shwartsman
c32eaa5d05 added more svm intercepts 2011-12-26 20:51:57 +00:00
Stanislav Shwartsman
6ae86a059b firt cleanup in SVM code. added intercept check for MSR and IO 2011-12-26 19:57:39 +00:00
Stanislav Shwartsman
8b4a2c2034 implemented some more intercepts. 
fixed compilation without SVM
 2011-12-26 16:33:13 +00:00
Stanislav Shwartsman
bfcbb81602 SVM: 
- IO intercept is not implemented yet
 - MSR intercept is not implemented yet

VMX:
 Fixed Bochs PANIC crash when doing I/O access crossing VMX I/O permission bitmaps.
 This can happen because access_physical_read and access_physical_write cannot access memory cross 4K boundary.
 2011-12-25 22:09:31 +00:00
Stanislav Shwartsman
ea6dfe3dc0 added svm files 2011-12-25 20:01:48 +00:00
Stanislav Shwartsman
01080243d4 complation fix 2011-12-25 19:58:21 +00:00
Stanislav Shwartsman
a44c1b8e1e SVM and VMX share tsc offset code 2011-12-25 19:53:23 +00:00
Stanislav Shwartsman
75bda1d5cd implemented SVM emulation support for Bochs (incomplete yet) 
I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation.
Of course SVM emulation is incomplete, completely untested and not expected to work.
But someone could already take a look one the code and give some suggestions.

Also looking for anybody with existing SVM kernels - as simple as possible - for testing.

Status:
 - exceptions intercept is not implemented yet
 - IO intercept is not implemented yet
 - MSR intercept is not implemented yet
 - virtual interrupts are not implemented yet
 - CPUID is not implemented yet

No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
 2011-12-25 19:35:29 +00:00
Stanislav Shwartsman
2dee4b12be added VMX .bochsrc option to ctoggle VMX ON/OFF on runtime 2011-12-21 09:11:51 +00:00
Stanislav Shwartsman
e7ed8aca5c move inhibit interrrupts functionality to icount interface 2011-12-21 06:17:45 +00:00
Stanislav Shwartsman
7cdeecf198 VMX: fixed VirtualBox VMX guest Guru Meditation - FS.BASE get corrupted after saving/restoring unusable selector 2011-12-19 16:06:53 +00:00
Stanislav Shwartsman
6cc03432d9 improve VMX debug print 2011-12-18 21:04:30 +00:00
Stanislav Shwartsman
f6203dae7d instrumentation: added special indication for indirect call/jump 2011-12-18 18:11:56 +00:00
Stanislav Shwartsman
9763643106 VMX: Fixed VMFUNC instruction behavior to align with Intel SDM revision 041 2011-12-17 14:06:23 +00:00
Stanislav Shwartsman
cbbd8bfd46 fixed some warnings after compilation with msvcpp 2010 2011-12-10 18:58:25 +00:00
Stanislav Shwartsman
ac0ebc9728 added debug prints about vmcs initialization 2011-12-09 19:57:40 +00:00
Stanislav Shwartsman
f496e78326 fixed compilation warning 2011-12-02 19:40:31 +00:00
Stanislav Shwartsman
1e3e6ff2af BMI: fixed EFLAGS after BMI instructions (set EFLAGS while preserving PF was not implemented properly in 2.5 release) 2011-11-29 19:50:26 +00:00
Stanislav Shwartsman
b8f2d91b9a fixed compilation err 2011-11-28 21:16:40 +00:00
Stanislav Shwartsman
99bec5155e fixed compilation err in instrumentation module 2011-11-28 10:08:03 +00:00
Stanislav Shwartsman
8cb359fab5 fixed flags handling for BMI instructions 2011-11-27 13:23:26 +00:00
Stanislav Shwartsman
100622e958 fix ULL suffix for 64bit int, use BX_CONST64 instead 2011-11-26 19:01:53 +00:00
Stanislav Shwartsman
f09bdf353a RDMSR can also read TSC so make it end-of-trace as well (same as RDTSC) 2011-11-24 16:03:51 +00:00
Stanislav Shwartsman
f660d3dc68 implemented missed XOP instructions FRCZPS/PD/SS/SD + update CHANGES with fixed bugs 2011-11-24 11:34:26 +00:00
Stanislav Shwartsman
c74f590077 implemented TSC-Deadline APIC timer mode 2011-11-21 12:51:50 +00:00
Stanislav Shwartsman
e4bd200119 do not report TSC Deadline for Sandy Bridge CPUID - not implemented yet 2011-11-20 18:25:39 +00:00
Stanislav Shwartsman
9be8552b80 - Implemented VM Functions support and EPTP-Switching VM Functions 
- Added VMEXIT conditions for INVPCID instruction

Now Bochs is fully aligned with latest pulished Intel's SDM rev040.
 2011-11-05 07:31:51 +00:00
Stanislav Shwartsman
42a0a178eb disasm for XOP instructions 2011-10-30 08:58:49 +00:00
Stanislav Shwartsman
ad9bdbe550 fixed compilation failure 2011-10-21 08:06:55 +00:00
Stanislav Shwartsman
b1a6b34616 implemented PERMIL2PS/PERMIL2PD XOP instructions 2011-10-20 17:37:57 +00:00
Stanislav Shwartsman
ddecc0234a fixed (c) info 2011-10-20 14:06:12 +00:00
Stanislav Shwartsman
3035fcd0af implemented XOP FMADCSWD/FMADCSSWD instructions 2011-10-20 13:55:26 +00:00
Stanislav Shwartsman
5d9bbae71c bugfix: cant use ib2 it is overlap with disp32 2011-10-19 21:28:36 +00:00
Stanislav Shwartsman
5cc04b9955 Implemented AMDs Buldozer XOP and TBM extensions. 
XOP: few instructions are still missing, coming soon

  BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
  BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
  BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
  BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
  BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
 2011-10-19 20:54:04 +00:00
Stanislav Shwartsman
314171bb56 fixed compilation w/o AVX 2011-10-09 13:56:39 +00:00
Stanislav Shwartsman
71cbff104b fixing xsave/xrstor flows with AVX 2011-10-09 09:19:49 +00:00
Stanislav Shwartsman
8ada4ce5e4 added to cpudb: Intel(R) Core(TM) i5 M 520 (Arrandale) - based on Westmere arch 2011-10-07 19:32:44 +00:00
Stanislav Shwartsman
2580d8c46d added FMA4 AMD instructions support, fixed mem access length for Intel scalar FMA instructions 2011-10-07 14:09:35 +00:00
Stanislav Shwartsman
aad57310c2 disasm for FMA4, better dbg print SSE rounding control with MXCSR 2011-10-06 20:33:10 +00:00
Stanislav Shwartsman
8a9b8f4622 MXCSR.FUZ is ignoired for F16 instructions 2011-10-03 15:08:22 +00:00
Stanislav Shwartsman
e282b5e88d Move DAZ handling into softfloat library (for float16, float32 and float64 only) and cleanup SSE and AVX code 
Fix decoding of opcodes with VEX.W=1 in 32-bit mode (AVX2, FMA)
 2011-10-01 15:40:36 +00:00
Stanislav Shwartsman
f425400af5 fixed warnings from compilation with mingw-gcc 4.6.1 2011-09-30 20:38:18 +00:00
Stanislav Shwartsman
e5d0540365 commit new added files 2011-09-29 22:38:38 +00:00
Stanislav Shwartsman
6751af5d8e added AVX FMA extensions support. The implementation is based on QEMU patch by Peter Maydell (fixed) 2011-09-29 22:20:56 +00:00
Stanislav Shwartsman
275194fb32 #GP on reading VMX_EPT_VPID_CAP MSR when EPT and VPID disabled 2011-09-26 20:36:26 +00:00
Stanislav Shwartsman
f0d9f8fab7 added some comments 2011-09-26 20:10:15 +00:00
Stanislav Shwartsman
0547c8823e compilation w/o x86-64 2011-09-26 19:48:58 +00:00
Stanislav Shwartsman
12ad45395b enable Penryn VMX capabilities with VMX=1, VMX=2 is required for EPT and heavier stuff 2011-09-26 19:36:20 +00:00
Stanislav Shwartsman
54d1d8aa55 added new assertion to generic cpuid 2011-09-26 18:47:47 +00:00
Stanislav Shwartsman
aa96ecd98a compilation fix 2011-09-26 18:18:10 +00:00
Stanislav Shwartsman
0aadf88c07 more polishing for vmx configurability 2011-09-26 18:08:31 +00:00
Stanislav Shwartsman
c28c7f6a06 Supply real VMX capabilities together with the CPU MODEL .bochsrc option. 
So now the same single option will choose not only the CPUID flags but also VMX capabilities matching real HW machine.

Removed cpuid of core2_extreme_x9770 from the cpudb. I don't remember its VMX capabilities anyway.
There is another Penryn model in the cpudb - core2_penryn_t9600.
 2011-09-26 12:31:40 +00:00
Stanislav Shwartsman
8d95830562 first step to configuration of VMX through cpuid_t class 2011-09-25 19:04:55 +00:00
Stanislav Shwartsman
b66feecc86 move common instrumentation constants (valid for all stubs) to cpu.h 2011-09-25 17:38:54 +00:00
Stanislav Shwartsman
62d0c8abf7 - Now you could disable x86-64 from .bochsrc so now it is possible to emulate 
32-bit CPU using Bochs binary compiled with x86-64 support.

The commit also fixes some init.cc issues with initialization of SYSCALL/SYSRET MSR in AMD hosts and also includes code reorg.
 2011-09-25 17:36:20 +00:00
Stanislav Shwartsman
2b7894de7b fixed dbg print mentioned in SF bug 3029271 2011-09-22 22:08:18 +00:00
Stanislav Shwartsman
1b9f286945 - New way of CPUs scheduling in SMP mode brings up to 50% speedup to the 
SMP emulation. New implementation uses dynamic CPU quantum value and takes
   full advantage of the trace cache. Each emulated processor will execute
   the whole trace before switching to the next processor.
 * It is also safe to use large (up to 16 instructions) quantum values for
   the SMP emulation now and improve performance even further.

The same merge also completely fixes SF bug :
  [3312237] stepN command might be not working properly

Handlers chaining speedups are also supported with SMP emulation now.
 2011-09-22 19:38:52 +00:00
Stanislav Shwartsman
f81589c5d6 Don't allow traces longer than cpu_loop can execute 2011-09-21 20:28:29 +00:00
Stanislav Shwartsman
c6d07ae1b5 store modrm() for x87 in Ib() byte because x87 have no Ib() 2011-09-20 06:02:27 +00:00
Stanislav Shwartsman
2583f8549a small code duplication fix 2011-09-19 20:47:59 +00:00
Stanislav Shwartsman
d489ba3d37 generic cpuid: automatically enable lzcnt of bmi is enabled; sse4a support in cpuid 2011-09-18 18:17:34 +00:00
Stanislav Shwartsman
6fb673b9fa change BX_PANIC to BX_ERROR 2011-09-18 17:36:54 +00:00
Stanislav Shwartsman
50207eeb90 - Added support for AMD SSE4A emulation, the instructions can be enabled 
using .bochsrc CPUID option.
 2011-09-18 16:18:22 +00:00
Stanislav Shwartsman
efc588cf1e rename avx2_gather.cc -> gather.cc 2011-09-16 20:59:57 +00:00
Stanislav Shwartsman
ea54f40361 keep global pages when needed in INVPCID/INVVPID 2011-09-16 20:52:38 +00:00
Stanislav Shwartsman
3632340dac improve bochs exit dump in long64 mode 2011-09-16 20:25:05 +00:00
Stanislav Shwartsman
88a58b3781 fixed compilation with x86-64=0 2011-09-16 20:12:36 +00:00
Stanislav Shwartsman
330bf62f61 added INVPCID instruction support 2011-09-16 20:06:23 +00:00
Stanislav Shwartsman
e2f0880f1c support more than 32-bit cpu features vector 2011-09-14 20:22:24 +00:00
Stanislav Shwartsman
d5fcfabb38 bugfix + update changes 2011-09-13 19:38:09 +00:00
Stanislav Shwartsman
f4dbaf1cd8 re-shuffle macros, no impact in general 2011-09-13 17:55:36 +00:00
Stanislav Shwartsman
02e1a0f23c Merge lazy flags optimization by Darek Mihocka. 
I measure slight but consistent speedup of ~1-3% for all guests.
Tested: Windows XP/7 boot 32/64 bit, various Linux live CD
 2011-09-12 19:36:53 +00:00
Stanislav Shwartsman
9f1f4781b3 fixed Sandy Bridge name in err message - it is Core i7 and not Core2 2011-09-06 19:49:22 +00:00
Stanislav Shwartsman
939aee87c9 handle special case - BSF/BSR vs TZCNT/LZCNT 2011-09-06 19:18:21 +00:00
Stanislav Shwartsman
184837e0ed fixed compilation err with no handlers chaining enabled 2011-09-06 15:41:52 +00:00
Stanislav Shwartsman
96cedbc756 continue handlers-chaining optimization: update time once per trace and not for every instruction 2011-09-06 15:35:39 +00:00
Stanislav Shwartsman
e000b61cfd make RDTSC 'end of trace' instruction - guarantee that any pair ot RDTSC/RDTSCP on same CPU do not belong to same trace (and therefore will always update time and etc) - required for Win7 Thin 2011-09-06 14:13:39 +00:00
Stanislav Shwartsman
5a350143a5 bug fixes 2011-09-06 13:09:45 +00:00
Stanislav Shwartsman
c67338203c small fixups, code cleanup and reorganization 2011-09-05 17:14:49 +00:00
Stanislav Shwartsman
41f9b25777 fixed avx2 gather instructions 2011-09-04 19:50:18 +00:00
Stanislav Shwartsman
c0f5919787 small optimization 2011-09-03 15:36:40 +00:00
Stanislav Shwartsman
8099fd9efd implemented alternative access to CR8: AMD feature. Lock CR0 -> CR8 2011-09-03 15:22:56 +00:00
Stanislav Shwartsman
cf56ffb6e0 BSF/BSR should stay, only F3 prefix change opcode 2011-08-31 21:13:50 +00:00
Stanislav Shwartsman
9d18af1207 fixed compilation for AVX OFF 2011-08-31 20:52:53 +00:00
Stanislav Shwartsman
1f5e036695 lzcnt/tzcnt bmi instructions implemented 2011-08-31 20:43:47 +00:00
Stanislav Shwartsman
d2f7351be2 cpu.h cleanup + update msdev workspaces cpudb projects 2011-08-30 22:22:07 +00:00