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828 Commits

Author SHA1 Message Date
Stanislav Shwartsman
52041f60d4 Support for X86_64 in debug CPU method 
Fixed debug messages printed from read_virtual_checks
 2005-03-30 19:56:02 +00:00
Stanislav Shwartsman
e5c3e3c262 CPU mode enumeration changed 2005-03-29 22:18:13 +00:00
Stanislav Shwartsman
619942cf9a Enable SYSENTER/SYSEXIT together with x86-64 support, these instructions used by gentoo amd64 LiveCD image (at least it WRMSR to SYSENTER MSRs). 
SYSENTER/SYSEXIT is not recognized in long mode but it could be used i any other mode without problem
 2005-03-29 21:59:44 +00:00
Stanislav Shwartsman
da9091f04a Fixed compatability mode execution bug, compatability mode and long mode should be treated as protected for all protected_mode() checks 2005-03-29 21:37:06 +00:00
Stanislav Shwartsman
0ed560ed3d Enable info fpu command in debugger 2005-03-28 18:19:02 +00:00
Stanislav Shwartsman
22098eefa2 Removed unused instruction (function) methods which were generated as a result of the initial implementation of AMD64 support. 2005-03-28 06:29:22 +00:00
Kevin Lawton
831afe7c40 Removed unused instruction (function) prototypes which were generated as 
a result of the initial implementation of AMD64 support.  These appear
  to have been cut-n-paste vestiges.
 2005-03-25 21:33:47 +00:00
Kevin Lawton
e6cb602231 Moved macros for duplicate SSE/SSE2 functions from fetchdecode.h to 
cpu.h, and defined function prototypes for the case where bochs
  is compiled with a new #define (called StandAloneDecoder) is set.
  This allows for the decoder to be tested separately from bochs.
 2005-03-23 01:45:16 +00:00
Kevin Lawton
4e03c4448c Added some comment tags so that a script can pull out relevant parts 
of the decoder to test it in standalone mode.  A few lines in cpu.h
  were re-arranged to make this easy, but no real lines of code were
  changed or generated.
Changed a few PANICs to INFOs after testing corresponding cases.
 2005-03-22 18:19:55 +00:00
Stanislav Shwartsman
c3fd89eceb More accurate fix for cpu_online_map ellimination 2005-03-20 18:33:02 +00:00
Stanislav Shwartsman
1e37312c14 Remove code duplication 2005-03-20 18:08:46 +00:00
Stanislav Shwartsman
3570f5f629 Reverting back RETF instruction changes made by Kevin Lawton 2005-03-20 18:01:01 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files. 
One more small change in APIC
 2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
f77ddd9701 Remove cpu_onlline_map varaible, it wasn't initialized properly and might cause APIC problems 2005-03-19 18:43:00 +00:00
Stanislav Shwartsman
e6e9dd3825 Extend Bochs instrumentation 
Compatability fixes
 2005-03-17 20:50:57 +00:00
Stanislav Shwartsman
6e53a54907 Extend cpu_mode for : 
#define BX_MODE_IA32_REAL       0x0   // CR0.PE=0
#define BX_MODE_IA32_PROTECTED  0x1   // CR0.PE=1, EFLAGS.VM=0
#define BX_MODE_IA32_V8086      0x2   // CR0.PE=1, EFLAGS.VM=1
#define BX_MODE_LONG_COMPAT     0x3   // EFER.LMA = 0, EFER.LME = 1
#define BX_MODE_LONG_64         0x4   // EFER.LMA = 1, EFER.LME = 1
 2005-03-15 19:00:04 +00:00
Stanislav Shwartsman
189e55885d put VME initial code in BX_SUPPORT_VME ifdefs 2005-03-13 20:18:37 +00:00
Stanislav Shwartsman
e3bd4e2b34 Update recent closed byg reports 
Remove redundant debug prints in VERR instruction emulation
 2005-03-13 18:20:26 +00:00
Stanislav Shwartsman
fd13784231 Small cleanup in access.cc 
VME feature code should be valid only for CPU LEVEL >= 4
 2005-03-12 19:34:18 +00:00
Stanislav Shwartsman
6a36385743 Add more comments for loading segment register in real mode 2005-03-12 18:38:56 +00:00
Stanislav Shwartsman
5a393d2399 Fix for PANIC 
1162042 Duke Nukem 3D: >>PANIC<< iret: VM set on stack, CPL!=0
according to Intel and AMD docs the behaviour wasn't correct
 2005-03-12 18:09:32 +00:00
Stanislav Shwartsman
2a5a5c2de5 Fixed compilation error for 486 CPU 
small fixes for IRET instructionm
 2005-03-12 16:40:14 +00:00
Stanislav Shwartsman
714b9c9d22 Added ICACHE statistics 2005-03-10 21:22:15 +00:00
Stanislav Shwartsman
24fa5935c1 Getting little bit closer to VME feature 2005-03-09 22:01:13 +00:00
Stanislav Shwartsman
031cd64827 More code review - changing BX_PANIC to BX_ERROR where implentation matches Intel docs. Also solved two cases when TS exception generated instead of GPF 2005-03-04 21:03:22 +00:00
Stanislav Shwartsman
c30e89289b Fixed R/O pages access in CPL=3 (TLB accessBits bug) 2005-03-03 20:24:52 +00:00
Stanislav Shwartsman
709b218c10 Reduce metaInfo initialization in fetchDecode 2005-03-01 21:44:01 +00:00
Stanislav Shwartsman
23e2895f8e Fixed interrupt function for 
286 int/trap gate, in vm8086 mode
 2005-03-01 20:55:25 +00:00
Stanislav Shwartsman
dafc5fd193 Fix extdb.cc compilation error 2005-03-01 17:49:34 +00:00
Stanislav Shwartsman
b25088bf2f Merge patch [1153327] ignore segment bases in x86-64 by Avi Kivity 2005-02-28 18:56:05 +00:00
Stanislav Shwartsman
aeec5a6c5a just dos2unix 2005-02-27 18:14:29 +00:00
Stanislav Shwartsman
c583a6f9cf move segments and descriptors definitions and macroses for new descriptor.h 2005-02-27 17:41:45 +00:00
Stanislav Shwartsman
6e773a652a Fix SYSENTER/SYSEXIT instructions 2005-02-26 12:00:22 +00:00
Stanislav Shwartsman
f483bcfd70 Fixed possible memory corruption in case of wrong size APIC read (used by WinNT MP) 
Compiler compitability fixes (use 0 and 1 instead of true and false)
 2005-02-25 20:53:14 +00:00
Stanislav Shwartsman
0e472af877 Merge patch: 
[1151012] allow null ss on x86-64 by Avi Kivity
 2005-02-24 19:50:36 +00:00
Stanislav Shwartsman
ef197b2a56 Fixed compilation error in paging.cc 
Some fixed for APIC in P4 processor
APIC patch by mrieker cleaned even more
 2005-02-23 21:18:24 +00:00
Stanislav Shwartsman
830ca51b91 Merge patches: 
1149720 critical - fix x86-64 SYSCALL RFLAGS masking
 1149758 wrmsr efer fix
 2005-02-23 18:00:07 +00:00
Stanislav Shwartsman
41578589c1 Merge two patches by Avi Kivity (avik) 2005-02-22 18:24:19 +00:00
Stanislav Shwartsman
76e0f2cc95 Fixed AMD cpuid 2005-02-20 20:02:54 +00:00
Stanislav Shwartsman
3351723e70 Fixed P4 extended CPUID 2005-02-17 06:07:58 +00:00
Stanislav Shwartsman
2bfc842c09 CPU fixes by Kevin Lawton 2005-02-16 21:27:21 +00:00
Stanislav Shwartsman
169769504e Changes BX_PANIC to BX_INFO in some more cases (patch by Kavin Lawton) 2005-02-16 19:59:03 +00:00
Stanislav Shwartsman
91526a90b3 Merged patch 
[1123895] x86-64 gdb/debugger fixes by Avi Kivity
 2005-02-16 18:58:48 +00:00
Stanislav Shwartsman
a01347f17d Extended information for AMD and Intel processors (CPUID) 2005-02-14 21:17:20 +00:00
Stanislav Shwartsman
b69345225b Correct model_id for Pentium MMX in CPUID 2005-02-13 21:20:48 +00:00
Stanislav Shwartsman
e7e149d21a Changed PANIC message to ERROR message. This should fix an error message reported in Bug Tracker - PANIC after Reset button is pushed. 2005-02-13 18:36:52 +00:00
Stanislav Shwartsman
9492942ae6 In 64-bit mode, the CS, DS, ES, and SS segment overrides are ignored. 2005-02-12 19:25:33 +00:00
Stanislav Shwartsman
799403620e Small speedup in boundaryFetch method 2005-02-12 14:00:13 +00:00
Stanislav Shwartsman
c1284af614 Removed already obsolete patch.smp-pge-pic-poll 
Small cleanup in apic.cc/apic.h
I would like to test patch.apic-mrieker so I need more clean apic code
 2005-02-08 18:41:33 +00:00
Stanislav Shwartsman
e6efa3a451 - exceeding the instruction length limit of 15 bytes (this only can 
occur when redundant prefixes are placed before an instruction)
    generate #GP(0) (Stanislav)
 2005-02-05 20:56:44 +00:00
Stanislav Shwartsman
153bec9d1a Fixed compilation errors when CPU-LEVEL=3 2005-02-03 22:24:45 +00:00
Stanislav Shwartsman
9305305493 First (and may be last) step to implementation of 
Virtual Mode Extensions (VME)
and
Protected Mode Virtual Interrupts (PVI)
instructions STI and CLI have full support of these features, according to Intel docs. Need to check POPF and PUSHF instructions and afterwise VME and PVI extensions could be enabled in CR4
 2005-02-03 22:08:34 +00:00
Stanislav Shwartsman
5701f62a42 Fix compiler warnings with -wall 2005-02-03 18:43:23 +00:00
Stanislav Shwartsman
d27e81bdac -in case of --enable-ignore-bad-msr enabled read ignored MSRs as zeRo 
- enabled #DE and #TSD and #MCE bits in CR4 register, previosly setting
    of one of these bits generated #GP(0) (Stanislav, Volker Ruppert)
 2005-02-03 18:25:10 +00:00
Stanislav Shwartsman
3fdbf48a69 Fixed bug in interrupt function in real mode 
Style change
Update CHANGES
Remove patch.v8086-exception.lightcone because it already in CVS
 2005-02-01 21:17:57 +00:00
Stanislav Shwartsman
68714924b0 Return local APIC id in CPUID 00000001h function in EBX register 2005-01-29 15:24:57 +00:00
Stanislav Shwartsman
bbcc5e0e3a Split BOUND instruction to two different according to operand size 
Coding style change
 2005-01-28 20:50:48 +00:00
Stanislav Shwartsman
42a5a899c2 Improvement in the speed of general memory access. 
The idea was taken from patch written by
LightCone
 2005-01-25 20:41:43 +00:00
Stanislav Shwartsman
7eb2f0aa3e Enable TSD in CR4 (RDTSC instruction is already implemented so it has no problem to enable TSD for CPU LEVEL >=5) 2005-01-23 21:13:49 +00:00
Stanislav Shwartsman
57fcc89274 Non-Execution support impelemented and enabled in CPUID when in x86-64 configuration 2005-01-20 19:37:43 +00:00
Stanislav Shwartsman
2212b963ed Added additional comment to code in paging.cc 2005-01-19 20:48:51 +00:00
Stanislav Shwartsman
8d5d5b1561 Reset local apic on CPU RESET 2005-01-13 19:18:27 +00:00
Stanislav Shwartsman
3cd646004f Fixed bug "1101168 APIC base address change" 2005-01-13 19:03:40 +00:00
Volker Ruppert
48ebc288c6 - MCE is supported on Pentium or higher (exception 18 never appears in Bochs) 2005-01-09 08:14:15 +00:00
Stanislav Shwartsman
d142f23242 Fixed undocumented flags handling for SHLD instruction 
Added lazy flags for SHLD instruction
Bugfix and speedup in SHLD and SHRD instructions
 2004-12-24 22:44:13 +00:00
Stanislav Shwartsman
8fe15b0ddc Fixed compilation error 2004-12-17 10:50:49 +00:00
Stanislav Shwartsman
f5b64a3a59 more preparations to NXE feature 2004-12-16 22:21:35 +00:00
Stanislav Shwartsman
5955549a8d Fixed bug report [#879050] 
Bochs reports enabled APIC without support
 2004-12-14 20:41:55 +00:00
Stanislav Shwartsman
da24883199 Extend page directory entries to 8 byte in PAE mode when X86_64 is enabled 
(prepartions to NX feature implementation)
 2004-12-13 22:26:36 +00:00
Volker Ruppert
02ae558db8 - removed old unused code designed for a save/restore feature 
- fixed pcidev targets in iodev/Makefile.in
- updated all Makefile dependencies using a default setup (.conf.linux).
  TODO: dependencies should be generated at compile time since they depend on
  the config settings
 2004-12-13 19:10:38 +00:00
Stanislav Shwartsman
f375203fdb preparations for x86-64 support in disasm 2004-12-12 22:12:43 +00:00
Stanislav Shwartsman
46bb3d8853 remove duplicated data arrays from CPU 2004-12-11 20:51:13 +00:00
Stanislav Shwartsman
ce80380b29 fixed ENTER instruction, this implemntation looks correct but it still need to be confirmed by testing ... 2004-11-27 20:36:53 +00:00
Stanislav Shwartsman
5213e903bd mov duplicate opcode groups from fectchdecode*.cc to .h 
use common register accessor macroses instead of direct register file structure access
 2004-11-26 20:21:28 +00:00
Stanislav Shwartsman
0d09a8c8a8 fix code duplication 2004-11-26 19:53:04 +00:00
Stanislav Shwartsman
69c0b06955 fixes in disassembler 
split REPEAT instructions according to opsize to speedup execution
now each REPEATABLE instruction splitted to 3 different instructions, one for 16-bit operand size, one for 32-bit and one for 64-bit. Choosing of correct instruction occure in fetchdecode step.
 2004-11-20 23:26:32 +00:00
Stanislav Shwartsman
bf0fc24cd5 Fixed icache uncompetability with physical addresses > mem.len 2004-11-19 09:39:30 +00:00
Stanislav Shwartsman
645e04860e For now : disable fetching from physical address 0xFFFFFFF0 after #RESET 
because ICACHE do not support physical address > mem.len.
This is the first part of the fix, the rest coming soon
 2004-11-18 23:16:36 +00:00
Stanislav Shwartsman
02fc33a86b Fix CS.base register after #RESET 
update changes
 2004-11-16 19:19:13 +00:00
Stanislav Shwartsman
c482fbed43 Add additional debug info 2004-11-15 19:38:42 +00:00
Stanislav Shwartsman
a75280d757 Fix CS.BASE wrong value on reset 2004-11-14 21:47:58 +00:00
Stanislav Shwartsman
730b8c0243 Fix this pointers in the code 2004-11-14 21:25:42 +00:00
Stanislav Shwartsman
71c1275b21 dos2unix 2004-11-14 19:39:01 +00:00
Stanislav Shwartsman
7b62a6e206 Fix reset registers in CPU for #RESET signal 
Extract ICACHE from cpu.h to separate icache.h
 2004-11-14 19:29:34 +00:00
Stanislav Shwartsman
08810d54c4 Fix fetchdecode for FPU instructions when FPU is not present 2004-11-12 16:47:35 +00:00
Volker Ruppert
3cad938b05 - gdbstub support turned into a runtime option (SF patch #1021740 by Charles Duffy) 
- gdb_* options moved to the new gdbstub option
 2004-11-06 10:50:03 +00:00
Stanislav Shwartsman
41daacdf80 fixed BX_CPU_THIS pointers 2004-11-05 10:13:15 +00:00
Stanislav Shwartsman
1a6656ce91 Fixed compilation warnings (g++, -Wall) 
Improve speed and precision of FPATAN FPU instruction
 2004-11-04 22:41:24 +00:00
Stanislav Shwartsman
2ce5495d38 Fixed compilation errors 2004-11-03 06:35:48 +00:00
Stanislav Shwartsman
8191201e17 If exception occured register should not be modified. 
Fix for x86-64
 2004-11-02 20:39:45 +00:00
Stanislav Shwartsman
4e3bc367b6 Fixed all JUMP near, CALL near and RET near cases 
for problem EIP>CS.limit was not checked in real mode
 2004-11-02 18:05:19 +00:00
Stanislav Shwartsman
2ed7e4eed5 EIP > CS.limit should be checked in real mode too. 
Enable for now for JUMP instructions, still todo - CALL and RET
 2004-11-02 17:31:14 +00:00
Stanislav Shwartsman
f06c8b6b95 EIP > CS.limit should not be a problem 
Manual says that GP(0) shouldd be generated in this case ALWAYS
Fixed instructions PANIC messages to ERROR for this case
And ... do not leave PANIC messages w/o taking care that user could push CONTINUE button and program should know to continue after the PANIC code line. Mainly in rerurn instructions were several problems ...
 2004-11-02 16:10:02 +00:00
Stanislav Shwartsman
79bd13c46c iret32_real implemented right for 386+, not only for Pentium CPU. 
Removed ifdef's
 2004-10-30 16:04:58 +00:00
Stanislav Shwartsman
a9022ac5cb Fixed compilation prroblem reported in bug 
[ bochs-Bugs-913418 ] compiler errors with --enable-external-debugger option
Remove code duplication
 2004-10-29 21:15:48 +00:00
Stanislav Shwartsman
5e23909c7c prepations for NX bit implementation 2004-10-21 18:20:40 +00:00
Stanislav Shwartsman
95c894d403 Removed unused code 2004-10-19 20:05:07 +00:00
Stanislav Shwartsman
75e0c5b421 Little speed optimizations in cpu_loop function 
change apic classes to more c++ friendly
 2004-10-16 19:34:17 +00:00
Stanislav Shwartsman
4a9bd714d8 Fix init values for system registers 2004-10-16 10:18:01 +00:00
Stanislav Shwartsman
80ee150d83 Imlemented CR8 register for X86-64 mode 2004-10-13 20:58:16 +00:00
Stanislav Shwartsman
4f1f070c37 Fix comments for code 2004-10-08 19:29:04 +00:00
Stanislav Shwartsman
3adc5c8659 Fix lock prefix for XOR instruction in 64-bit mode 2004-10-08 19:07:18 +00:00
Stanislav Shwartsman
d1af05cbe2 Fix typo in stack64 2004-10-06 20:10:01 +00:00
Stanislav Shwartsman
6a9e8e6011 Drop unnecessary warning 2004-10-05 20:25:06 +00:00
Stanislav Shwartsman
4988a098f5 Small optimizations 2004-10-03 21:52:10 +00:00
Stanislav Shwartsman
a28a2c6ce1 Added comments 2004-10-03 20:25:19 +00:00
Stanislav Shwartsman
a21018e1db Fixed bug 
[ 766020 ] info registers / dump_cpu get old eflags
 2004-09-30 16:50:03 +00:00
Stanislav Shwartsman
c9bc4eaf02 1. add comments to CPUID instruction 
2. small cleanup
 2004-09-26 20:29:04 +00:00
Stanislav Shwartsman
3f096fdb9f Fix FISTTP instruction opcode table 2004-09-21 21:19:59 +00:00
Stanislav Shwartsman
040be015d8 1. Added required GP(0) exception when setting conficting flags in CR0 
2. APIC disabled compilation error fixed
 2004-09-21 20:19:19 +00:00
Stanislav Shwartsman
b6657b1322 NX feature still not implemented in Bochs. 
The change forces CPUID do not report bit 20 (NX bit support)
May be some OS that really checks it will boot better now
 2004-09-17 21:01:50 +00:00
Stanislav Shwartsman
760a195c9d * Fix LOCK prefix handling for x86-64 
* Split BT*_EvGv functions to 3 different function according to exec mode
 2004-09-17 20:47:19 +00:00
Stanislav Shwartsman
c780a15e6f dos2unix for apic.h 2004-09-15 22:02:19 +00:00
Stanislav Shwartsman
bbd55fe16f Merge and commit patch.apic-zwane from CVS patches directory. 
the patch release notes by Zwane:

o Define symbols for constants like
o APIC arbitration
o Processor priority
o Various interrupt delivery fixes
o Focus processor checking
o ExtINT delivery

I need to release this now so that i don't fall too far behind CVS, when
it was part of the bochs-smp patch it could boot 2.4.18 4way. Apologies
for the whitespace changes.


Also remove patch.apic-ppr-zwane patch because it already included in
patch.apic-zwane.

I hope it will help to boot x86-64 or cmp systems required missed APIC
features !
 2004-09-15 21:48:57 +00:00
Stanislav Shwartsman
283f9ae5d2 Simplify cpu.h 
Speedup FYL2X and FYL2XP1 instructions
 2004-09-14 20:19:54 +00:00
Stanislav Shwartsman
6cdb42d909 Little bit optimize memory access functions. Now values are calculated only if they actually needed. 2004-09-13 20:48:11 +00:00
Stanislav Shwartsman
fc631037ff remove obsolete comments from fetchdecode 2004-09-06 20:22:39 +00:00
Stanislav Shwartsman
ce459276c3 Fixed problem in previous commit ... 2004-09-04 20:19:39 +00:00
Stanislav Shwartsman
3916754e30 speedup and cleanup 2004-09-04 19:37:37 +00:00
Stanislav Shwartsman
6dc8a1cafd Very small code cleanup 2004-09-04 18:22:22 +00:00
Stanislav Shwartsman
193c7332aa 1. Small optimization for lazy_flags.cc 
2. Merge patch 1013516
Avoid invalidate_prefetch_q on enter, leave and cpuid
 2004-09-04 10:21:28 +00:00
Stanislav Shwartsman
75006eed8a Fix MUL/IMUL instructions flags handling 2004-08-31 19:43:58 +00:00
Stanislav Shwartsman
016207b222 Commented problematic check in misc_mem.cc 
Implemnted lazy-flags and undocumented flags handling for IMUL instructions
 2004-08-30 21:47:24 +00:00
Stanislav Shwartsman
77b3886f8b Cleanup and optimize 2004-08-28 08:41:46 +00:00
Stanislav Shwartsman
8953bfaffb Fixed flags handling for SHLD and rotate instrructions 2004-08-27 20:13:32 +00:00
Stanislav Shwartsman
27897c925e Fix undocumented flags handling for SHL instruction 
remove invalidate_prefetch_q from CPUID
 2004-08-27 18:43:23 +00:00
Stanislav Shwartsman
f2294e7c29 LAZY-FLAGS for MUL instructions 
undocumented flags handling for MUL instructions
 2004-08-26 20:37:50 +00:00
Stanislav Shwartsman
fcc54c7f82 Add missed flags modification 2004-08-18 21:38:50 +00:00
Stanislav Shwartsman
1f5aa2696f Fix compilation errors ;) 2004-08-18 21:29:07 +00:00
Stanislav Shwartsman
8c618be951 Fix comments 2004-08-18 20:49:31 +00:00
Stanislav Shwartsman
b370a417a4 Optimize lazy-flags for ADC and SBB instructions 2004-08-18 20:47:35 +00:00
Stanislav Shwartsman
729e0abd2a Fixed bug [ 912496 ] IDIV can cause simulator divide error 2004-08-18 19:27:52 +00:00
Stanislav Shwartsman
571617bcda Optimize lazy flags for NEG instruction 
Removed duplicate flags modification in CMPXCHG instruction
 2004-08-17 17:34:47 +00:00
Stanislav Shwartsman
231cd533c6 1. Update changes 
2. Fix lazy_flags duplicate instruction patterns
 2004-08-16 20:18:01 +00:00
Stanislav Shwartsman
c2b7f183af more correct implementation 2004-08-15 20:31:27 +00:00
Stanislav Shwartsman
eefdcece6f Speed-up BTC instruction 
Speed-up SAR instruction with implementing lazy-flags for it
 2004-08-15 20:12:05 +00:00
Stanislav Shwartsman
12b68ede54 XADD and ADD instructions have same flags modification rules - remove redundant switch case 2004-08-14 20:44:48 +00:00
Stanislav Shwartsman
88a19a8594 Speedup lazy-flags for NEG instruction 2004-08-14 20:09:22 +00:00
Stanislav Shwartsman
1b7b791493 Speedup lazy-flags for INC and DEC instructions 2004-08-14 20:00:24 +00:00
Stanislav Shwartsman
1732e54baa Fixed undocumented flags handling for some instructions. 
Bugfix for CF flag handling for SHL64 instruction
 2004-08-14 19:34:02 +00:00
Stanislav Shwartsman
a1f830d429 Implemented FAST lazy flags version for logic instructions. 
Small code cleanup/simplification for others.
 2004-08-13 20:00:03 +00:00
Stanislav Shwartsman
5de51f67d9 Prepare lazy flags macroses for more efficient lazy flags handling 2004-08-11 21:26:23 +00:00
Stanislav Shwartsman
8f0cf91fff This commit is the first commit in long series of changes the have several purposes: 
1. Review and commit patch

	[ 896733 ] Lazy flags, for more instructions, only 1 src op

   May be partially, but I hope to get all ideas from patch in

2. Get Bochs speedup after lazy flags optimization

3. Most important for me: improve correctness of emulation by handling several
   undocumented EFLAGS modifications. And finally pass

	UFLAGS - Undefined Flags Test v 3.0
	Copyright (C) Potemkin's Hackers Group (PHG) 1989,1995

   The test still fails on > 50% of its checks.
 2004-08-09 21:28:47 +00:00
Stanislav Shwartsman
789ed4da04 Removed debug print 2004-07-29 20:30:14 +00:00
Stanislav Shwartsman
f9bd2b74be 1. Fixed bug in FSUB instruction 
2. Fixed bug

[ 989478 ] I-Cache and undefined Instruktions

The L4 microkernel uses an undefined instruction to
trap for a special requests into the kernel (LOCK NOP).
The handler fixes this up and gives the user a special
code page with syscall stubs. If you're not using the
I-Cache optimization everthing works find on bochs. But
if you enable the I-Cache (--enable-icache), then the
undefined opcode exception is thrown only once for ever
virtual address it occurs. See the demodisk of the
L4KA::pistachio
(http://www.l4ka.org/projects/pistachio/download.php).
In this case the pingpong benchmark of this demo is of
interest. Everything runs fine until the program tries
to spawn a new task for its measurements. This new task
shares the code of the creating program. But the new
task stops executing at the undefined instruction
explained above and no exception is thrown.
 2004-07-29 20:15:19 +00:00
Stanislav Shwartsman
50aaf8ec6f Implemented FFREEP 287+ compatability instruction 2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
79b1cfdc1c removed unused code 2004-07-12 19:20:55 +00:00
Stanislav Shwartsman
ddc6c33887 BX_PANIC replaced by BX_INFO 2004-07-08 20:15:23 +00:00
Stanislav Shwartsman
02dec84af9 Fix FXSAVE/FXRSTOR instructions exceptions handling 2004-07-03 11:02:43 +00:00
Stanislav Shwartsman
cc61e5d5d5 Leave aligment in floatx80 reg to compiler. 
CPU code no longer assume that floatx80 register is 16-byte aligned
 2004-07-02 20:24:47 +00:00