mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
12,021 Commits 11 Branches 185 Tags 48 MiB
019c934cfd
Commit Graph

388 Commits

Author SHA1 Message Date
Stanislav Shwartsman
024d36fa12 x87: fixed C1 (rounding up) for overflow condition 2009-04-11 17:00:28 +00:00
Stanislav Shwartsman
6f6414e456 fixed inv phy addr breakpoints 2009-04-11 14:02:13 +00:00
Stanislav Shwartsman
fb76e852f0 Almost made to get rid of icount 2009-04-11 13:58:34 +00:00
Stanislav Shwartsman
4fc66aab31 Fixes for compilation by Visual Studio 2008 2009-04-07 16:12:19 +00:00
Stanislav Shwartsman
6fbc9bd250 Fixed SMC when trace cache is OFF + small speedup again 2009-04-06 18:27:30 +00:00
Stanislav Shwartsman
57f5bcf9e7 some very small optimization in cpu_loop 2009-04-06 18:14:20 +00:00
Stanislav Shwartsman
fcb51dc168 oops, this break max_instr_count feature 2009-03-26 10:24:10 +00:00
Stanislav Shwartsman
c4eed92bb0 small optimization 2009-03-26 09:44:23 +00:00
Stanislav Shwartsman
043be27c2c M$ comilerr can't optimize very good functions with long_jmp inside 2009-03-26 09:28:49 +00:00
Stanislav Shwartsman
85cdc96a49 Undo perf optimization which broke correctness 2009-03-23 16:46:17 +00:00
Stanislav Shwartsman
e5be60be64 Fixed lazy flags bug I added in one of my prev merges 
ICACHE code reorganization
 2009-03-22 21:12:35 +00:00
Stanislav Shwartsman
c3392488b5 reorganize cpu debugger support, less function, faster code 2009-03-17 19:40:26 +00:00
Stanislav Shwartsman
4470c6a1c8 make ICACHE always enabled option and deprecate it in the configure script 
Trace cache still can be turned off
 2009-03-13 18:48:08 +00:00
Stanislav Shwartsman
9417cbee63 - cpu optimizations 9remove redundant, add new) 2009-03-13 18:02:33 +00:00
Stanislav Shwartsman
51ea504442 Fixed compilation with debugger on 2009-03-10 17:02:03 +00:00
Stanislav Shwartsman
9e723a044f - Added configure option to enable/disable A20 pin support. Disabling the 
A20 pin support slightly speeds up the emulation.

  - small code cleanup
 2009-03-10 16:28:01 +00:00
Stanislav Shwartsman
6fe0b40b44 move a20 handling into getHostAddr method of BX_MEM 2009-03-08 21:23:40 +00:00
Stanislav Shwartsman
78590cc6f2 remove redundant cpu->name variable 2009-02-20 17:05:03 +00:00
Stanislav Shwartsman
3a1852ea23 take local APIC read/write access into CPU class from BX_MEM (needed for APIC virtualization later) 2009-02-17 19:20:47 +00:00
Stanislav Shwartsman
25b7227ef2 convert some BX_DEBUG prints to BX_ERROR 
fixed boundary fetch fault bug in some stupid corner cases
 2009-02-08 17:37:19 +00:00
Stanislav Shwartsman
fbc6f04d8a correctly deliver INIT 2009-02-03 19:26:09 +00:00
Stanislav Shwartsman
592484408f Initial NMI virtualization for VMX, clean out CPU pins set/clear code 2009-02-03 19:17:15 +00:00
Stanislav Shwartsman
f6cb9e529f Fixes for VMX emulation 2009-02-02 18:59:44 +00:00
Stanislav Shwartsman
2378d31998 Fixes for DR6 handling 2009-02-01 20:47:06 +00:00
Stanislav Shwartsman
9430c5cf95 INIT pin is blocked when CPU is waiting for SIPI 2009-01-31 11:53:57 +00:00
Stanislav Shwartsman
f8185a6bc6 Added Intel VMX emulation to Bochs CPU 2009-01-31 10:43:24 +00:00
Stanislav Shwartsman
a1c11c788b sepatate activity state from debug trap 2009-01-29 20:27:57 +00:00
Stanislav Shwartsman
aa982c27d8 move startup_SIPI code to CPU 2009-01-27 21:13:38 +00:00
Stanislav Shwartsman
0b3c7262d4 Wrongly committed line 2009-01-20 21:34:59 +00:00
Stanislav Shwartsman
e7ac62ac82 extensions for exception type for future 2009-01-20 21:28:43 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
a2e07ff971 - Removed --enable-guest2hos-tlb configure option. The option will be 
always enabled for any Bochs configuration.
 2008-12-11 21:19:38 +00:00
Stanislav Shwartsman
1231f64d79 move function to cpu.cc 2008-12-07 19:47:34 +00:00
Stanislav Shwartsman
25e05d9a60 forgot to mark code access as code 2008-12-06 07:14:40 +00:00
Stanislav Shwartsman
d7fa44d270 optimize code access detection 2008-12-05 22:34:42 +00:00
Stanislav Shwartsman
098308dd9f some variable renames + comp warn fix 2008-12-01 19:06:14 +00:00
Stanislav Shwartsman
f69ac41e59 added infrastructure for init disable 2008-12-01 18:54:24 +00:00
Stanislav Shwartsman
cde9595e86 implement cluster addressing model in local apic 
deliver INIT IPI through local apic
 2008-11-20 18:44:15 +00:00
Stanislav Shwartsman
dbca1fb130 Fix another corner case in prefetch() 2008-11-11 17:44:19 +00:00
Stanislav Shwartsman
5f9afb550a Fix in cpu.cc 2008-11-09 22:33:44 +00:00
Stanislav Shwartsman
c11ad9405d one more 2008-10-10 21:09:25 +00:00
Stanislav Shwartsman
5261e6f73a Optimize prefetch() method 2008-10-10 20:49:16 +00:00
Stanislav Shwartsman
577c8c7969 another way to do the same optimization 2008-10-08 20:40:26 +00:00
Stanislav Shwartsman
17040303f7 Optimization of repeat string 2008-10-08 20:15:37 +00:00
Stanislav Shwartsman
52a0eb2143 - Avoid 32-bit EIP wrap in prefetch() 2008-10-06 22:19:22 +00:00
Stanislav Shwartsman
c009e87a81 Remove external debugger interface: 
- it is closed source (!!!)
 - we have very nice replacement now
 2008-10-01 09:44:40 +00:00
Stanislav Shwartsman
dee5b0a7a6 Correctly set DR6 when instr BP detected 2008-09-26 20:41:41 +00:00
Stanislav Shwartsman
3d97374ce8 Some fixes for functionality 2008-09-24 10:39:35 +00:00
Stanislav Shwartsman
cbadccb63c Fixed DR6 handling 2008-09-23 19:33:37 +00:00
Stanislav Shwartsman
d0803ebd10 branch_16 optimizations 2008-08-23 22:27:58 +00:00
Stanislav Shwartsman
5e92a1642d Fixed compilation errors, added BX_ASSERT in paging.cc 2008-08-18 05:20:23 +00:00
Stanislav Shwartsman
aea946b4a3 One more change to speedup memory access through HostPtr check 2008-08-14 22:26:15 +00:00
Stanislav Shwartsman
fa49bd17dc Fixed small performance bug in HandleAsyncEvent 2008-08-12 19:25:42 +00:00
Stanislav Shwartsman
bbf02a8bc5 More clean rewrite of the TLB access bits 2008-08-07 22:14:38 +00:00
Stanislav Shwartsman
6398ebb1d4 First step of access bits cleanup and optimization - no perf gain yet 2008-08-03 19:53:09 +00:00
Stanislav Shwartsman
a6fda9a971 Instrumentation code updated, some PANIC messages fixed 2008-06-23 02:56:31 +00:00
Stanislav Shwartsman
a0e66d0e4c fixed variable name 2008-06-14 16:55:45 +00:00
Stanislav Shwartsman
607900dd4d very small cleeanup 2008-06-12 16:40:53 +00:00
Stanislav Shwartsman
d3528cccd6 Style fixes - name convention for push to new stack methods 2008-05-10 20:35:03 +00:00
Stanislav Shwartsman
ebc4bf0cff Check RIP for canonical boundaries in 64-bit mode 2008-05-10 15:02:42 +00:00
Stanislav Shwartsman
6ebae41ad7 print physcial address with special format - preparations for 64-bit physical address emu 2008-05-09 22:33:37 +00:00
Stanislav Shwartsman
06e3615239 Reduce trace cache memory footprint using naive memory pool trace allocation 2008-05-04 05:37:36 +00:00
Stanislav Shwartsman
f5780a5f5c Hide some BX_MEM_C variables 
Optimize resolve16 methods - by reducing their amount again - reduce chance for misspredictin
 2008-05-01 20:08:37 +00:00
Stanislav Shwartsman
67e534832b Remove from CPU reference to MEM object - it is only one and could be static 2008-04-27 19:49:02 +00:00
Stanislav Shwartsman
359eb92c73 More fixes for CPU emulation 2008-04-19 20:00:28 +00:00
Stanislav Shwartsman
4ee1bf4b68 Fixed paging permissions for code fetch 2008-04-18 13:51:09 +00:00
Stanislav Shwartsman
5993ca527c - fixed 286 tss handling (descriptor wasn't parsed correctly) 
- fixed timing of faulted instructions
- fixed PANIC message in interrupt through incorrect task gate
 2008-04-18 10:19:33 +00:00
Stanislav Shwartsman
892fa99c6f - prefetch hint should be NOP when use in register mode 
- #GP when trying to set reserved bits of CR4_HI in 64-bit mode
- #GP when trying to set reserved bits of EFER MSR
- clear upper part of RSI/RDI when executing rep instructions with 32-bit asize
  even if no repeat iterations were executed (because of RCX=0 for example)
- write SYSENTER_EIP_MSR and SYSENTER_ESP_MSR as 64-bit when x86_64 supported
- set MSR_FMASK reset value
- MSR_FMASK should be 32-bit only
- check for fetch permissions when doing ITLB lookup
- #GP when trying to write non-canonical address to MSR_CSTAR or MSR_LSTAR
- correct repeat instructions timing
- mark TSS busy in TR after it is loaded
 2008-04-16 16:44:06 +00:00
Stanislav Shwartsman
a851cfd8f0 Re-implemented modebp debugger function in simple and more clean way 2008-04-07 19:59:53 +00:00
Stanislav Shwartsman
44f04a93da Fixed compilation issue 2008-04-07 19:00:30 +00:00
Stanislav Shwartsman
fea49bb270 Fixed linear address wrap in legacy (not long64) mode 2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
1b622661d7 Cleanup 2008-04-05 20:49:21 +00:00
Stanislav Shwartsman
90f1973bef Removed BX_USE_TLB - TLB is always used, only Guest2HostTLB is optional feature 
Use Guest2HostTLB in prefetch code for IFETCHES - speedup above 3%
 2008-04-05 20:41:00 +00:00
Stanislav Shwartsman
3f2487a0af Enabled tracing cross repeated instructions 2008-03-31 18:53:08 +00:00
Stanislav Shwartsman
231056fff4 small cleanups 2008-03-29 21:51:42 +00:00
Stanislav Shwartsman
08f958f458 Fixed pageWriteStampTable to handle BIOS code as well - increased the table to all 4G instead of allocated memory size 
Avoid checking of pageWriteStamp in the heart of cpu loop with trace cache - now decWriteStamp will post stopTraceExecution event if it hits code page
 2008-03-29 21:01:25 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
64bfbb32b5 Inline icache lookup code - speedup of 3% according to my measurements 2008-03-06 20:22:24 +00:00
Stanislav Shwartsman
946b7a369d Added const to fetchPtr in cpu functions 2008-03-03 15:16:46 +00:00
Stanislav Shwartsman
2172e96654 small trace/iacache cleanups, always allow speculative tracing for trace cache 2008-03-03 14:35:36 +00:00
Stanislav Shwartsman
5e7218b8c3 Fixed problem introduced by prev checkin 
+
Fix beak to debugger when executing HLT instruction
 2008-02-29 05:39:40 +00:00
Stanislav Shwartsman
a459a64f3e whispace, tab2space, indent, dos2unix and other cleanups 2008-02-15 22:05:43 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
8653095520 small optimization in cpu_loop with trace cache 2008-01-28 20:09:40 +00:00
Stanislav Shwartsman
9ec2c87aaa cleanups and optimizations 2008-01-22 16:20:30 +00:00
Stanislav Shwartsman
192f398b46 removed --enable-magic-breakpoint configure option - it is enabled by default if Bochs internal debugger compiled in. Also it always possible to switch magic break off by .bochsrc option 2008-01-21 21:36:58 +00:00
Stanislav Shwartsman
88a4776244 taking all CPU icache/trace cache related stuff into separate source file from cpu.cc 2008-01-17 21:15:23 +00:00
Stanislav Shwartsman
77b4b70b9b oops, revert incorrectly merged change 2008-01-10 20:32:23 +00:00
Stanislav Shwartsman
1f4608cd84 Fix for implemened 3dnow instuctions (most of them are not implemented) 2008-01-10 20:26:49 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
e7a45770fd More optimization for short traces 2008-01-05 10:45:05 +00:00
Stanislav Shwartsman
a9e001bd30 Optimize short traces 2008-01-05 10:21:25 +00:00
Stanislav Shwartsman
d891f0d8ec Fixed more VC2008 warnings - hopefully last ones 2007-12-30 17:53:12 +00:00
Stanislav Shwartsman
fc159e3bcf small cleanup 2007-12-25 21:42:38 +00:00
Stanislav Shwartsman
838fb2a048 Fixing V2008 warnings - they found a bug in sse_pfp.cc ! 2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
c3c9c40674 Move MaxFetch calculation into fetchdecode - simplify the logic 2007-12-22 17:17:40 +00:00
Stanislav Shwartsman
0e5859302b Avoid 64-bit calculations when checking remainingInPage bytes 2007-12-22 12:43:17 +00:00
Stanislav Shwartsman
46366b5064 Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions 2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
d9a59c7a1f Added ability to merge traces cross JCC branch instructions 
Makes traces longer -> emulation faster in average
 2007-12-14 20:41:09 +00:00
Stanislav Shwartsman
db69a25c36 Trace cache instrumentation methods 
Next step will be tracing cross non-taken branches
 2007-12-14 11:27:44 +00:00
Stanislav Shwartsman
adda3befd3 Trace cache optimization merged 2007-12-09 18:36:05 +00:00
Stanislav Shwartsman
29267577f0 Fixed HLT problem in SMP binary which runs with single processor only 2007-12-08 09:26:13 +00:00
Stanislav Shwartsman
88899cf617 Changes for lazy flags handling -> 1st stap in transition to new lazy flags handling by Darek Mihocka (www.emulators.com) 2007-12-04 19:27:23 +00:00
Stanislav Shwartsman
91e0db63c4 no need to invalidate prefetch queue for RDMSR/WRMSR 2007-12-03 21:43:14 +00:00
Stanislav Shwartsman
8cfd17202a some simple SSE code optimizations 2007-11-27 22:12:45 +00:00
Stanislav Shwartsman
e51184c8cf Eliminate saving of RSP from heart of cpu_loop 
Now save RSP only where it is really required
 2007-11-24 14:22:34 +00:00
Stanislav Shwartsman
83f6eb6945 Changes copyrights for the files I wrote :) 
Also split EqId G1 group for x86-64
 2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
0fa82afe1f Bugfix and optimize BxResolve calls - bugfix in 64-bit mode 2007-11-13 17:30:54 +00:00
Stanislav Shwartsman
edfff23ca0 Split JCC methods to 16 different methods per branch condition 2007-11-12 18:20:15 +00:00
Stanislav Shwartsman
5a172541e2 Small cleanup 2007-11-01 20:43:53 +00:00
Stanislav Shwartsman
e137560b14 Complete MONITOR/MWAIT implemntation (including monitoring of memory range) 
Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
 2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
ce0e0287fb Naturally speedup repeat execution functions, fix TLB index calculations 2007-10-30 22:15:42 +00:00
Stanislav Shwartsman
e9801ef501 Support for restore cpu (and any other device from bochs root) from debugger 2007-10-14 19:04:51 +00:00
Stanislav Shwartsman
ac272e9383 Changes breakpoints configure time enable macroses - reduce amount of compile-time parameters 2007-10-12 22:11:25 +00:00
Stanislav Shwartsman
dcb0335ae9 Debug first instruction in exception handler after exception 2007-09-26 18:07:39 +00:00
Stanislav Shwartsman
e812f81e7b Fixes in zero upper ECX 2007-09-25 16:11:32 +00:00
Stanislav Shwartsman
38d1f39c77 Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation 2007-07-09 15:16:14 +00:00
Stanislav Shwartsman
05ea111e1c Clean CPU debug methods in main cpu_loop 2007-03-06 17:47:18 +00:00
Stanislav Shwartsman
c24627c00f Implemented CLFLUSH instruction 
Set of minor fixes for correctness
 2007-01-28 21:27:31 +00:00
Stanislav Shwartsman
5c21f7821f Speed simulation between 3 to 5% by eliminating several checks from cpu loop. 
The checks were related to repeat instructions - handle them differently
 2007-01-05 13:40:47 +00:00
Stanislav Shwartsman
925ae93e22 Reveer back changes for debug.h removal from bochs.h 2006-09-26 19:16:10 +00:00
Stanislav Shwartsman
aab3feb2e0 Fixed Makefile to compile with ACPI stub disabled 
Remove bx_debug.h from bochs.h to reduce compilation dependencies
 2006-09-25 20:13:52 +00:00
Stanislav Shwartsman
3ab94305a0 1. Fixed bug report 
[ bochs-Bugs-1562172 ] TLB_init() fails to initialize priv_check array if USE_TLB 0
2. Paging is always exists for i386+
   To disable paging it is better to use normal model without special code, only by setting cr0.pg=0
 2006-09-20 17:02:20 +00:00
Stanislav Shwartsman
c7aa53d044 Fixed compilation error of extdb 2006-06-25 21:44:46 +00:00
Stanislav Shwartsman
f9754dadeb Fix some code duplication 2006-06-24 18:27:11 +00:00
Stanislav Shwartsman
070d782ec8 Move paddr_valid param of dbg_xlate_linear2phy method to return value. 
This is much easier to use.
 2006-06-17 12:09:55 +00:00
Stanislav Shwartsman
f44190ed27 Comment most likely redundant invalid_prefetch_q 2006-06-16 20:08:03 +00:00
Stanislav Shwartsman
8ed8916ea9 Break to debugger on triple fault or panic (this time do it correctly) 
Indent changes
 2006-06-12 19:51:31 +00:00
Stanislav Shwartsman
308521e7ce Fixes in SYSCALL/SYSRET instructions 
Use parse_selector to avoid code duplication
 2006-06-11 21:37:22 +00:00
Stanislav Shwartsman
1deddb9f0e Fix linking problem with debugger enabled 2006-06-06 16:46:08 +00:00
Stanislav Shwartsman
fea15294b5 Fixed compilation error in init.cc 
Move initialization of memory object to misc_mem.cc
 2006-06-03 12:59:14 +00:00
Stanislav Shwartsman
286b89d763 Several x86-64 MSRs were not-initilized ! 
Fixed small save-restore bug in dma.cc
First step to make save-restore code look better (only several files processed for example)
 2006-05-28 17:07:57 +00:00
Stanislav Shwartsman
65e0fea773 functionally nothing changed 2006-05-26 17:24:36 +00:00
Stanislav Shwartsman
1acdb7f274 Simplify CPU loop and fix compilation error 2006-05-24 16:46:57 +00:00
Stanislav Shwartsman
8db1de7124 - Fixed several issues, each cause to NullTimer function never be called, the method is required for icache correct functionalit 
- Speed-up icache by correct purging of Icache entries
- Several new assertions for timers, to prevent bugs in future
 2006-05-16 20:55:55 +00:00
Stanislav Shwartsman
7acb46cd3d Small cleanup in cpu.cc 2006-05-16 16:47:00 +00:00
Stanislav Shwartsman
f4c7b4074e Support for x86-64 in x86 debugger (DR0-DR7) 2006-05-13 12:49:45 +00:00
Stanislav Shwartsman
fe644dfcbf - Code cleanup, remove x86-64 code from functions which cannot be called from x86-64 
- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
 2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
767fb77ebd Fully handle segment limits inside prefetch method. 
1. Should speed up the simulation (eliminate seg.limit check per every instruction exec)
2. Should help for DT (h.johansson request)
 2006-05-04 19:54:25 +00:00
Stanislav Shwartsman
199c987ee3 Return back (modified) dbg_is_end_instr_bpoint method in cpu.cc 2006-04-29 16:14:47 +00:00
Stanislav Shwartsman
2889ed190c Removed icount guard for debugger. Implement STEPN debugger command using CPU_LOOP method capabilities 2006-04-29 09:27:49 +00:00
Stanislav Shwartsman
1a0b7ee1e3 I want to replace debugger ICOUNT guard by existent cpu_loop funtionality, first step to do that ... 2006-04-29 07:12:13 +00:00
Stanislav Shwartsman
510cbe02e2 Make fetchInstruction INLINE according to hjjhansson patch 2006-04-28 16:45:29 +00:00
Stanislav Shwartsman
ff02bc8ef0 Fixed: 
With cvs snapshot 2006-04-09, --enable-debugger does not show the executed instructions anymore after being enabled via iodebug or "trace on".
 2006-04-23 15:37:25 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction 
Added HALT state indication (actually make existant one working for single CPU)
 2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
45f30f0a4c some code written to enter CPU to shutdown state. 
finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
 2006-04-07 20:47:32 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
b8be848943 Use access_type param in getHostMemAddr, less efficient but no copy-paste at least 2006-03-26 19:39:37 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object 
Cleanup in CPU code
 2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
d6f85c12f6 NMI support inside the CPU. 
Added two functions to query NMI and SMI from Bochs debugger.
In future they could be used for generating NMI or SMI by user request using GUI button (could be implemented separatelly later and under configure-time or .bocshrc option)
 2006-03-16 20:24:09 +00:00