Split JCC methods to 16 different methods per branch condition
This commit is contained in:
Stanislav Shwartsman
parent
aed6640ef4
commit
edfff23ca0
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.cc,v 1.179 2007-11-01 20:43:52 sshwarts Exp $
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// $Id: cpu.cc,v 1.180 2007-11-12 18:20:05 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -245,10 +245,8 @@ void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
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// fetch and decode next instruction
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bxInstruction_c *i = fetchInstruction(&iStorage, eipBiased);
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BxExecutePtr_tR resolveModRM = i->ResolveModrm; // Get as soon as possible for speculation
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BxExecutePtr_t execute = i->execute; // fetch as soon as possible for speculation
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if (resolveModRM)
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BX_CPU_CALL_METHODR(resolveModRM, (i));
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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// An instruction will have been fetched using either the normal case,
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// or the boundary fetch (across pages), by this point.
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@ -272,7 +270,7 @@ void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
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// decoding instruction compeleted -> continue with execution
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BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
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RIP += i->ilen();
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BX_CPU_CALL_METHOD(execute, (i)); // might iterate repeat instruction
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BX_CPU_CALL_METHOD(i->execute, (i)); // might iterate repeat instruction
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BX_CPU_THIS_PTR prev_eip = RIP; // commit new RIP
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BX_CPU_THIS_PTR prev_esp = RSP; // commit new RSP
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BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, i);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.353 2007-11-11 21:26:10 sshwarts Exp $
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// $Id: cpu.h,v 1.354 2007-11-12 18:20:07 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1637,12 +1637,39 @@ public: // for now...
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BX_SMF void MOV_TdRd(bxInstruction_c *);
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BX_SMF void MOV_RdTd(bxInstruction_c *);
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BX_SMF void JCC_Jd(bxInstruction_c *);
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BX_SMF void JCC_Jw(bxInstruction_c *);
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BX_SMF void JZ_Jd(bxInstruction_c *);
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BX_SMF void JO_Jw(bxInstruction_c *);
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BX_SMF void JNO_Jw(bxInstruction_c *);
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BX_SMF void JB_Jw(bxInstruction_c *);
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BX_SMF void JNB_Jw(bxInstruction_c *);
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BX_SMF void JZ_Jw(bxInstruction_c *);
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BX_SMF void JNZ_Jd(bxInstruction_c *);
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BX_SMF void JNZ_Jw(bxInstruction_c *);
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BX_SMF void JBE_Jw(bxInstruction_c *);
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BX_SMF void JNBE_Jw(bxInstruction_c *);
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BX_SMF void JS_Jw(bxInstruction_c *);
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BX_SMF void JNS_Jw(bxInstruction_c *);
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BX_SMF void JP_Jw(bxInstruction_c *);
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BX_SMF void JNP_Jw(bxInstruction_c *);
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BX_SMF void JL_Jw(bxInstruction_c *);
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BX_SMF void JNL_Jw(bxInstruction_c *);
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BX_SMF void JLE_Jw(bxInstruction_c *);
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BX_SMF void JNLE_Jw(bxInstruction_c *);
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BX_SMF void JO_Jd(bxInstruction_c *);
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BX_SMF void JNO_Jd(bxInstruction_c *);
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BX_SMF void JB_Jd(bxInstruction_c *);
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BX_SMF void JNB_Jd(bxInstruction_c *);
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BX_SMF void JZ_Jd(bxInstruction_c *);
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BX_SMF void JNZ_Jd(bxInstruction_c *);
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BX_SMF void JBE_Jd(bxInstruction_c *);
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BX_SMF void JNBE_Jd(bxInstruction_c *);
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BX_SMF void JS_Jd(bxInstruction_c *);
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BX_SMF void JNS_Jd(bxInstruction_c *);
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BX_SMF void JP_Jd(bxInstruction_c *);
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BX_SMF void JNP_Jd(bxInstruction_c *);
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BX_SMF void JL_Jd(bxInstruction_c *);
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BX_SMF void JNL_Jd(bxInstruction_c *);
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BX_SMF void JLE_Jd(bxInstruction_c *);
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BX_SMF void JNLE_Jd(bxInstruction_c *);
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BX_SMF void SETO_Eb(bxInstruction_c *);
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BX_SMF void SETNO_Eb(bxInstruction_c *);
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@ -2560,9 +2587,23 @@ public: // for now...
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BX_SMF void CALL_Jq(bxInstruction_c *);
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BX_SMF void JMP_Jq(bxInstruction_c *);
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BX_SMF void JCC_Jq(bxInstruction_c *);
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BX_SMF void JO_Jq(bxInstruction_c *);
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BX_SMF void JNO_Jq(bxInstruction_c *);
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BX_SMF void JB_Jq(bxInstruction_c *);
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BX_SMF void JNB_Jq(bxInstruction_c *);
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BX_SMF void JZ_Jq(bxInstruction_c *);
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BX_SMF void JNZ_Jq(bxInstruction_c *);
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BX_SMF void JBE_Jq(bxInstruction_c *);
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BX_SMF void JNBE_Jq(bxInstruction_c *);
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BX_SMF void JS_Jq(bxInstruction_c *);
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BX_SMF void JNS_Jq(bxInstruction_c *);
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BX_SMF void JP_Jq(bxInstruction_c *);
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BX_SMF void JNP_Jq(bxInstruction_c *);
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BX_SMF void JL_Jq(bxInstruction_c *);
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BX_SMF void JNL_Jq(bxInstruction_c *);
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BX_SMF void JLE_Jq(bxInstruction_c *);
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BX_SMF void JNLE_Jq(bxInstruction_c *);
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BX_SMF void MOV_CqRq(bxInstruction_c *);
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BX_SMF void MOV_DqRq(bxInstruction_c *);
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@ -2696,6 +2737,8 @@ public: // for now...
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BX_SMF void UndefinedOpcode(bxInstruction_c *);
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BX_SMF void BxError(bxInstruction_c *i);
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BX_SMF void ResolveDummy(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void Resolve16Mod0Rm0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void Resolve16Mod0Rm1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void Resolve16Mod0Rm2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: ctrl_xfer16.cc,v 1.39 2007-10-22 17:41:41 sshwarts Exp $
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// $Id: ctrl_xfer16.cc,v 1.40 2007-11-12 18:20:09 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -272,33 +272,54 @@ void BX_CPU_C::JMP_Jw(bxInstruction_c *i)
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, new_EIP);
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}
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void BX_CPU_C::JCC_Jw(bxInstruction_c *i)
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void BX_CPU_C::JO_Jw(bxInstruction_c *i)
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{
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bx_bool condition;
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switch (i->b1() & 0x0f) {
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case 0x00: /* JO */ condition = get_OF(); break;
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case 0x01: /* JNO */ condition = !get_OF(); break;
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case 0x02: /* JB */ condition = get_CF(); break;
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case 0x03: /* JNB */ condition = !get_CF(); break;
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case 0x04: /* JZ */ condition = get_ZF(); break;
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case 0x05: /* JNZ */ condition = !get_ZF(); break;
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case 0x06: /* JBE */ condition = get_CF() || get_ZF(); break;
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case 0x07: /* JNBE */ condition = !get_CF() && !get_ZF(); break;
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case 0x08: /* JS */ condition = get_SF(); break;
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case 0x09: /* JNS */ condition = !get_SF(); break;
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case 0x0A: /* JP */ condition = get_PF(); break;
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case 0x0B: /* JNP */ condition = !get_PF(); break;
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case 0x0C: /* JL */ condition = getB_SF() != getB_OF(); break;
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case 0x0D: /* JNL */ condition = getB_SF() == getB_OF(); break;
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case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF()); break;
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case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) && !get_ZF(); break;
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default:
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condition = 0; // For compiler...all targets should set condition.
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break;
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if (get_OF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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if (condition) {
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void BX_CPU_C::JNO_Jw(bxInstruction_c *i)
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{
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if (! get_OF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JB_Jw(bxInstruction_c *i)
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{
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if (get_CF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JNB_Jw(bxInstruction_c *i)
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{
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if (! get_CF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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@ -328,7 +349,157 @@ void BX_CPU_C::JZ_Jw(bxInstruction_c *i)
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void BX_CPU_C::JNZ_Jw(bxInstruction_c *i)
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{
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if (!get_ZF()) {
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if (! get_ZF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JBE_Jw(bxInstruction_c *i)
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{
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if (get_CF() || get_ZF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JNBE_Jw(bxInstruction_c *i)
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{
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if (! (get_CF() || get_ZF())) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JS_Jw(bxInstruction_c *i)
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{
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if (get_SF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JNS_Jw(bxInstruction_c *i)
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{
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if (! get_SF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JP_Jw(bxInstruction_c *i)
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{
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if (get_PF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JNP_Jw(bxInstruction_c *i)
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{
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if (! get_PF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JL_Jw(bxInstruction_c *i)
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{
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if (getB_SF() != getB_OF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JNL_Jw(bxInstruction_c *i)
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{
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if (getB_SF() == getB_OF()) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JLE_Jw(bxInstruction_c *i)
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{
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if (get_ZF() || (getB_SF() != getB_OF())) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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}
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#endif
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}
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void BX_CPU_C::JNLE_Jw(bxInstruction_c *i)
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{
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if (! get_ZF() && (getB_SF() == getB_OF())) {
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Bit32u new_EIP = EIP + (Bit32s) i->Id();
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new_EIP &= 0x0000ffff;
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branch_near32(new_EIP);
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@ -357,8 +528,7 @@ void BX_CPU_C::JMP_Ew(bxInstruction_c *i)
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, new_EIP);
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}
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/* Far indirect jump */
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/* Far indirect jump */
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void BX_CPU_C::JMP16_Ep(bxInstruction_c *i)
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{
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Bit16u cs_raw;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: ctrl_xfer32.cc,v 1.51 2007-10-22 17:41:41 sshwarts Exp $
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// $Id: ctrl_xfer32.cc,v 1.52 2007-11-12 18:20:10 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -246,33 +246,51 @@ void BX_CPU_C::JMP_Jd(bxInstruction_c *i)
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, new_EIP);
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}
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void BX_CPU_C::JCC_Jd(bxInstruction_c *i)
|
||||
void BX_CPU_C::JO_Jd(bxInstruction_c *i)
|
||||
{
|
||||
bx_bool condition;
|
||||
if (get_OF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
switch (i->b1() & 0x0f) {
|
||||
case 0x00: /* JO */ condition = get_OF(); break;
|
||||
case 0x01: /* JNO */ condition = !get_OF(); break;
|
||||
case 0x02: /* JB */ condition = get_CF(); break;
|
||||
case 0x03: /* JNB */ condition = !get_CF(); break;
|
||||
case 0x04: /* JZ */ condition = get_ZF(); break;
|
||||
case 0x05: /* JNZ */ condition = !get_ZF(); break;
|
||||
case 0x06: /* JBE */ condition = get_CF() || get_ZF(); break;
|
||||
case 0x07: /* JNBE */ condition = !get_CF() && !get_ZF(); break;
|
||||
case 0x08: /* JS */ condition = get_SF(); break;
|
||||
case 0x09: /* JNS */ condition = !get_SF(); break;
|
||||
case 0x0A: /* JP */ condition = get_PF(); break;
|
||||
case 0x0B: /* JNP */ condition = !get_PF(); break;
|
||||
case 0x0C: /* JL */ condition = getB_SF() != getB_OF(); break;
|
||||
case 0x0D: /* JNL */ condition = getB_SF() == getB_OF(); break;
|
||||
case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF()); break;
|
||||
case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) && !get_ZF(); break;
|
||||
default:
|
||||
condition = 0; // For compiler...all targets should set condition.
|
||||
break;
|
||||
}
|
||||
void BX_CPU_C::JNO_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_OF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
if (condition) {
|
||||
void BX_CPU_C::JB_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (get_CF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNB_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_CF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
@ -300,7 +318,147 @@ void BX_CPU_C::JZ_Jd(bxInstruction_c *i)
|
||||
|
||||
void BX_CPU_C::JNZ_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (!get_ZF()) {
|
||||
if (! get_ZF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JBE_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (get_CF() || get_ZF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNBE_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (! (get_CF() || get_ZF())) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JS_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (get_SF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNS_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_SF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JP_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (get_PF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNP_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_PF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JL_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (getB_SF() != getB_OF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNL_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (getB_SF() == getB_OF()) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JLE_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (get_ZF() || (getB_SF() != getB_OF())) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNLE_Jd(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_ZF() && (getB_SF() == getB_OF())) {
|
||||
Bit32u new_EIP = EIP + (Bit32s) i->Id();
|
||||
branch_near32(new_EIP);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, new_EIP);
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: ctrl_xfer64.cc,v 1.51 2007-11-11 21:26:10 sshwarts Exp $
|
||||
// $Id: ctrl_xfer64.cc,v 1.52 2007-11-12 18:20:10 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -195,36 +195,48 @@ void BX_CPU_C::JMP_Jq(bxInstruction_c *i)
|
||||
BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, RIP);
|
||||
}
|
||||
|
||||
void BX_CPU_C::JCC_Jq(bxInstruction_c *i)
|
||||
void BX_CPU_C::JO_Jq(bxInstruction_c *i)
|
||||
{
|
||||
bx_bool condition;
|
||||
|
||||
switch (i->b1() & 0x0f) {
|
||||
case 0x00: /* JO */ condition = get_OF(); break;
|
||||
case 0x01: /* JNO */ condition = !get_OF(); break;
|
||||
case 0x02: /* JB */ condition = get_CF(); break;
|
||||
case 0x03: /* JNB */ condition = !get_CF(); break;
|
||||
case 0x04: /* JZ */ condition = get_ZF(); break;
|
||||
case 0x05: /* JNZ */ condition = !get_ZF(); break;
|
||||
case 0x06: /* JBE */ condition = get_CF() || get_ZF(); break;
|
||||
case 0x07: /* JNBE */ condition = !get_CF() && !get_ZF(); break;
|
||||
case 0x08: /* JS */ condition = get_SF(); break;
|
||||
case 0x09: /* JNS */ condition = !get_SF(); break;
|
||||
case 0x0A: /* JP */ condition = get_PF(); break;
|
||||
case 0x0B: /* JNP */ condition = !get_PF(); break;
|
||||
case 0x0C: /* JL */ condition = getB_SF() != getB_OF(); break;
|
||||
case 0x0D: /* JNL */ condition = getB_SF() == getB_OF(); break;
|
||||
case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF());
|
||||
break;
|
||||
case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) &&
|
||||
!get_ZF();
|
||||
break;
|
||||
default:
|
||||
condition = 0; // For compiler...all targets should set condition.
|
||||
break;
|
||||
if (get_OF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
if (condition) {
|
||||
void BX_CPU_C::JNO_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_OF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JB_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (get_CF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNB_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_CF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
@ -261,6 +273,136 @@ void BX_CPU_C::JNZ_Jq(bxInstruction_c *i)
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JBE_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (get_CF() || get_ZF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNBE_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (! (get_CF() || get_ZF())) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JS_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (get_SF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNS_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_SF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JP_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (get_PF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNP_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_PF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JL_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (getB_SF() != getB_OF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNL_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (getB_SF() == getB_OF()) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JLE_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (get_ZF() || (getB_SF() != getB_OF())) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JNLE_Jq(bxInstruction_c *i)
|
||||
{
|
||||
if (! get_ZF() && (getB_SF() == getB_OF())) {
|
||||
branch_near64(i);
|
||||
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
||||
}
|
||||
#if BX_INSTRUMENTATION
|
||||
else {
|
||||
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPU_C::JMP_Eq(bxInstruction_c *i)
|
||||
{
|
||||
Bit64u op1_64;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: fetchdecode.cc,v 1.116 2007-11-11 20:56:22 sshwarts Exp $
|
||||
// $Id: fetchdecode.cc,v 1.117 2007-11-12 18:20:10 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -523,22 +523,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
|
||||
/* 6D */ { 0, &BX_CPU_C::REP_INSW_YwDX },
|
||||
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
||||
/* 6F */ { 0, &BX_CPU_C::REP_OUTSW_DXXw },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JO_Jw },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JNO_Jw },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JB_Jw },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JNB_Jw },
|
||||
/* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JZ_Jw },
|
||||
/* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JNZ_Jw },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JBE_Jw },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JNBE_Jw },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JS_Jw },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JNS_Jw },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JP_Jw },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JNP_Jw },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JL_Jw },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JNL_Jw },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JLE_Jw },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JNLE_Jw },
|
||||
/* 80 */ { BxAnother | BxGroup1 | BxImmediate_Ib, NULL, BxOpcodeInfoG1EbIb },
|
||||
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfoG1Ew },
|
||||
/* 82 */ { BxAnother | BxGroup1 | BxImmediate_Ib, NULL, BxOpcodeInfoG1EbIb },
|
||||
@ -839,22 +839,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
|
||||
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
||||
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
||||
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
||||
/* 0F 80 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 81 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 82 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 83 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 80 */ { BxImmediate_BrOff16, &BX_CPU_C::JO_Jw },
|
||||
/* 0F 81 */ { BxImmediate_BrOff16, &BX_CPU_C::JNO_Jw },
|
||||
/* 0F 82 */ { BxImmediate_BrOff16, &BX_CPU_C::JB_Jw },
|
||||
/* 0F 83 */ { BxImmediate_BrOff16, &BX_CPU_C::JNB_Jw },
|
||||
/* 0F 84 */ { BxImmediate_BrOff16, &BX_CPU_C::JZ_Jw },
|
||||
/* 0F 85 */ { BxImmediate_BrOff16, &BX_CPU_C::JNZ_Jw },
|
||||
/* 0F 86 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 87 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 88 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 89 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 8A */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 8B */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 8C */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 8D */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 8E */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 8F */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
||||
/* 0F 86 */ { BxImmediate_BrOff16, &BX_CPU_C::JBE_Jw },
|
||||
/* 0F 87 */ { BxImmediate_BrOff16, &BX_CPU_C::JNBE_Jw },
|
||||
/* 0F 88 */ { BxImmediate_BrOff16, &BX_CPU_C::JS_Jw },
|
||||
/* 0F 89 */ { BxImmediate_BrOff16, &BX_CPU_C::JNS_Jw },
|
||||
/* 0F 8A */ { BxImmediate_BrOff16, &BX_CPU_C::JP_Jw },
|
||||
/* 0F 8B */ { BxImmediate_BrOff16, &BX_CPU_C::JNP_Jw },
|
||||
/* 0F 8C */ { BxImmediate_BrOff16, &BX_CPU_C::JL_Jw },
|
||||
/* 0F 8D */ { BxImmediate_BrOff16, &BX_CPU_C::JNL_Jw },
|
||||
/* 0F 8E */ { BxImmediate_BrOff16, &BX_CPU_C::JLE_Jw },
|
||||
/* 0F 8F */ { BxImmediate_BrOff16, &BX_CPU_C::JNLE_Jw },
|
||||
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
||||
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
||||
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
||||
@ -1081,22 +1081,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
|
||||
/* 6D */ { 0, &BX_CPU_C::REP_INSD_YdDX },
|
||||
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
||||
/* 6F */ { 0, &BX_CPU_C::REP_OUTSD_DXXd },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JO_Jd },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JNO_Jd },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JB_Jd },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JNB_Jd },
|
||||
/* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JZ_Jd },
|
||||
/* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JNZ_Jd },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JBE_Jd },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JNBE_Jd },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JS_Jd },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JNS_Jd },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JP_Jd },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JNP_Jd },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JL_Jd },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JNL_Jd },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JLE_Jd },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JNLE_Jd },
|
||||
/* 80 */ { BxAnother | BxGroup1 | BxImmediate_Ib, NULL, BxOpcodeInfoG1EbIb },
|
||||
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfoG1Ed },
|
||||
/* 82 */ { BxAnother | BxGroup1 | BxImmediate_Ib, NULL, BxOpcodeInfoG1EbIb },
|
||||
@ -1397,22 +1397,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
|
||||
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
||||
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
||||
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JO_Jd },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JNO_Jd },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JB_Jd },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JNB_Jd },
|
||||
/* 0F 84 */ { BxImmediate_BrOff32, &BX_CPU_C::JZ_Jd },
|
||||
/* 0F 85 */ { BxImmediate_BrOff32, &BX_CPU_C::JNZ_Jd },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JBE_Jd },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JNBE_Jd },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JS_Jd },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JNS_Jd },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JP_Jd },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JNP_Jd },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JL_Jd },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JNL_Jd },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JLE_Jd },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JNLE_Jd },
|
||||
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
||||
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
||||
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
||||
@ -1549,7 +1549,7 @@ BX_CPU_C::fetchDecode32(Bit8u *iptr, bxInstruction_c *instruction, unsigned rema
|
||||
os_32 = is_32 =
|
||||
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b;
|
||||
|
||||
instruction->ResolveModrm = NULL;
|
||||
instruction->ResolveModrm = ResolveDummy;
|
||||
instruction->initMetaInfo(/*os32*/ is_32, /*as32*/ is_32,
|
||||
/*os64*/ 0, /*as64*/ 0);
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: fetchdecode64.cc,v 1.122 2007-11-11 21:26:10 sshwarts Exp $
|
||||
// $Id: fetchdecode64.cc,v 1.123 2007-11-12 18:20:12 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -667,22 +667,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
|
||||
/* 6D */ { 0, &BX_CPU_C::REP_INSW_YwDX },
|
||||
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
||||
/* 6F */ { 0, &BX_CPU_C::REP_OUTSW_DXXw },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JO_Jq },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JNO_Jq },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JB_Jq },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JNB_Jq },
|
||||
/* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JZ_Jq },
|
||||
/* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JNZ_Jq },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JBE_Jq },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JNBE_Jq },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JS_Jq },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JNS_Jq },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JP_Jq },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JNP_Jq },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JL_Jq },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JNL_Jq },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JLE_Jq },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JNLE_Jq },
|
||||
/* 80 */ { BxAnother | BxGroup1 | BxImmediate_Ib, NULL, BxOpcodeInfo64G1EbIb },
|
||||
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfo64G1Ew },
|
||||
/* 82 */ { 0, &BX_CPU_C::BxError },
|
||||
@ -954,22 +954,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
|
||||
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
||||
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
||||
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JO_Jq },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JNO_Jq },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JB_Jq },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JNB_Jq },
|
||||
/* 0F 84 */ { BxImmediate_BrOff32, &BX_CPU_C::JZ_Jq },
|
||||
/* 0F 85 */ { BxImmediate_BrOff32, &BX_CPU_C::JNZ_Jq },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JBE_Jq },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JNBE_Jq },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JS_Jq },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JNS_Jq },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JP_Jq },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JNP_Jq },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JL_Jq },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JNL_Jq },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JLE_Jq },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JNLE_Jq },
|
||||
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
||||
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
||||
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
||||
@ -1196,22 +1196,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
|
||||
/* 6D */ { 0, &BX_CPU_C::REP_INSD_YdDX },
|
||||
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
||||
/* 6F */ { 0, &BX_CPU_C::REP_OUTSD_DXXd },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JO_Jq },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JNO_Jq },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JB_Jq },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JNB_Jq },
|
||||
/* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JZ_Jq },
|
||||
/* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JNZ_Jq },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JBE_Jq },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JNBE_Jq },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JS_Jq },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JNS_Jq },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JP_Jq },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JNP_Jq },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JL_Jq },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JNL_Jq },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JLE_Jq },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JNLE_Jq },
|
||||
/* 80 */ { BxAnother | BxGroup1 | BxImmediate_Ib, NULL, BxOpcodeInfo64G1EbIb },
|
||||
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfo64G1Ed },
|
||||
/* 82 */ { 0, &BX_CPU_C::BxError },
|
||||
@ -1483,22 +1483,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
|
||||
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
||||
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
||||
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JO_Jq },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JNO_Jq },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JB_Jq },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JNB_Jq },
|
||||
/* 0F 84 */ { BxImmediate_BrOff32, &BX_CPU_C::JZ_Jq },
|
||||
/* 0F 85 */ { BxImmediate_BrOff32, &BX_CPU_C::JNZ_Jq },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JBE_Jq },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JNBE_Jq },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JS_Jq },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JNS_Jq },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JP_Jq },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JNP_Jq },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JL_Jq },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JNL_Jq },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JLE_Jq },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JNLE_Jq },
|
||||
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
||||
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
||||
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
||||
@ -1725,22 +1725,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
|
||||
/* 6D */ { 0, &BX_CPU_C::REP_INSD_YdDX },
|
||||
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
||||
/* 6F */ { 0, &BX_CPU_C::REP_OUTSD_DXXd },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JO_Jq },
|
||||
/* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JNO_Jq },
|
||||
/* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JB_Jq },
|
||||
/* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JNB_Jq },
|
||||
/* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JZ_Jq },
|
||||
/* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JNZ_Jq },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
||||
/* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JBE_Jq },
|
||||
/* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JNBE_Jq },
|
||||
/* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JS_Jq },
|
||||
/* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JNS_Jq },
|
||||
/* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JP_Jq },
|
||||
/* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JNP_Jq },
|
||||
/* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JL_Jq },
|
||||
/* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JNL_Jq },
|
||||
/* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JLE_Jq },
|
||||
/* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JNLE_Jq },
|
||||
/* 80 */ { BxAnother | BxGroup1 | BxImmediate_Ib, NULL, BxOpcodeInfo64G1EbIb },
|
||||
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfo64G1Eq },
|
||||
/* 82 */ { 0, &BX_CPU_C::BxError },
|
||||
@ -2012,22 +2012,22 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
|
||||
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
||||
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
||||
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JO_Jq },
|
||||
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JNO_Jq },
|
||||
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JB_Jq },
|
||||
/* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JNB_Jq },
|
||||
/* 0F 84 */ { BxImmediate_BrOff32, &BX_CPU_C::JZ_Jq },
|
||||
/* 0F 85 */ { BxImmediate_BrOff32, &BX_CPU_C::JNZ_Jq },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
||||
/* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JBE_Jq },
|
||||
/* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JNBE_Jq },
|
||||
/* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JS_Jq },
|
||||
/* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JNS_Jq },
|
||||
/* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JP_Jq },
|
||||
/* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JNP_Jq },
|
||||
/* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JL_Jq },
|
||||
/* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JNL_Jq },
|
||||
/* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JLE_Jq },
|
||||
/* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JNLE_Jq },
|
||||
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
||||
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
||||
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
||||
@ -2162,7 +2162,8 @@ BX_CPU_C::fetchDecode64(Bit8u *iptr, bxInstruction_c *instruction, unsigned rema
|
||||
unsigned rex_prefix = 0;
|
||||
|
||||
offset = 512*1;
|
||||
instruction->ResolveModrm = NULL;
|
||||
|
||||
instruction->ResolveModrm = ResolveDummy;
|
||||
instruction->initMetaInfo(/*os32*/ 1, // operand size 32 override defaults to 1
|
||||
/*as32*/ 1, // address size 32 override defaults to 1
|
||||
/*os64*/ 0, // operand size 64 override defaults to 0
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: resolve16.cc,v 1.10 2006-03-06 22:03:01 sshwarts Exp $
|
||||
// $Id: resolve16.cc,v 1.11 2007-11-12 18:20:15 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001 MandrakeSoft S.A.
|
||||
@ -30,6 +30,12 @@
|
||||
#include "cpu.h"
|
||||
#define LOG_THIS BX_CPU_THIS_PTR
|
||||
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::ResolveDummy(bxInstruction_c *i)
|
||||
{
|
||||
return; // used when no memory access is needed
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(1)
|
||||
BX_CPU_C::Resolve16Mod0Rm0(bxInstruction_c *i)
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user