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1100 Commits

Author SHA1 Message Date
Stanislav Shwartsman
7a1d0a53d7 Small cleanup 2006-04-06 18:45:54 +00:00
Stanislav Shwartsman
03eac64013 Added decoding of new SSE4 instructions (recently published in Intel docs) 
At least CPUID detects them correctly
The code is never tested (still) ! (but should work fine)
 2006-04-06 18:30:05 +00:00
Stanislav Shwartsman
c8cc6bcd14 Remove code duplication from SMM code 2006-04-06 16:47:29 +00:00
Stanislav Shwartsman
9dc1790f07 Simplify and optimize fetchdecode methods. 
Now fetchdecode is simpler to understand and easier to modify, for example to support 3-byte opcodes (SSE4)
 2006-04-05 20:52:40 +00:00
Stanislav Shwartsman
b9dedc8412 Added missed file from prev commit (waiting for moderator approval, message is too big) 
Summary changes:
- Fixed critical ICACHE bug from one of the recent commits
- Complete preliminary SMM implemntation, SMI still PANICs but 'alwayscont' should work fine
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Disasm SSE4 instructions
- Rename PNI->SSE3 everywhere in the code
 2006-04-05 17:44:04 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
a6c3ffeeb5 Fixed compilation error 2006-03-29 19:16:24 +00:00
Stanislav Shwartsman
ae2ea87c43 More fixes for SMM 2006-03-29 18:08:13 +00:00
Stanislav Shwartsman
4fd9bd53c3 Change Bit32u -> bx_phy_address in memory 2006-03-28 16:53:02 +00:00
Stanislav Shwartsman
42aac37624 Fixed complilation error 2006-03-27 20:09:37 +00:00
Stanislav Shwartsman
da3d26d7f4 Preliminary implemntation of SMM save statei 
Fixed fetchModeMask for load32bitOsStack
 2006-03-27 18:02:07 +00:00
Stanislav Shwartsman
b8be848943 Use access_type param in getHostMemAddr, less efficient but no copy-paste at least 2006-03-26 19:39:37 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object 
Cleanup in CPU code
 2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
f347ab97bf Fixed CALL/JMP far through call gate 64 
Decode SWAPGS and RDTSCP instructions
Indent changes in fetchdecode
 2006-03-22 20:47:11 +00:00
Stanislav Shwartsman
d6f85c12f6 NMI support inside the CPU. 
Added two functions to query NMI and SMI from Bochs debugger.
In future they could be used for generating NMI or SMI by user request using GUI button (could be implemented separatelly later and under configure-time or .bocshrc option)
 2006-03-16 20:24:09 +00:00
Stanislav Shwartsman
a64b16391d Remove unused vars 2006-03-15 17:57:11 +00:00
Stanislav Shwartsman
e85a90a720 Remove cpu.h -> devices.cc dependancy, kill_bochs_request moved from CPU to bx_pc_system 
Small Icache simplification and speedup
 2006-03-14 18:11:22 +00:00
Volker Ruppert
9699eaeca4 - added SMP support in save/restore parameter subtree 
- TODO: implement tab window control for SMP CPUs in wx "show cpu" dialog
 2006-03-09 20:16:17 +00:00
Stanislav Shwartsman
d74f1b9a43 Fixed bug in ENTER instruction in long mode 2006-03-08 18:21:16 +00:00
Volker Ruppert
5597fc9cf3 - fixed wx "Show CPU" dialog to make it work with the new parameter handling 
- fixed CPU register names
- removed old parameter handling (bx_id, BXP_* symbols, param_registry, etc.)
 2006-03-08 18:10:41 +00:00
Volker Ruppert
575a17e50f - converted cpu state parameters to param-tree style 
- removed old-style parameter init methods
- NOTE: the wx CPU registers dialog (debugger) currently reports nothing
- TODO: fix wx CPU registers dialog, remove remaining bx_id related stuff
 2006-03-07 20:32:07 +00:00
Stanislav Shwartsman
da0b2ac377 Update dependencies for iodev and root project folders. 
Fixed compilation errors for 386 case
Added file header for slowdown_timer.h
 2006-03-06 22:32:03 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
fc0894bbe1 Enable A20 after system reset 2006-03-04 16:58:10 +00:00
Stanislav Shwartsman
93898e11b2 Missed } 2006-03-04 09:24:31 +00:00
Stanislav Shwartsman
324d75e749 Fix another broking change 2006-03-04 09:22:55 +00:00
Stanislav Shwartsman
e297df457a Roll back the try to move Local APIC memory access to CPU. 
It was fast and fine but had serious correctness problems with RMW apic access
 2006-03-02 23:16:13 +00:00
Stanislav Shwartsman
6d513ed6f2 Fix indent corruption 2006-03-02 20:17:54 +00:00
Stanislav Shwartsman
6c392e7f3f optimize apic code 2006-03-02 20:09:21 +00:00
Stanislav Shwartsman
7cc8bc0836 Clean and optimize 2006-03-02 17:39:10 +00:00
Stanislav Shwartsman
5fad793989 move local apic handling to the access_linear function for the memory class. 
speedup the whole simulation by 2% !
 2006-03-01 22:32:24 +00:00
Stanislav Shwartsman
9b3be40d88 Improve OS/2 hack - save full segment (including hidden part) and not only selector value 2006-02-28 20:29:03 +00:00
Stanislav Shwartsman
a527b2cfca first smm - implement cpu state when switching to SMM 
smm coming soon
fixed code duplication in init.cc
 2006-02-28 19:50:08 +00:00
Stanislav Shwartsman
55ceecf79b Small optimization in icache page-write-stamp 2006-02-28 17:47:33 +00:00
Stanislav Shwartsman
24077c071b Fixed exception generated when accessing memory w/o right permissions 2006-02-26 21:44:03 +00:00
Stanislav Shwartsman
83bb20b6f9 Diagnostic message for possible bug in exception.cc 2006-02-24 09:49:03 +00:00
Stanislav Shwartsman
79306b851c Separate fetch/decode instruction block to stand-alone method. 
The method could be reused when building instruction trace for DT
 2006-02-23 18:23:31 +00:00
Stanislav Shwartsman
0150904e9d Improve debug messages and optimize 2006-02-22 20:58:16 +00:00
Stanislav Shwartsman
8ba6c1178a Fixed PANIC in CMPxx SSE instructions 2006-02-22 20:20:21 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use 
--enable-sse=3 instead (Stanislav Shwartsman)
 2006-02-20 19:28:57 +00:00
Volker Ruppert
a4bc4cc9e0 - fixed cpu parameter handling in SMP mode 2006-02-18 17:28:18 +00:00
Volker Ruppert
2a6261fba7 - cpu options rewritten to a parameter tree 
- boolean parameter type now supports new parameter handling
- new parameter object constructors now supports label initialization
- bx_list_c constructor now supports title initialization
- textconfig: initial support for new parameter handling
- wx: missing CPU config dialog added
- wx: ParamDialog now handles disabled parameters correctly
- removed unnecessary spaces from function calls
 2006-02-18 16:53:18 +00:00
Stanislav Shwartsman
5c58b22f44 Fixed opcode names according to Intel docs 
Fixed bug found during disasm validation
 2006-02-17 13:34:31 +00:00
Stanislav Shwartsman
b966703504 print CPU mode correctly again 2006-02-14 20:14:18 +00:00
Stanislav Shwartsman
203a9caf31 SMM mode could leave together with pmode or any other (according to amd docs) 
so we need separate bx_bool indicator in_smm instead
 2006-02-14 20:03:14 +00:00
Stanislav Shwartsman
024ce249bf Define SMM mode for future implementation. 
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
 2006-02-14 19:00:08 +00:00
Stanislav Shwartsman
2646484dc1 Fix 'show' command in Boch debugger. 
Fully supported show-interrupts, show-mode and show-call options
Enable toggling of show options (bug report from SF)
 2006-02-12 20:21:36 +00:00
Stanislav Shwartsman
0bf03f370d Support for DC and HT in SMP configurations 
Extended format of CPU::COUNT .bochsrc option to define number of core/threads
 2006-02-11 15:28:43 +00:00
Stanislav Shwartsman
9b451f43e2 Save/restore RIP/RSP only on FAULT type exceptions, not on traps 2006-02-11 09:08:02 +00:00
Stanislav Shwartsman
5a65e1065e Decoding functionality for Bochs disassembler. 
Fixed 'step over' debugger command using bx_dbg_read_linear method.
Small debugger fix in cpu.cc
 2006-02-05 19:48:29 +00:00
Stanislav Shwartsman
9a15f59e05 Fixed bug in SYSRET legacy mode 2006-02-02 17:55:48 +00:00
Stanislav Shwartsman
6ca296de8b Move --enable-reset-on-triple-fault option to runtime CPU::reste_on_triple-fault option in .bocshrc 
Cleanup and optimize parser for debugger
 2006-02-01 18:12:08 +00:00
Stanislav Shwartsman
1d4fa8b327 Available back ability to use eip register as source in 'set reg = <expr>' cmd. 
Setting the eip register still not available (deliberatelly).
I don't want to enable it util I find some easy interface to do it.
I don't want to allow setting of part of RIP register using 'set eip=<expr>' and leave the upper part unchanged ....

Remove unused test registres from debugger
Fix compilation error in cpu.h
Change trace-on/trace-off commands. Make one 'trace' command with usage of 'trace on/trace off'
 2006-01-31 19:45:34 +00:00
Stanislav Shwartsman
24c27deae8 Recognize XF exception (0x13) when SSE is enabled 2006-01-31 17:41:08 +00:00
Stanislav Shwartsman
067f23e3da Fix set 'ah,bh,ch,dh' registers from debugger 
Enable disasm by default - in adds some useful information to debug messages in log file
Remove defines for 8bit registers from cpu.h, the x86 arch defines not match defines used by set_reg and get_reg methods.
 2006-01-27 19:50:00 +00:00
Stanislav Shwartsman
37eb82c69c Totally remove the cosimulation code from Bochs. 
The Bochs anyway even doesn't compile if cosimulation configured enabled.
But in the same time the cosimulation code only disturbs to the future development of Bochs debugger, for example adding x86-64 functionality ...
For those of you who still may want to see the cosimulation code inside I put it in patch and upload it Bochs CVS patches folder. Read comments for the patch ! ----------------------------------------------------------------------
 2006-01-25 22:20:00 +00:00
Stanislav Shwartsman
83b4f7ba05 1. remove the ability of using regnames as symbols ! 
'set $eax = <value>' is stupid when you could do expr like 'set eax = ebx + 4'

2. cleanup and optimize Bochs debugger parsing, fixed several memory leaks
 2006-01-25 18:13:44 +00:00
Stanislav Shwartsman
d257f548b9 1. implemented 'set register <name>=<expr>' command, old style 'registers <name>=<exp> command' removed, now 'r|reg|regs|registers' command shows CPU registers contents (same as 'info cpu') 
2. new command 'u|disasm|disassemble mode-switch' - switch between Intel and AT&T disasm syntax

3. new command 'u|disasm|disassemble size=n' should be used instead of old 'set $disassembler_size=n'

4. 'h' is a new alias for 'help' command
 2006-01-24 21:37:37 +00:00
Stanislav Shwartsman
f9cad8d272 Remove debug printf 2006-01-24 19:07:45 +00:00
Stanislav Shwartsman
18afa9fd2d This is cumulative patch for bochs debugger, it is only very first step towards working debugger supporting all new simulator functionalitieS. 
- move crc.cc from debugger to bochs folder and make it projct-wide and not local for debugger
 - added new 'info sse' command for debugger
 - extend 'modebp' command to break on any mode change
 - remove unimplemened 'info program' function, it is always printed fixed text
 - move debugger help to parser, cleanup and simplify it
 2006-01-24 19:03:55 +00:00
Stanislav Shwartsman
21352e50a9 Fix some bugs in debugger parser, cleanup 
Add some debugger functionality
 2006-01-23 21:44:44 +00:00
Stanislav Shwartsman
5a5854c684 Missed ; 2006-01-22 18:18:19 +00:00
Stanislav Shwartsman
de9be40256 Fixed ROL/ROR flags anomaly (h.johansson) 2006-01-22 18:17:27 +00:00
Stanislav Shwartsman
9df8079206 Write to MSR_TSC implemented (patch by Bryce) 2006-01-21 12:06:03 +00:00
Stanislav Shwartsman
08c15c67c0 Don't know how much it helps ... 
First step to make bx debugger supporting x86-64. guard_found object fields conerted to bx_address for x86-64 support.
 2006-01-19 18:32:39 +00:00
Stanislav Shwartsman
90f899fd16 Fix bug in PMULUDQ SSE instruction 2006-01-18 18:39:17 +00:00
Stanislav Shwartsman
2c8f6f7720 Merged patch: determine number of processors to emulate through .bochsrc 2006-01-18 18:35:38 +00:00
Stanislav Shwartsman
c8cd1f805a Enabled LAHF/SAHF for x86-64 mode 2006-01-17 19:50:42 +00:00
Stanislav Shwartsman
c92aba3776 Using back tracking in CVS I found the reason why CVS sources not compiled with configure --enable-debugger configuration (reported by Brendan). 
Again it is andom change which cause to debugger not to compile ;(
This is definitelly GCC bug !
 2006-01-17 07:58:11 +00:00
Stanislav Shwartsman
7bf51e48db Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address) 
Fixed fetch mode mask initialization (bug report 1400027  Boundary instruction cache error for uninitialized memory)
For safety only - everytime when changing CS register update fetch mode mask.
Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
 2006-01-16 19:22:28 +00:00
Stanislav Shwartsman
76ac076d52 Print R8-R15 in registers dump 2006-01-15 18:14:16 +00:00
Stanislav Shwartsman
652ce3c0dc Fix for bug report: 
bochs-Bugs-1406383 ] Local APIC TPR is ignored due to signed/unsigned mismatch
 2006-01-15 17:38:40 +00:00
Stanislav Shwartsman
a74b63eb3d Allow writing PCE to CR4 2006-01-13 11:11:29 +00:00
Stanislav Shwartsman
d7d2de421f Remove code duplication in CPU and memory objects initialization 2006-01-11 18:22:12 +00:00
Stanislav Shwartsman
5899932f0c Merge APIC patch to the CVS. 
- Fix lowest priority interrupt delivery from I/O APIC
 - XAPIC support
 - Implemented APIC bus functionality
 - cleanup APIC code
 2006-01-10 06:13:26 +00:00
Stanislav Shwartsman
89e3472178 Fix validate_seg_regs check 2006-01-09 19:34:52 +00:00
Stanislav Shwartsman
393a653fb4 Fix typo 2006-01-05 21:40:07 +00:00
Stanislav Shwartsman
b07e698b3e Initialize CPU and APIC after the bx_pc_system object 2006-01-05 21:39:11 +00:00
Volker Ruppert
97e1f39d8f - I/O APIC signal handling rewritten ("backported" from qemu) 
- don't flood the logfile if APIC EOI has no effect
- fixed a warning in the APIC code
- TODO: fix IRQ 0 handling, implement ExtINT
 2006-01-01 11:33:06 +00:00
Stanislav Shwartsman
6ff8fccfc4 Fixed cross-segment boundary check, when instruction ends on the segment boundary it should generate GP(0) 2005-12-28 19:18:50 +00:00
Stanislav Shwartsman
9e4a3675d3 Cleanup APIC code 
Fixed APIC timer problem (too many registered timers) reported by Brendan
 2005-12-26 19:42:09 +00:00
Stanislav Shwartsman
279c67ae37 Fix debug message 2005-12-23 14:24:47 +00:00
Stanislav Shwartsman
dfc633ef0a New debug function in cpu 2005-12-19 17:58:08 +00:00
Stanislav Shwartsman
cd2a8da34c Add more debugging/instrumentation functionality 2005-12-14 20:05:40 +00:00
Stanislav Shwartsman
8627bc1596 Fixed bug from prev commit 2005-12-13 20:42:22 +00:00
Alexander Krisak
99fae60a0e Small icache optimization 2005-12-13 14:18:34 +00:00
Stanislav Shwartsman
5f339a5fd8 Small debug fixes 2005-12-12 22:01:22 +00:00
Stanislav Shwartsman
70cc5a7fb0 Fix incorrect commit 2005-12-12 19:54:48 +00:00
Stanislav Shwartsman
f863d1e902 Generate #GP exception instead of #TS when TSS selector points to bad TSS 2005-12-12 19:44:06 +00:00
Stanislav Shwartsman
1f2cde53f0 Fix arbitration of local apic when issuing lowest priority interrupt or arbitrating between different local apics. APR (arbitration priority register) should be used for lowest priority interrupt delivery and available to user software and ARB_ID should be software transparent APIC internal 2005-12-11 21:58:53 +00:00
Stanislav Shwartsman
8b8d4900ed Implement read/write of ESR register 2005-12-11 20:01:54 +00:00
Stanislav Shwartsman
faff702f44 GP(0) on cross segment boundaryu instruction 2005-12-09 21:21:29 +00:00
Stanislav Shwartsman
abe9791fe6 Fix typo 2005-11-28 22:42:29 +00:00
Stanislav Shwartsman
1f2913477e Fix typo ... 2005-11-28 22:35:43 +00:00
Stanislav Shwartsman
82ccada927 Merged and committed #SF patch from wmrieker 
[ 857235 ] task priority and other APIC bugs, etc
 2005-11-28 22:19:01 +00:00
Stanislav Shwartsman
fe02ecab65 Do not flood log with WBINVD/INVD messages 2005-11-27 18:36:19 +00:00
Stanislav Shwartsman
8c91790680 Redefine registers accessors in cpu.h 
Change BxSupportPAE and BxSupportGlobalPages macros to Bochs style names
Set bx_cpu_id in BX_CPU_C constructor (safe way)
Backup cpu-level check for paging features at compile time (already checked in configure)
Some warnings and indent fixes
speed up get_segment_base method for x86-64 case
 2005-11-26 21:36:51 +00:00
Stanislav Shwartsman
49ed4e95a1 Fixed bug in set_id 2005-11-22 17:41:07 +00:00
Stanislav Shwartsman
e003620a30 In debug snapshot print flags in more ellegant way - use capital letters when flag is UP and lower letters when it DOWN 2005-11-21 22:29:02 +00:00
Stanislav Shwartsman
82dcab043f Update TODO 2005-11-21 21:15:35 +00:00
Stanislav Shwartsman
9314752bb1 Rewritten task_switch mechnism according to AMD docs 
This should fix the #SF bug report
736279  Jump to Task
 2005-11-21 21:10:59 +00:00
Stanislav Shwartsman
8247b94245 Another fix for INIT/RESET state 2005-11-19 19:38:45 +00:00
Stanislav Shwartsman
ec81586bb8 Init/Reset values for LDTR/TR 2005-11-19 18:27:15 +00:00
Stanislav Shwartsman
8d9b5b7134 Fixed compilation error when PAE diasbled and BX_DEBUGGER enabled 
CVS patch by shirokuma #SF 1359011
 2005-11-17 17:52:00 +00:00
Stanislav Shwartsman
3250edb8c5 Update instrumentation 2005-11-14 18:25:41 +00:00
Stanislav Shwartsman
7b7ac565f9 Getting ready for long mode disasm support, patch will posted soon 2005-11-14 18:09:22 +00:00
Stanislav Shwartsman
e2a5b9c338 MOV to/from test register are UD in x86-64 2005-11-11 22:02:42 +00:00
Stanislav Shwartsman
cb4ec526ab Fix comments and cleanup ... 
No functional change
 2005-11-11 21:34:57 +00:00
Stanislav Shwartsman
38a7e0abea 0f 0d (3dnow prefetch instruction) should execute as NOP when running on Intel EM64T CPU and as prefetch on AMD 2005-11-11 21:09:02 +00:00
Stanislav Shwartsman
0c6a401f30 Update CPU/TODO 2005-11-09 18:07:49 +00:00
Stanislav Shwartsman
e70aa1c403 Initialize l-biT (x86-64 mode) during reset or init 
Do not modify segment limit and access rights when changing segment in real mode
 2005-11-07 22:45:25 +00:00
Stanislav Shwartsman
5d67c7354f Fix code duplication 2005-11-05 11:39:26 +00:00
Stanislav Shwartsman
cd2a9f317d Do not PANIC when HLT with IF=0, only BX_INFO 2005-11-04 15:15:02 +00:00
Stanislav Shwartsman
ab81296e33 Update CHANGES/TODO 
Change BX_INFO to BX_DEBUG in read CR4 function
 2005-10-23 21:11:32 +00:00
Stanislav Shwartsman
732abe4b30 Move parity table from cpu.cc to lazy_flags.cc 2005-10-20 17:33:36 +00:00
Stanislav Shwartsman
64ba97210b INVD/WBINVD should flush caches and TLB 2005-10-18 18:07:52 +00:00
Stanislav Shwartsman
670395f1be VME support - beta #1 2005-10-17 13:06:09 +00:00
Stanislav Shwartsman
e83c77db49 Preparing to VME implementation 
DO NOT ENABLE VME option until the implementation will be completed !
 2005-10-16 23:13:19 +00:00
Stanislav Shwartsman
bf855506a3 Change set_FLAGS(0) by clear_FLAG () 
set_FLAGS(1) by assert_FLAG()
 2005-10-15 21:01:36 +00:00
Stanislav Shwartsman
51347f2604 PAUSE instruction still should be implemented ... 2005-10-13 22:53:03 +00:00
Stanislav Shwartsman
7c1374a2ec support lazy flags for SHRD instruction 2005-10-13 20:21:35 +00:00
Stanislav Shwartsman
7022be46f5 Fix undefined flags handling for ROR and RCR instructions 2005-10-13 19:28:10 +00:00
Stanislav Shwartsman
469358aaf9 Move SHOW_IPS action to bx_gui object, may be some GUI will be able to print IPS online in the simulation window status bar ... 
Small code cleanup
 2005-10-13 16:22:21 +00:00
Stanislav Shwartsman
2c5b72fce5 Apply patch 
[ bochs-Patches-1311170 ] small APIC bug fix (interrupt sent to the wrong CPU)
 2005-10-10 20:45:41 +00:00
Stanislav Shwartsman
39fc11c5da Fix compilation error 2005-10-09 18:32:36 +00:00
Volker Ruppert
fa68f44d94 - compilation error fixed 2005-10-02 15:26:51 +00:00
Stanislav Shwartsman
7869ab425f LTR should #GP when loading NULL selector 
fixed check for SYSENTER/SYSEXIT instructions
according to new Intel references
 2005-10-01 07:47:00 +00:00
Stanislav Shwartsman
3885ad67c5 use get_EFER in extdb.cc 2005-09-29 17:55:31 +00:00
Stanislav Shwartsman
8c783bc329 Fixed cpu_mode corruption in x86-64 mode 
Removed all potentially unsafe and duplicated code in setFLAGS methods to avoid such kind of problems in future
 2005-09-29 17:32:32 +00:00
Stanislav Shwartsman
b9cc8b5b0d Do not look on mxcsr_mask field when restoring mxcsr register in FXRSTOR 
At least my hardware CPU doesn't
 2005-09-24 16:56:20 +00:00
Stanislav Shwartsman
d1c722211e Fix duplicate opcodes, fix opcode names and disasm bugs 2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
6096698393 Fixed CLTS and HLT GP0 check 2005-09-14 20:01:42 +00:00
Stanislav Shwartsman
3d9ee328fb PMOVMSKB and PEXTRW instruction should zero-extend dest when in 64-bit mode 2005-09-12 18:08:35 +00:00
Stanislav Shwartsman
95b12d7429 #SF patch fixed transition from vm8086 to PM 2005-09-11 20:00:29 +00:00
Stanislav Shwartsman
76def09c07 Complete the FXRSTOR fix 2005-09-06 19:12:02 +00:00
Stanislav Shwartsman
734cc8496f Update changes and cpu/todo 2005-09-05 17:50:37 +00:00
Stanislav Shwartsman
f09f1d8b98 Fixed restoring of XMM regs in fxrestor 2005-09-05 17:02:30 +00:00
Stanislav Shwartsman
33c0c5367c Fixed bug in tasking.cc last change 2005-09-03 11:39:26 +00:00
Stanislav Shwartsman
086ee4c9aa Fix code duplication in tas 2005-08-28 17:37:37 +00:00
Stanislav Shwartsman
823dfa6f40 This code will be required for dynamic translation in future. 
For now it is no more than code duplication fix ...
 2005-08-23 20:01:54 +00:00
Stanislav Shwartsman
b28ed3be69 Fix LDT.limit < 7 check 
Indent for protect_ctrl.cc code
 2005-08-21 18:23:36 +00:00
Alexander Krisak
7be0d52cce Added missing reinitialization of field time_tick in guard_found 2005-08-15 15:43:04 +00:00
Alexander Krisak
672ac67ff9 Fixed bug in bochs debugger caused breakpoints doesn't fires sometimes. 2005-08-15 05:32:36 +00:00
Stanislav Shwartsman
84ce5ec720 do #GP in x86-64 mode if NT flag is set 2005-08-14 18:01:04 +00:00
Stanislav Shwartsman
681db0fd86 Roll back several incorrect changes in iret.cc 2005-08-14 17:23:03 +00:00
Stanislav Shwartsman
126069829d Fixed compilation error when icache is disabled 2005-08-13 14:10:22 +00:00
Stanislav Shwartsman
5b258fd453 Add todo file to CPU 2005-08-10 19:04:19 +00:00
Stanislav Shwartsman
80c895498e Fixed comments for code 2005-08-10 18:40:38 +00:00
Stanislav Shwartsman
a66b45e024 Fixed bug for masked writes in 64-bit mode 2005-08-10 18:34:00 +00:00
Stanislav Shwartsman
b192b2af9b Optimize pageWriteStamp checking 2005-08-10 18:18:57 +00:00
Stanislav Shwartsman
c9e44fb695 Added debug dump in case of tripple fault 2005-08-08 21:03:32 +00:00
Stanislav Shwartsman
37bd193337 Split PUSHF/POPF to 3 different methods according to op size. 
By the way fix VIP/VIF flags handling in POPF/PUSHF (future fix for VME)
 2005-08-08 19:56:11 +00:00
Stanislav Shwartsman
227fea6d77 do not check CS.limit in prefetch when in long64 mode 2005-08-05 18:23:36 +00:00
Stanislav Shwartsman
8616109eb8 revert back not correct change in fetchdecode 2005-08-05 12:53:09 +00:00
Stanislav Shwartsman
8be190d848 Implemented RDTSCP instruction 2005-08-05 12:47:33 +00:00
Stanislav Shwartsman
ea30a3ef06 Implemented CALL FAR in 64-bit mode 2005-08-04 19:38:51 +00:00
Stanislav Shwartsman
b8485d5f98 Fixed RSP checking 2005-08-04 19:31:59 +00:00
Stanislav Shwartsman
084b4fa2b2 Fixed IRET implementation for long mode 2005-08-03 21:19:11 +00:00
Stanislav Shwartsman
3681126235 Fixed ugly load_ss64/mode changing workaround in exception.cc 2005-08-03 21:10:42 +00:00
Stanislav Shwartsman
a096472646 Fixed NULL SS selector loading for ret_far 2005-08-03 21:01:02 +00:00
Stanislav Shwartsman
c6c721a450 Small fixes for call-far and others 2005-08-02 20:20:22 +00:00
Stanislav Shwartsman
d8ab4e3424 Fully implemented jump_far and ret_far in 64-bit mode. 
Note that I am not sure about 100% correctness, I am just coding Intel specs ...
Code review and massive testing still required.
 2005-08-02 18:44:20 +00:00
Stanislav Shwartsman
26f0662199 dos2unix 2005-08-01 22:18:40 +00:00
Stanislav Shwartsman
6a07173b3d Split ctrl_xfer_pro.cc to 4 different files according to the operations 2005-08-01 22:06:19 +00:00
Stanislav Shwartsman
f096a80716 Fix code duplication for check_cs descriptor 
The function will execute
 - segment is executable code segment
 - conforming/non-conforming segment priviledge checks
 - segment is present
 2005-08-01 21:40:17 +00:00
Stanislav Shwartsman
2c6393dd8b Fixed memory corruption in APIC 2005-08-01 18:55:58 +00:00
Stanislav Shwartsman
954aae3f99 Speedup push/pop operations, they actually not needed to do can_push/can_pop checkes, the same checkes already done in read/write_virtial methods 
Split push_seg_reg methods according to op size
 2005-07-31 17:57:27 +00:00
Stanislav Shwartsman
5da36b7d3d Fixed code duplication, added canonical address checking for RETF in long mode 2005-07-29 06:29:57 +00:00
Stanislav Shwartsman
2b5a812674 Split last bit.cc methods according to os16/32/64 2005-07-25 04:18:20 +00:00
Volker Ruppert
0ff15e9522 - fixed panic caused by operator precedence bug 2005-07-24 08:35:15 +00:00
Stanislav Shwartsman
dea55d5e63 Fix compilation error 2005-07-22 05:00:40 +00:00
Stanislav Shwartsman
51e03f071d Fixed XLAT instruction for x86-64 
Small optimization for lazy flags for ADD/ADC/SUB/SBB instructions
Enable RETF64 for same privelege level return
 2005-07-21 01:59:05 +00:00
Stanislav Shwartsman
aceb8c683b Initial implementation of RETF64 2005-07-20 01:26:47 +00:00
Stanislav Shwartsman
169fa0c574 Clearify the code. x86-64 code always running in pmode so it is not needed to check if we are in protected mode everytime 2005-07-10 20:32:32 +00:00
Stanislav Shwartsman
4638f09b24 Added BX_INSTR_HLT instrumentation callback 2005-07-07 18:40:35 +00:00
Stanislav Shwartsman
01d8a97613 Try to cleanup/rewrite RepeatSpeedups optimization 
This code doesn't add new speedups but makes it very easy
After some validation it could be no problem to enable repeat speedups optimization for REP MOVSx with any address size. And REP STOSx too.
 2005-07-04 17:44:08 +00:00
Stanislav Shwartsman
3d2e2162f3 Code indent, no functionality changes 2005-07-01 14:06:02 +00:00
Stanislav Shwartsman
a9dd851fd6 Fixed several PANIC cases: 
the PANIC message TSS.limit < 103 should never appear anymore
 2005-06-22 18:13:45 +00:00
Stanislav Shwartsman
ce8f1ade07 Some not really significant speedups 2005-06-21 17:01:21 +00:00
Stanislav Shwartsman
afe3ff691d Another fix for FPU tag word restore in FXRESTOR instruction (the tags were assigned to incorrect registers) 
Fixed FPU print state status word printing (printed partial status instead of normal status word)
 2005-06-18 20:46:08 +00:00
Stanislav Shwartsman
47442d437a Speedup ICAche decWriteStamp operation. The main idea for this speedup was given by h.johansson. 2005-06-16 20:28:27 +00:00
Stanislav Shwartsman
64f6d8c293 Separate force_flags function from read_flags (fix code duplication) 2005-06-16 17:25:04 +00:00
Stanislav Shwartsman
e04b4c5856 Allow zero apic timer count: 
terminate the counting if apic timer initial count register was set to zero during the counting.
 2005-06-16 16:56:30 +00:00
Stanislav Shwartsman
0b60100a0d Merged patch for Hkan T. Johansson 
TLB access bit optimizations
 2005-06-14 20:55:57 +00:00
Stanislav Shwartsman
2f4a3367e4 Fixed FPU TAG WORD restore in FXRESTOR instruction 2005-06-13 20:25:16 +00:00
Volker Ruppert
821ff1e87c - clarify operator precedence (needed by MSVC) 
- defined symbol BOCHSAPI_MSVCONLY for special cases in MSVC
 2005-06-09 17:42:34 +00:00
Stanislav Shwartsman
b5514f42de Merged patch for "compilation outside source directory" 
Added missed copyrights for APIC.CC
 2005-06-07 05:54:57 +00:00
Volker Ruppert
5e75dc3a10 - some more warnings in MSVC fixed 2005-06-06 20:14:50 +00:00
Stanislav Shwartsman
015ad92958 Added SMP status to TODO file 
Removed abusive BX_INFO from WBINVD instruction
The PREFETCHW (3DNow!) instruction should not #UD in x86-64 even on Intel w/o 3DNow!
 2005-05-27 01:53:38 +00:00
Stanislav Shwartsman
c026a90779 Unify coding style in CPU methods 
NO AFFECT ON EMULATION RESULTS
 2005-05-20 20:06:50 +00:00
Stanislav Shwartsman
4e0ca04d31 Fixed compilation problem 2005-05-20 17:04:42 +00:00
Stanislav Shwartsman
663f7d5ef3 CMPXCHG16B instruction implemented 2005-05-19 20:25:16 +00:00
Stanislav Shwartsman
92cc308ad2 implement the correct condition for the segment limit check 2005-05-19 19:46:20 +00:00
Stanislav Shwartsman
61946bd3a4 Fixed compilation error 2005-05-19 18:15:19 +00:00
Stanislav Shwartsman
6df9640844 implement jump_far64 for code segments 
the panic message moved to TASK-GATE64 far jmp which is still not implemented
 2005-05-19 18:13:08 +00:00
Stanislav Shwartsman
6c318bd047 SFENCE/MFENCE/LFENCE methods not defined in CPU class and they NOP in fetchdecode.cc 2005-05-18 05:05:40 +00:00
Kevin Lawton
f829c9cf93 Typo in CR8 handling in MOV_CqRq/MOV_RqCq had a typo. A switch 
target of 7 was used instead of 8.
 2005-05-17 22:22:35 +00:00
Stanislav Shwartsman
400b7094c6 Commit patch by kuma neko [yuubyou@gmail.com] 
64-bit IDIV uses unsigned overflow test
 2005-05-13 14:15:35 +00:00
Stanislav Shwartsman
d10731f162 Update my e-mail in source files 
Update committed SF patches in changes
 2005-05-12 18:07:48 +00:00
Stanislav Shwartsman
a86002a8bc Improve Bochs instrumentation 
Small changes in APIC timer, should fix the bug report
[ 957660 ] >>PANIC<< APIC: R(curr timer count): delta < initial
 2005-04-29 21:28:59 +00:00