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Bochs/bochs/cpu
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Stanislav Shwartsman 21352e50a9 Fix some bugs in debugger parser, cleanup 
Add some debugger functionality
2006-01-23 21:44:44 +00:00
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3dnow.cc
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access.cc
Another fix for INIT/RESET state
2005-11-19 19:38:45 +00:00
apic.cc
Fix for bug report:
2006-01-15 17:38:40 +00:00
apic.h
Merge APIC patch to the CVS.
2006-01-10 06:13:26 +00:00
arith8.cc
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arith16.cc
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arith32.cc
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arith64.cc
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bcd.cc
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bit.cc
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call_far.cc
Generate #GP exception instead of #TS when TSS selector points to bad TSS
2005-12-12 19:44:06 +00:00
cpu.cc
Don't know how much it helps ...
2006-01-19 18:32:39 +00:00
cpu.h
Write to MSR_TSC implemented (patch by Bryce)
2006-01-21 12:06:03 +00:00
cpuid.cc
Enabled LAHF/SAHF for x86-64 mode
2006-01-17 19:50:42 +00:00
ctrl_xfer8.cc
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ctrl_xfer16.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
ctrl_xfer32.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
ctrl_xfer64.cc
MOV to/from test register are UD in x86-64
2005-11-11 22:02:42 +00:00
ctrl_xfer_pro.cc
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data_xfer8.cc
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data_xfer16.cc
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data_xfer32.cc
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data_xfer64.cc
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debugstuff.cc
Fix some bugs in debugger parser, cleanup
2006-01-23 21:44:44 +00:00
descriptor.h
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exception.cc
Small debug fixes
2005-12-12 22:01:22 +00:00
extdb.cc
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extdb.h
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fetchdecode64.cc
Enabled LAHF/SAHF for x86-64 mode
2006-01-17 19:50:42 +00:00
fetchdecode.cc
0f 0d (3dnow prefetch instruction) should execute as NOP when running on Intel EM64T CPU and as prefetch on AMD
2005-11-11 21:09:02 +00:00
fetchdecode.h
Generate #GP exception instead of #TS when TSS selector points to bad TSS
2005-12-12 19:44:06 +00:00
flag_ctrl_pro.cc
Rewritten task_switch mechnism according to AMD docs
2005-11-21 21:10:59 +00:00
flag_ctrl.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
fpu_emu.cc
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hostasm.h
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i387.h
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icache.h
Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address)
2006-01-16 19:22:28 +00:00
init.cc
Write to MSR_TSC implemented (patch by Bryce)
2006-01-21 12:06:03 +00:00
io_pro.cc
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io.cc
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iret.cc
Small debug fixes
2005-12-12 22:01:22 +00:00
jmp_far.cc
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lazy_flags.cc
Move parity table from cpu.cc to lazy_flags.cc
2005-10-20 17:33:36 +00:00
lazy_flags.h
support lazy flags for SHRD instruction
2005-10-13 20:21:35 +00:00
logical8.cc
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logical16.cc
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logical32.cc
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logical64.cc
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Makefile.in
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mmx.cc
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mult8.cc
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mult16.cc
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mult32.cc
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mult64.cc
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paging.cc
Redefine registers accessors in cpu.h
2005-11-26 21:36:51 +00:00
proc_ctrl.cc
Write to MSR_TSC implemented (patch by Bryce)
2006-01-21 12:06:03 +00:00
protect_ctrl_pro.cc
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protect_ctrl.cc
Change set_FLAGS(0) by clear_FLAG ()
2005-10-15 21:01:36 +00:00
resolve16.cc
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resolve32.cc
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resolve64.cc
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ret_far.cc
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segment_ctrl_pro.cc
Fix validate_seg_regs check
2006-01-09 19:34:52 +00:00
segment_ctrl.cc
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shift8.cc
Fix undefined flags handling for ROR and RCR instructions
2005-10-13 19:28:10 +00:00
shift16.cc
Missed ;
2006-01-22 18:18:19 +00:00
shift32.cc
support lazy flags for SHRD instruction
2005-10-13 20:21:35 +00:00
shift64.cc
support lazy flags for SHRD instruction
2005-10-13 20:21:35 +00:00
soft_int.cc
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sse_move.cc
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sse_pfp.cc
Redefine registers accessors in cpu.h
2005-11-26 21:36:51 +00:00
sse_rcp.cc
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sse.cc
Fix bug in PMULUDQ SSE instruction
2006-01-18 18:39:17 +00:00
stack16.cc
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stack32.cc
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stack64.cc
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stack_pro.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
string.cc
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tasking.cc
Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address)
2006-01-16 19:22:28 +00:00
todo
Remove code duplication in CPU and memory objects initialization
2006-01-11 18:22:12 +00:00
vm8086.cc
Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address)
2006-01-16 19:22:28 +00:00
xmm.h
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