Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address)
Fixed fetch mode mask initialization (bug report 1400027 Boundary instruction cache error for uninitialized memory) For safety only - everytime when changing CS register update fetch mode mask. Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
This commit is contained in:
Stanislav Shwartsman
parent
f31e278df3
commit
7bf51e48db
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: debugstuff.cc,v 1.49 2006-01-15 18:14:16 sshwarts Exp $
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// $Id: debugstuff.cc,v 1.50 2006-01-16 19:22:28 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -180,6 +180,12 @@ void BX_CPU_C::debug(bx_address offset)
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(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.limit,
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(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.g,
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(unsigned) BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.d_b));
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#if BX_SUPPORT_X86_64
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BX_INFO(("| MSR_FS_BASE:%08x%08x",
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(unsigned) (MSR_FSBASE >> 32), (unsigned) (MSR_FSBASE & 0xFFFFFFFF)));
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BX_INFO(("| MSR_GS_BASE:%08x%08x",
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(unsigned) (MSR_GSBASE >> 32), (unsigned) (MSR_GSBASE & 0xFFFFFFFF)));
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#endif
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#if BX_SUPPORT_X86_64
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BX_INFO(("| RIP=%08x%08x (%08x%08x)",
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@ -721,6 +727,9 @@ bx_bool BX_CPU_C::dbg_set_cpu(bx_dbg_cpu_t *cpu)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled =
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit;
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#if BX_SUPPORT_ICACHE
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BX_CPU_THIS_PTR iCache.fetchModeMask = createFetchModeMask(BX_CPU_THIS);
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#endif
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// SS:
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value = cpu->ss.sel;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: icache.h,v 1.10 2005-12-13 14:18:34 akrisak Exp $
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// $Id: icache.h,v 1.11 2006-01-16 19:22:28 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -129,7 +129,7 @@ public:
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for (unsigned i=0; i<BxICacheEntries; i++) {
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entry[i].writeStamp = ICacheWriteStampInvalid;
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}
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fetchModeMask = 0; // CS is 16-bit, Long Mode disabled, Data page
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fetchModeMask = iCachePageDataMask; // CS is 16-bit, Long Mode disabled
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}
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BX_CPP_INLINE unsigned hash(Bit32u pAddr) const
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: init.cc,v 1.77 2006-01-11 18:22:12 sshwarts Exp $
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// $Id: init.cc,v 1.78 2006-01-16 19:22:28 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -525,6 +525,10 @@ void BX_CPU_C::reset(unsigned source)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0;
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#endif
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#if BX_SUPPORT_ICACHE
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BX_CPU_THIS_PTR iCache.fetchModeMask = createFetchModeMask(BX_CPU_THIS);
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#endif
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/* SS (Stack Segment) and descriptor cache */
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value = 0x0000;
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#if BX_CPU_LEVEL >= 2
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: proc_ctrl.cc,v 1.129 2006-01-13 11:11:29 sshwarts Exp $
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// $Id: proc_ctrl.cc,v 1.130 2006-01-16 19:22:28 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1164,6 +1164,10 @@ void BX_CPU_C::LOADALL(bxInstruction_c *i)
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BX_PANIC(("loadall: CS invalid"));
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}
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#if BX_SUPPORT_ICACHE
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BX_CPU_THIS_PTR iCache.fetchModeMask = createFetchModeMask(BX_CPU_THIS);
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#endif
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/* ES */
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BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, 0x824, 2, &es_raw);
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value = es_raw;
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@ -1872,6 +1876,10 @@ void BX_CPU_C::SYSENTER (bxInstruction_c *i)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b = 1; // 32-bit mode
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0; // available for use by system
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#if BX_SUPPORT_ICACHE
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BX_CPU_THIS_PTR iCache.fetchModeMask = createFetchModeMask(BX_CPU_THIS);
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#endif
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value = (BX_CPU_THIS_PTR sysenter_cs_msr + 8) & BX_SELECTOR_RPL_MASK;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.index = (BX_CPU_THIS_PTR sysenter_cs_msr + 8) >> 3;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.ti = ((BX_CPU_THIS_PTR sysenter_cs_msr + 8) >> 2) & 1;
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@ -1887,8 +1895,6 @@ void BX_CPU_C::SYSENTER (bxInstruction_c *i)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b = 1; // 32-bit mode
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.avl = 0; // available for use by system
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// BX_INFO (("sysenter: old eip %X, esp %x, new eip %x, esp %X, edx %X", BX_CPU_THIS_PTR prev_eip, ESP, BX_CPU_THIS_PTR sysenter_eip_msr, BX_CPU_THIS_PTR sysenter_esp_msr, EDX));
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ESP = BX_CPU_THIS_PTR sysenter_esp_msr;
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EIP = BX_CPU_THIS_PTR sysenter_eip_msr;
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#else
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@ -1930,6 +1936,10 @@ void BX_CPU_C::SYSEXIT (bxInstruction_c *i)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b = 1; // 32-bit mode
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0; // available for use by system
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#if BX_SUPPORT_ICACHE
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BX_CPU_THIS_PTR iCache.fetchModeMask = createFetchModeMask(BX_CPU_THIS);
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#endif
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value = (BX_CPU_THIS_PTR sysenter_cs_msr + 24) | 3;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.index = (BX_CPU_THIS_PTR sysenter_cs_msr + 24) >> 3;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.ti = ((BX_CPU_THIS_PTR sysenter_cs_msr + 24) >> 2) & 1;
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@ -1945,8 +1955,6 @@ void BX_CPU_C::SYSEXIT (bxInstruction_c *i)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b = 1; // 32-bit mode
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.avl = 0; // available for use by system
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// BX_INFO (("sysexit: old eip %X, esp %x, new eip %x, esp %X, eax %X", BX_CPU_THIS_PTR prev_eip, ESP, EDX, ECX, EAX));
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ESP = ECX;
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EIP = EDX;
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#else
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: tasking.cc,v 1.28 2005-12-12 22:01:22 sshwarts Exp $
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// $Id: tasking.cc,v 1.29 2006-01-16 19:22:28 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -607,6 +607,10 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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goto post_exception;
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}
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#if BX_SUPPORT_ICACHE // update instruction cache
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BX_CPU_THIS_PTR iCache.fetchModeMask = createFetchModeMask(BX_CPU_THIS);
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#endif
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// SS
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if ( (raw_ss_selector & 0xfffc) != 0 )
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{
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: vm8086.cc,v 1.22 2005-10-17 13:06:09 sshwarts Exp $
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// $Id: vm8086.cc,v 1.23 2006-01-16 19:22:28 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -253,6 +253,10 @@ void BX_CPU_C::init_v8086_mode(void)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl = 3;
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#if BX_SUPPORT_ICACHE // update instruction cache
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BX_CPU_THIS_PTR iCache.fetchModeMask = createFetchModeMask(BX_CPU_THIS);
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#endif
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid = 1;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.p = 1;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl = 3;
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