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Bochs/bochs/cpu
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Stanislav Shwartsman 8627bc1596 Fixed bug from prev commit
2005-12-13 20:42:22 +00:00
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3dnow.cc
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access.cc
Another fix for INIT/RESET state
2005-11-19 19:38:45 +00:00
apic.cc
Fixed bug from prev commit
2005-12-13 20:42:22 +00:00
apic.h
Generate #GP exception instead of #TS when TSS selector points to bad TSS
2005-12-12 19:44:06 +00:00
arith8.cc
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arith16.cc
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arith32.cc
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arith64.cc
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bcd.cc
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bit.cc
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call_far.cc
Generate #GP exception instead of #TS when TSS selector points to bad TSS
2005-12-12 19:44:06 +00:00
cpu.cc
Fix incorrect commit
2005-12-12 19:54:48 +00:00
cpu.h
Generate #GP exception instead of #TS when TSS selector points to bad TSS
2005-12-12 19:44:06 +00:00
cpuid.cc
Redefine registers accessors in cpu.h
2005-11-26 21:36:51 +00:00
ctrl_xfer8.cc
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ctrl_xfer16.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
ctrl_xfer32.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
ctrl_xfer64.cc
MOV to/from test register are UD in x86-64
2005-11-11 22:02:42 +00:00
ctrl_xfer_pro.cc
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data_xfer8.cc
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data_xfer16.cc
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data_xfer32.cc
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data_xfer64.cc
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debugstuff.cc
Fix arbitration of local apic when issuing lowest priority interrupt or arbitrating between different local apics. APR (arbitration priority register) should be used for lowest priority interrupt delivery and available to user software and ARB_ID should be software transparent APIC internal
2005-12-11 21:58:53 +00:00
descriptor.h
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exception.cc
Small debug fixes
2005-12-12 22:01:22 +00:00
extdb.cc
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extdb.h
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fetchdecode64.cc
MOV to/from test register are UD in x86-64
2005-11-11 22:02:42 +00:00
fetchdecode.cc
0f 0d (3dnow prefetch instruction) should execute as NOP when running on Intel EM64T CPU and as prefetch on AMD
2005-11-11 21:09:02 +00:00
fetchdecode.h
Generate #GP exception instead of #TS when TSS selector points to bad TSS
2005-12-12 19:44:06 +00:00
flag_ctrl_pro.cc
Rewritten task_switch mechnism according to AMD docs
2005-11-21 21:10:59 +00:00
flag_ctrl.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
fpu_emu.cc
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hostasm.h
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i387.h
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icache.h
Small icache optimization
2005-12-13 14:18:34 +00:00
init.cc
Fix incorrect commit
2005-12-12 19:54:48 +00:00
io_pro.cc
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io.cc
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iret.cc
Small debug fixes
2005-12-12 22:01:22 +00:00
jmp_far.cc
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lazy_flags.cc
Move parity table from cpu.cc to lazy_flags.cc
2005-10-20 17:33:36 +00:00
lazy_flags.h
support lazy flags for SHRD instruction
2005-10-13 20:21:35 +00:00
logical8.cc
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logical16.cc
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logical32.cc
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logical64.cc
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Makefile.in
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mmx.cc
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mult8.cc
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mult16.cc
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mult32.cc
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mult64.cc
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paging.cc
Redefine registers accessors in cpu.h
2005-11-26 21:36:51 +00:00
proc_ctrl.cc
Fix incorrect commit
2005-12-12 19:54:48 +00:00
protect_ctrl_pro.cc
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protect_ctrl.cc
Change set_FLAGS(0) by clear_FLAG ()
2005-10-15 21:01:36 +00:00
resolve16.cc
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resolve32.cc
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resolve64.cc
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ret_far.cc
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segment_ctrl_pro.cc
Generate #GP exception instead of #TS when TSS selector points to bad TSS
2005-12-12 19:44:06 +00:00
segment_ctrl.cc
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shift8.cc
Fix undefined flags handling for ROR and RCR instructions
2005-10-13 19:28:10 +00:00
shift16.cc
support lazy flags for SHRD instruction
2005-10-13 20:21:35 +00:00
shift32.cc
support lazy flags for SHRD instruction
2005-10-13 20:21:35 +00:00
shift64.cc
support lazy flags for SHRD instruction
2005-10-13 20:21:35 +00:00
soft_int.cc
Move SHOW_IPS action to bx_gui object, may be some GUI will be able to print IPS online in the simulation window status bar ...
2005-10-13 16:22:21 +00:00
sse_move.cc
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sse_pfp.cc
Redefine registers accessors in cpu.h
2005-11-26 21:36:51 +00:00
sse_rcp.cc
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sse.cc
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stack16.cc
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stack32.cc
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stack64.cc
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stack_pro.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
string.cc
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tasking.cc
Small debug fixes
2005-12-12 22:01:22 +00:00
todo
Update TODO
2005-11-21 21:15:35 +00:00
vm8086.cc
VME support - beta #1
2005-10-17 13:06:09 +00:00
xmm.h
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